CN108885854B

CN108885854B - System and method for external pixel compensation

Info

Publication number: CN108885854B
Application number: CN201780020803.5A
Authority: CN
Inventors: M·B·瓦伊德法尔; J·A·里士摩德; 毕亚飞
Original assignee: Apple Inc
Current assignee: Apple Inc
Priority date: 2016-06-30
Filing date: 2017-05-18
Publication date: 2021-06-18
Anticipated expiration: 2037-05-18
Also published as: CN108885854A; KR20190003468A; US20190019459A1; EP3420552A1; JP2019510274A; KR101983526B1; WO2018004865A1; US10096284B2; JP6716713B2; US20180005578A1; US10529285B2

Abstract

An electronic device 10 includes a display panel 18. The display panel 18 includes a plurality of pixels 62, each of which includes a driving Thin Film Transistor (TFT) and a light emitting diode. A compensation circuit 152 external to the display panel 18 applies offset data to the pixel data of each of the plurality of pixels prior to providing the pixel data to the plurality of pixels.

Description

System and method for external pixel compensation

Cross reference to related patent applications

This application is a non-provisional patent application entitled "SYSTEM AND METHOD FOR EXTERNAL PIXEL COMPENSATION" filed on 30.6.2016, which is hereby incorporated by reference.

Background

The present disclosure relates to external compensation for operational parameter shifts in display panels. More particularly, the present disclosure relates to performing external compensation when these operating parameters are offset.

This section is intended to introduce the reader to various aspects of art, which may be related to various aspects of the present technology that are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. It should be understood, therefore, that these written description is to be read in this sense, and not as an admission of prior art.

Many electronic devices include electronic displays that display images by varying the amount of light emitted from pixel arrays of different colors. For pixels using self-emissive elements, such as Organic Light Emitting Diodes (OLEDs), pixel non-uniformity may occur due to Light Emitting Diode (LED) voltage variations (e.g., Voled) and/or LED current variations (e.g., Ioled). Over time, these pixel non-uniformities can cause degradation in image quality. The variation in pixels may be caused by many different factors. For example, variations in pixels may be caused by temperature variations in the display, aging of the display (e.g., aging of Thin Film Transistors (TFTs)), operation of certain display processes, and other factors.

To counteract image degradation due to variations in the display, it may be desirable to perform either intra-pixel compensation or pixel-by-pixel compensation for these variations. However, as the Pixels Per Inch (PPI) increases, the intra-pixel or pixel-by-pixel compensation logic for these variations may become more and more limited. For example, a display with high pixel values per inch may include smaller pixel circuit packages. Therefore, the size of the intra-pixel or pixel-by-pixel compensation circuit may become a limiting factor. Furthermore, the timing constraints of these high PPI displays may lead to timing limitations within the pixels or on the pixel-by-pixel compensation circuits.

Disclosure of Invention

The following sets forth a summary of certain embodiments disclosed herein. It should be understood that these aspects are presented merely to provide the reader with a brief summary of these particular embodiments and that these aspects are not intended to limit the scope of this disclosure. Indeed, the present disclosure may encompass a variety of aspects that may not be set forth below.

To improve image quality and uniformity, external compensation circuitry can be used to counteract negative artifacts caused by variations within the pixel, such as threshold voltage (Vth) shifts. In addition, external compensation circuitry may be used to counteract negative artifacts due to voltage drift that may occur over time with Light Emitting Diodes (LEDs), such as organic light emitting diodes. In the current implementation, lines carrying data voltages (Vdata) and/or reference voltages (Vref) may be used to sense threshold voltages (Vth), LED voltages (Voled), and/or LED currents (e.g., Ioled) that may be used for subsequent compensation outside the pixel circuit. For example, offset data based on Vth, Voled, and/or Ioled values may be used for compensation logic that adjusts display output based on inconsistencies between display pixels.

As described above, the in-pixel compensation can be used to correct for pixel non-uniformities. Such compensation may utilize a capacitor of the pixel to store data related to the pixel. The stored data can then be used in a separate step for pixel compensation. Unfortunately, the in-pixel compensation can sometimes be slow, taking a significant amount of time to store the data and then use the data for pixel compensation. In addition, for some electronic devices (especially with small integrated circuit packages), the hardware requirements for in-pixel compensation can be very high. For example, the storage capacitors used to store pixel information may be quite large, requiring a large amount of circuit area to be occupied in a limited integrated circuit package.

Thus, in some embodiments described herein, the external compensation techniques may obtain certain information about the display panel and change the input data provided to the display panel before such data reaches the display panel (e.g., outside of the pixel circuits). Based on the obtained information about the display panel, the change to the input data effectively compensates for the non-uniformity. For example, non-uniformities that can be corrected using current techniques may include: adjacent pixels have similar data but differ in brightness, color non-uniformity between adjacent pixels, and pixel row non-uniformity, pixel column non-uniformity, and the like. As will be discussed in more detail below, offset data may be applied to the pixel data using an offset digital-to-analog converter, resulting in externally compensated pixel data implemented on the display panel.

Various modifications to the above-described features may be possible in relation to various aspects of the present invention. Other features may also be added to these various aspects. These refinements and additional features may exist individually or in any combination. For example, various features discussed below in relation to one or more of the illustrated embodiments may be incorporated into any of the above-described aspects of the present invention alone or in any combination. The brief summary presented above is intended only to familiarize the reader with certain aspects and contexts of embodiments of the present disclosure without limitation to the claimed subject matter.

Drawings

The various aspects of the invention may be better understood by reading the following detailed description and by referring to the accompanying drawings in which:

FIG. 1 is a schematic block diagram of an electronic device including a display, according to one embodiment;

FIG. 2 is a perspective view of a notebook computer representing one embodiment of the electronic device of FIG. 1, according to one embodiment;

FIG. 3 is a front view of a handheld device representing another embodiment of the electronic device of FIG. 1, according to one embodiment;

FIG. 4 is a front view of another handheld device representing another embodiment of the electronic device of FIG. 1, in accordance with one embodiment;

FIG. 5 is a front view of a desktop computer representing another embodiment of the electronic device of FIG. 1, according to one embodiment;

FIG. 6 is a front view of a wearable electronic device representing another embodiment of the electronic device of FIG. 1, according to one embodiment;

FIG. 7 is a circuit diagram illustrating a portion of a pixel matrix of the display of FIG. 1 according to one embodiment;

FIG. 8 is a schematic diagram illustrating a process for pixel external compensation and subsequent processing at a display panel, according to one embodiment;

FIG. 9 is a schematic diagram illustrating offset data applied to a driver integrated circuit, according to one embodiment;

FIG. 10 is a schematic diagram illustrating the application of offset data in the current domain, according to one embodiment;

FIG. 11 is a schematic diagram illustrating a circuit for applying offset data in a source driver according to one embodiment;

FIG. 12 is a schematic diagram showing a finer pattern than the embodiment in FIG. 11, according to one embodiment; and

fig. 13 is a circuit diagram illustrating a second phase of voltage sensing according to one embodiment.

Detailed Description

One or more specific embodiments of the present invention will be described below. These described embodiments are merely examples of the presently disclosed technology. Moreover, in an effort to provide a concise description of these embodiments, all features of an actual implementation may not be described in the specification. It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which may vary from one implementation to another. Moreover, it should be appreciated that such a development effort might be complex and time consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure.

When introducing elements of various embodiments of the present disclosure, the articles "a," "an," and "the/said" are intended to mean that there are one or more of the elements. The terms "comprising," "including," and "having" are intended to be inclusive and mean that there may be additional elements other than the listed elements. Furthermore, it should be understood that references to "one embodiment" or "an embodiment" of the present disclosure are not intended to be interpreted as excluding the existence of additional embodiments that also incorporate the recited features.

The present disclosure relates to external compensation for non-uniformities that may occur in a display panel. More specifically, the current embodiment describes techniques for external-to-pixel application of offset data, where the offset data describes pixel-level non-uniformities.

Turning first to FIG. 1, an electronic device 10 according to an embodiment of the present disclosure may include, among other things, a processor core complex 12 having one or more processors, a memory 14, a non-volatile storage 16, a display 18, an input fabric 22, an input/output (I/O) interface 24, a network interface 26, and a power supply 28. The various functional blocks shown in fig. 1 may include hardware elements (including circuitry), software elements (including computer code stored on a computer-readable medium), or a combination of both hardware and software elements. It should be noted that FIG. 1 is only one example of a particular implementation and is intended to illustrate the types of components that may be present in electronic device 10.

By way of example, the electronic device 10 may represent a block diagram of a laptop computer shown in fig. 2, a handheld device shown in fig. 3, a desktop computer shown in fig. 4, a wearable electronic device shown in fig. 5, or the like. It should be noted that the processor core complex 12 and/or other data processing circuitry may be referred to herein generally as "data processing circuitry". Such data processing circuitry may be implemented in whole or in part in software, firmware, hardware, or any combination thereof. Further, the data processing circuitry may be a single processing module that is included, or may be fully or partially incorporated within any of the other elements within electronic device 10.

In the electronic device 10 of FIG. 1, the processor core complex 12 and/or other data processing circuitry may be operatively coupled with the memory 14 and the non-volatile storage 16 to execute various algorithms. Such programs or instructions executed by the processor core complex 12 may be stored in any suitable article of manufacture that may include one or more tangible computer-readable media, such as memory 14 and non-volatile storage 16, that at least collectively store the instructions or routines. Memory 14 and non-volatile storage 16 may comprise any suitable article of manufacture for storing data and executable instructions, such as random access memory, read-only memory, rewritable flash memory, hard drives, and optical disks. Additionally, programs (e.g., operating systems) encoded on such computer program products may also include instructions executable by the processor core complex 12 to enable the electronic device 10 to provide various functions.

As will be discussed further below, the display 18 may include pixels such as Organic Light Emitting Diodes (OLEDs), micro light emitting diodes (μ -LEDs), or any other Light Emitting Diodes (LEDs). Furthermore, display 18 is not limited to a particular pixel type, as the circuits and methods disclosed herein may be applicable to any pixel type. Thus, although specific pixel structures may be shown in this disclosure, this disclosure may relate to a wide range of illumination components and/or pixel circuits within a display device.

As discussed in more detail below, the external compensation circuit 19 may alter the display data provided to the display 18 (or a pixel portion of the display 18) before the display data reaches the display 18. Such changes in the display data may effectively compensate for pixel non-uniformities of the display 18. For example, non-uniformities that can be corrected using current techniques may include: adjacent pixels have similar data but differ in brightness, color non-uniformity between adjacent pixels, and pixel row non-uniformity, pixel column non-uniformity, and the like.

The input structures 22 of the electronic device 10 may enable a user to interact with the electronic device 10 (e.g., press a button to increase or decrease a volume level). Just as with the network interface 26, the I/O interface 24 may enable the electronic device 10 to interact with various other electronic devices. The network interface 26 may include, for example, interfaces for the following networks: a Personal Area Network (PAN) such as a bluetooth network, a Local Area Network (LAN) or a Wireless Local Area Network (WLAN) such as an 802.11x Wi-Fi network, and/or a Wide Area Network (WAN) such as a third generation (3G) cellular network, a fourth generation (4G) cellular network or a Long Term Evolution (LTE) cellular network. The network interface 26 may also include interfaces for, for example: broadband fixed wireless access network (WiMAX), mobile broadband wireless network (mobile WiMAX), asynchronous digital subscriber line (e.g., 15SL, VDSL), digital video terrestrial broadcast (DVB-T) and its extended DVB handheld device (DVB-H), Ultra Wideband (UWB), alternating current (14) power line, and the like.

In some embodiments, the electronic device 10 may take the form of: a computer, a portable electronic device, a wearable electronic device, or other type of electronic device. Such computers may include computers that are generally portable (e.g., laptops, notebooks, and tablets) as well as computers that are generally used in one location (e.g., computers that are often used in one place)A regular desktop computer, workstation, and/or server). In some embodiments, the electronic device 10 in the form of a computer may be available from Apple inc

Pro、MacBook

mini or Mac

A type electronic device. By way of example, an electronic device 10 in the form of a notebook computer 30A is shown in FIG. 2, according to one embodiment of the invention. The illustrated computer 30A may include a housing or casing 32, the display 18, the input structures 22, and ports for the I/O interfaces 24. In one embodiment, input structures 22 (such as a keyboard and/or touchpad) may be used to interact with computer 30A, such as to launch, control, or operate a GUI or application running on computer 30A. For example, a keyboard and/or touchpad may allow a user to navigate a user interface or application interface displayed on display 18.

Fig. 3 depicts a front view of a handheld device 30B that represents one embodiment of the electronic device 10. Handheld device 34 may represent, for example, a cellular telephone, a media player, a personal data manager, a handheld game platform, or any combination of such devices. For example, the handheld device 34 may be available from Apple Inc. (Cupertino, California)

Or

A hand-held device.

Handheld device 30B may include a housing 36 for protecting internal components from physical damage and for shielding internal components from electromagnetic interference. The housing 36 may enclose the display 18, which may display an indicator icon 39. The indicator icon 39 may indicate, among other things, the handset signal strength, bluetooth connection, and/or battery life. I/O interface 24 may be openable through housing 36 and may include, for example, I/O ports for hard wired connections for charging and/or content manipulation using standard connectors and protocols, such as a lightning connector provided by Apple inc.

User input structures 42 in conjunction with display 18 may allow a user to control handheld device 30B. For example, the input structure 40 may activate or deactivate the handheld device 30B, the input structure 42 may navigate a user interface to a home screen and user configurable application screen, and/or activate a voice recognition feature of the handheld device 30B, the input structure 42 may provide volume control or may toggle between a vibrate mode and a ringer mode. Input structures 42 may also include a microphone to obtain a user's voice for various voice-related features, and a speaker that may enable audio playback and/or certain telephony functions. The input structure 42 may also include a headphone input that may provide a connection to an external speaker and/or headphones.

Fig. 4 depicts a front view of another handheld device 30C that represents another embodiment of the electronic device 10. Handheld device 30C may represent, for example, a tablet computer, or one of a variety of portable computing devices. For example, the handheld device 30C may be a tablet-sized implementation of the electronic device 10, and may specifically be, for example, available from Apple Inc

A hand-held device.

Referring to FIG. 5, a computer 30D may represent another embodiment of the electronic device 10 of FIG. 1. The computer 30D may be any computer, such as a desktop, server, or notebook computer, but may also be a standalone media player or video game console. For example, computer 30D may be Apple Inc

Or other similar device. It should be noted that computer 30D may also represent a Personal Computer (PC) of another manufacturer. A similar housing 36 may be provided to protect and enclose internal components of computer 30D, such as display 18. In certain embodiments, a user of computer 30D may interact with computer 30D using various peripheral input devices, such as input device 22 or mouse 38, which may be connected to computer 30D via wired and/or wireless I/O interface 24.

Similarly, fig. 6 depicts a wearable electronic device 30E representative of another embodiment of the electronic device 10 of fig. 1 that may be configured to operate using the techniques described herein. For example, the wearable electronic device 30E may include a wrist band 43, which may be an Apple of Apple inc

However, in other embodiments, wearable electronic device 30E may comprise any wearable electronic device, such as a wearable motion monitoring device (e.g., pedometer, accelerometer, heart rate monitor) or other device of another manufacturer. Display 18 of wearable electronic device 30E may include a touch screen that may allow a user to interact with a user interface of wearable electronic device 30E.

The display 18 for the electronic device 10 may include a matrix of pixels including light emitting circuitry. Thus, fig. 7 shows a circuit diagram of a portion of a pixel matrix comprising the display 18. As shown, the display 18 may include a display panel 60. Further, the display panel 60 may include a plurality of unit pixels 62 (six

unit pixels

62A, 62B, 62C, 62D, 62E, and 62F are shown here) arranged in an array or matrix defining a plurality of rows and columns of unit pixels 62 that collectively form a viewable area of the display 18 in which an image may be displayed. In such an array, each unit pixel 62 may be defined by the intersection of a row and a column, represented herein by a gate line 64 (also referred to as a "scan line") and a data line 66 (also referred to as a "source line"), respectively, as shown. In addition, the power supply line 68 may supply power to each unit pixel 62.

Although only six unit pixels 62 are shown, individually designated by reference numerals 62 a-62 f, respectively, it should be understood that in actual implementations, each data line 66 and gate line 64 may include hundreds or even thousands of such unit pixels 62. For example, in a color display panel 60 having a display resolution of 1024 × 768, each data line 66 may define a column of the pixel array, which may include 768 unit pixels, and each gate line 64 may define a row of the pixel array, which may include 1024 groups of unit pixels, each group including one red, one blue, and one green pixel, so there are a total of 3072 unit pixels on each gate line 64. By way of further example, the panel 60 may have a resolution of 480 x 320 or 960 x 640. In the currently illustrated embodiment, the unit pixel 62 may represent a group of pixels having a red pixel (62A), a blue pixel (62B), and a green pixel (62C). The pixel groups of the

unit pixels

62E, and 62F may be arranged in a similar manner. Additionally, the term "pixel" is also common in the industry and may refer to a group of adjacent, differently colored pixels (e.g., red, blue, and green pixels), with each individual colored pixel in the group being referred to as a "subpixel".

The display 18 also includes a source driver Integrated Circuit (IC)90, which may include a chip, such as a processor or ASIC, configured to control various aspects of the display 18 and the panel 60. For example, the source driver IC 90 may receive image data 92 from the processor core complex 12 and send corresponding image signals to the unit pixels 62 of the panel 60. The source driver IC 90 may also be coupled to a gate driver IC 94, which may be configured to provide/remove gate activation signals via the gate lines 64 to activate/deactivate rows of pixels of the unit pixels 62. The source driver IC 90 may include a timing controller that determines and sends timing information/image signals 96 to the gate driver IC 94 to facilitate activation and deactivation of a single row of unit pixels 62. In other implementations, timing information may be provided to the gate driver IC 94 in some other manner (e.g., using a timing controller that is independent of the source driver IC 90). Further, while fig. 7 shows only a single source driver IC 90, it should be understood that other embodiments may utilize multiple source driver ICs 90 to provide timing information/image signals 96 to the unit pixels 62. For example, further embodiments may include a plurality of source driver ICs 90 disposed along one or more edges of panel 60, wherein each source driver IC 90 is configured to control a subset of data lines 66 and/or gate lines 64.

In operation, the source driver IC 90 receives image data 92 from the processor core complex 12 or discrete display controller and outputs signals to control the unit pixels 62 based on the received data. When the unit pixel 62 is controlled by the source driver IC 90, circuitry within the unit pixel 62 can complete a loop between the power supply 98 and the optical elements of the unit pixel 62. Additionally, to measure operating parameters of the display 18, a measurement circuit 100 may be positioned within the source driver IC 90 to read various voltage and current characteristics of the display 18, as discussed in detail below.

The measurement results (or other information) from measurement circuit 100 may be used to determine offset data (e.g., 62A-62F) for individual pixels. The offset data may represent non-uniformities between pixels, such as: adjacent pixels have similar data but differ in brightness, color non-uniformity between adjacent pixels, and pixel row non-uniformity, pixel column non-uniformity, and the like. In addition, offset data may be applied to the data (e.g., 62A-62F) of the control pixels, resulting in compensated pixel data that may effectively remove these inconsistencies.

With this in mind, FIG. 8 illustrates a block diagram of a process 150 for external compensation and subsequent processing 151 of pixels 62 at display 18, according to one embodiment. Circuitry such as a system on a chip (SOC)152 may be used to pre-process the pixel data before it reaches the display panel 60. The pixel data in SOC 152 is in the digital processing domain. On the SOC 152 side, offset data 154 representing non-uniformity or mismatch between the pixels 62 is added 155 to the gradation data 156 (voltage value) of the pixels, which is determined using N-byte input data 158. This addition of the offset data 154 to the gradation data 156 results in offset gradation data having N + M bytes per pixel. The offset gray scale data is mapped to the gamma domain as shown in block 159. This process 150 is performed for each pixel 62 of the display panel 60. Then, the mapping offset gradation data 160 (e.g., external compensation data for each pixel 62) for each pixel 62 is supplied 161 to the display panel 60.

Then, the display panel 60 may perform the display panel 60 process 151. First, the display panel 60 may perform a linear digital-to-analog conversion, converting data 160 from the grayscale data (G) to a voltage (v)162 (e.g., via a gamma DAC 163), as indicated by block 164. A voltage 162 may be applied to the drive TFT 165, resulting in a current (I)166, as shown in block 168. Current 166 is then applied to the diode of pixel 62 to produce output light or luminance (Lv)170 at diode 171 of pixel 62, as indicated at block 172.

The conversion in SOC 152 may be complex and may sometimes lead to additional errors. These errors may result in non-uniformity (e.g., color mismatch, etc.) of the pixels 62. Furthermore, the increase in input data size (e.g., N + M bytes of data) may result in an interface that uses a higher bandwidth, and therefore, uses more power, and a higher accuracy to be processed by the DAC 163.

In some implementations, it may be beneficial to apply offset information in the driver integrated circuit for pixel compensation. Fig. 9 illustrates such an embodiment of circuit 200, where the offset data is applied in the driver integrated circuit, rather than in SOC 152 or pixel 62. As described above, in the embodiment of fig. 8, SOC 152 is modified to allow offset data 154 to be added 155 to grayscale data 156. In addition, since the embodiment of fig. 8 performs processing in the digital domain, a linear DAC is used to convert the digital gray data 160 to a voltage. In other words, the non-linear data is mapped to the linear data first and then returned to the non-linear data. Accordingly, the implementation of fig. 9 with offset data 154 addition in driver IC 94 may be beneficial because the display pipeline architecture may not be affected by external compensation. For example, SOC 152 and pixel 62 may remain unchanged. In addition, as shown in FIG. 9, two parallel interfaces may send pixel 62 data 158 and offset data 154 on a pixel 62 basis, thereby increasing processing speed.

To perform the external compensation, a circuit is added to perform the external compensation operation of the driver IC 94 provided in the dashed box 204. As shown in fig. 9, the data 158 for each pixel 62 is provided to a non-linear gamma DAC 205. The offset data 154 for each pixel 62 is provided serially or in parallel to a linear offset DAC 206 of the driver IC 94. The digital-to-analog conversion results in analog offset information (Vth information) 208. The Vth information 208 is added to the output voltage of the DAC 205 in the driver IC 94 via an add 210 function. The compensation voltage is passed from the add 210 function to the pixel 62 where a voltage is applied to the drive TFT 165, resulting in the current 166 (block 168). Current 166 is applied to diode 171, thereby producing light or luminance (Lv)170 emitted by diode 171.

The process of fig. 9 can be done in both the current domain and the voltage domain. Fig. 10 shows a circuit 230 for implementing the process of fig. 9 in the current domain. In the circuit 230 of fig. 10, each of the processing steps and circuit components are similar to fig. 9, except that the non-linear gamma DAC 205 'and the linear offset DAC 206' are both in current mode. In addition, since the driving TFT 165 operates with voltage, the current-voltage (I2V) conversion circuit 232 may convert the compensation current into voltage to supply the voltage to the TFT 165. In some implementations, prior to the adding 210, current-to-voltage conversion may occur in each of the DAC 205 and DAC 206 outputs.

Turning now to voltage domain implementations, there are a number of techniques that can be implemented to bias voltage data in a driver IC. In one implementation, an operational amplifier (OPAMPS) may be used to add the voltage outputs of both DAC 205 and DAC 206. However, this approach may utilize more power and circuit area, as additional amplifiers may be used per pixel 62.

Alternatively or additionally, in some embodiments, the offset DAC 206 may be embedded in the source driver IC 90. As described above, the source driver IC 90 drives each of the columns of pixels 62. Fig. 11 and 12 show embodiments in which the offset DAC 206 is embedded in the source driver IC 90. As shown in circuit 250 of fig. 11, gamma DAC 205 may provide an input voltage (Vin) for source driver IC 90. In addition, offset DAC 206' and resistor 252 are electrically coupled to feedback path 254 of source driver IC 90. Resistor 252 may utilize a programmable resistance value defined by a Voltage Offset (VOFFSET). Using this configuration, the sum of the offset DAC 206' and the gamma DAC 205, as well as the current-to-voltage conversion (I2V), may be provided, as indicated by block 256.

Fig. 12 shows a circuit 270 implementing the embedded offset DAC 206' technique of fig. 11, with trimming using the segmented current provided to the feedback path 254 of the source driver IC 90. As shown, the

current outputs

272 and 274 coupled to the feedback path 254 are segmented and isolated. Corresponding resistors 252' and 252 "are used for the respective segmented

current outputs

272 and 274, respectively. While the current embodiment shows two segmented

current outputs

272 and 274, any number of current segments may be used, depending on the trimming requirements.

In some implementations, both the gamma DAC 205 and the offset DAC 206 provide voltages. Fig. 13 shows a circuit for adding a gamma DAC 205 and an offset DAC 206 according to an embodiment. As shown in fig. 13, the voltage of the γ DAC 205 is halved and supplied as the input voltage (Vin1/2) to the source driver IC 90. Resistor 302 is applied to offset DAC 206 and resistor 304 is applied to feedback path 254 of source driver IC 90. The offset DAC 206 with the resistor 302 applied is embedded in the feedback 254 after the resistor 304. With this configuration, the output 306 is the offset DAC 206 output added to the gamma DAC 205 output.

While the specific embodiments described above have been shown by way of example, it should be understood that these embodiments may be susceptible to various modifications and alternative forms. It should be further understood that the claims are not intended to be limited to the particular forms disclosed, but rather to cover all modifications, equivalents, and alternatives falling within the spirit and scope of this disclosure.

Claims

1. An electronic device, comprising:

a display panel, the display panel comprising:

a plurality of pixels, each of the plurality of pixels comprising:

a driving Thin Film Transistor (TFT) configured to receive pixel data of a corresponding pixel; and

a light emitting diode configured to emit light based on the pixel data supplied to the corresponding pixel; and

a processing unit, the processing unit comprising:

a gamma digital-to-analog converter (DAC) configured to receive pixel data;

an offset DAC configured to receive offset data;

a feedback path comprising a programmable resistor, wherein the feedback path comprises an output from the offset DAC; and

a driver Integrated Circuit (IC) configured to provide compensated pixel data by adding an output of the gamma DAC to an output of the feedback path, wherein the driver IC is configured to apply the compensated pixel data to each of the plurality of pixels, wherein the light emitting diode is configured to emit light based on the compensated pixel data.

2. The electronic device of claim 1, wherein the offset data is added to the pixel data in a system-on-chip (SOC) resulting in offset pixel data.

3. The electronic device of claim 2, wherein the electronic device is configured to map the offset pixel data to a gamma domain in the processing unit resulting in offset grayscale data to be provided to the display panel.

4. The electronic device of claim 3, wherein the electronic device,

wherein the gamma DAC is configured to convert the offset gray scale data into voltage data; and

wherein the voltage data is applied to the driving TFT, resulting in a current applied to the light emitting diode, thereby causing the light emitting diode to emit light.

5. The electronic device of claim 1, wherein the compensated pixel data comprises a compensated voltage measurement that is applied to the drive TFT resulting in a current being applied to the light emitting diode, thereby causing the light emitting diode to emit light.

6. The electronic device of claim 1, comprising:

one or more operational amplifiers configured to add an output of the gamma DAC and an output of the offset DAC.

7. The electronic device of claim 1, wherein the compensation pixel data comprises a compensation current measurement that is converted to a compensation voltage measurement that is applied to the drive TFT resulting in a current applied to the light emitting diode, thereby causing the light emitting diode to emit light.

8. The electronic device of claim 1, comprising a second programmable resistor disposed in the feedback path,

wherein an output of the offset DAC is segmented into a plurality of currents provided to the feedback path.

9. A method of operating an electronic device having a display panel, comprising:

prior to providing pixel data to a plurality of pixels of the display panel of the electronic device, applying offset data to pixel data of each of the plurality of pixels to obtain compensated pixel data by:

a gamma digital-to-analog converter DAC supplying the pixel data to the source driver; and

providing offset data to an offset DAC of a source driver, wherein an output of the gamma DAC is configured to cause a feedback path including a programmable resistor to generate a current, wherein the source driver is configured to provide compensated pixel data by adding the current to the output of the offset DAC;

applying compensation voltage data based on the compensation pixel data at a driving thin film transistor TFT of each of the plurality of pixels, thereby generating a compensation current; and

applying the compensation current to a corresponding diode of each of the plurality of pixels.

10. The method of claim 9, comprising applying the offset data to pixel data in a processing unit of the electronic device.

11. The method of claim 9, comprising applying the offset data to pixel data in a driving Integrated Circuit (IC) of the electronic device.

12. The method of claim 11, comprising:

when the compensation pixel data includes a current, the current is converted into a compensation voltage.

13. An electronic display circuit comprising:

a display panel having a processing unit, the processing unit comprising:

a gamma digital-to-analog converter (DAC) configured to receive pixel data;

an offset DAC configured to receive offset data;

a first driver Integrated Circuit (IC) configured to receive a halved output from the gamma DAC; and

a feedback path comprising a first programmable resistor, wherein the feedback path is configured to receive the doubled voltage output from the offset DAC through an electrical coupling with a second programmable resistor; and

wherein the processing unit is configured to apply offset data from the first driver IC to pixel data of each of a plurality of pixels of the display panel before providing the pixel data to the plurality of pixels such that a compensation voltage is applied to the driving thin film transistor TFT of each pixel, thereby generating a compensation current applied to the light emitting diode of each pixel.

14. The electronic display circuit of claim 13, comprising a second driver IC comprising the processing unit.

15. The electronic display circuit of claim 13, wherein first driver IC comprises the offset DAC.

16. The electronic display circuit of claim 15, wherein the offset DAC, the gamma DAC, or both are configured to operate in a current mode to output a current.

17. The electronic display circuit of claim 16, comprising:

a current conversion circuit configured to convert the current to the compensation voltage.