CN108848350A - High concurrent HD video processing technique based on ARM framework - Google Patents

High concurrent HD video processing technique based on ARM framework Download PDF

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Publication number
CN108848350A
CN108848350A CN201810795165.0A CN201810795165A CN108848350A CN 108848350 A CN108848350 A CN 108848350A CN 201810795165 A CN201810795165 A CN 201810795165A CN 108848350 A CN108848350 A CN 108848350A
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CN
China
Prior art keywords
video
data
arm framework
processing method
high concurrent
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Pending
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CN201810795165.0A
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Chinese (zh)
Inventor
周亚洲
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Guangzhou Qinglu Education Technology Co ltd
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Guangzhou Qinglu Education Technology Co ltd
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Priority to CN201810795165.0A priority Critical patent/CN108848350A/en
Publication of CN108848350A publication Critical patent/CN108848350A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/18Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/44Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs
    • H04N21/4402Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/80Generation or processing of content or additional data by content creator independently of the distribution process; Content per se
    • H04N21/83Generation or processing of protective or descriptive data associated with content; Content structuring
    • H04N21/845Structuring of content, e.g. decomposing content into time segments
    • H04N21/8456Structuring of content, e.g. decomposing content into time segments by decomposing the content in the time domain, e.g. in time segments

Abstract

The present invention provides a kind of high concurrent HD video processing method based on ARM framework, including:High definition video steaming is decoded to obtain the video circulation road of 8 bits;Extract the data of 8 × N-bit position before each video circulation road;Video flowing fragment data is subjected to XOR operation by the register that cpu data channel is put into CPU and obtains result;Obtain new pixel characteristic vector value;Obtain multiple groups pixel characteristic vector value;Judge whether the pixel characteristic vector value of accumulation is more than the threshold value of setting, if being more than the threshold value then outputting video streams of setting;It generates and exports the high definition video steaming based on real time streaming transport protocol.Video flowing slice compression processing is carried out using the pretreated mode in preamble bit, video flowing is read in advance, the processing such as slice, recombination, to increase the compression ratio of outputting video streams, in the case where guaranteeing same video quality, video delay can be made to reduce to 100ms hereinafter, to ensure that the low latency and high concurrent of video playing.

Description

High concurrent HD video processing technique based on ARM framework
Technical field
The invention belongs at technical field of video compression more particularly to a kind of high concurrent HD video based on ARM framework Reason method.
Background technique
It in many application scenarios, needs in real time to be acquired high definition video steaming, by the compression that decodes and encode Reason, and played in real time by net distribution into multiple connection terminals, it realizes that the high concurrent of multiple terminals plays, uses at present Based on time-division processing video compression technology H.264.But when accessing multiple terminals, total code stream can be greatly increased, it is conventional Way be that timesharing is handled using processor, this way will lead to that slowed-down video is higher, also not can guarantee the height of video playing Concurrently.
Summary of the invention
In view of this, the present invention provides a kind of high concurrent HD video processing method based on ARM framework, it is current to solve High concurrent HD video processing mode after the increased number to certain numerical value of access terminal, it will lead to concurrency significantly It reduces, while the technical issues of playout-delay significantly increases.
The present invention adopts the following technical scheme that:
In some alternative embodiments, a kind of high concurrent HD video processing method based on ARM framework is provided, is wrapped It includes:Extract calculating process;The extraction calculating process is repeated, multiple groups pixel characteristic vector value is obtained;Judge that the pixel of accumulation is special Whether sign vector value is more than the threshold value of setting, if being more than the threshold value then outputting video streams of setting;
The extraction calculating process includes:The data of 8 × N-bit position before each video circulation road are extracted, and carry out group Conjunction forms video flowing fragment data;Video flowing fragment data is put into the register of CPU by cpu data channel, and is called The arithmetic logic unit of CPU carries out XOR operation and obtains result;According to XOR operation as a result, obtaining new pixel characteristic vector Value.
In some alternative embodiments, it is described extract each video circulation road before 8 × N-bit position data process In, wherein N=3n, n are positive integer.
In some alternative embodiments, further include before this method:Acquire real-time high-definition video stream;To high definition video steaming It is decoded to obtain the video circulation road of 8 bits;
In some alternative embodiments, described that high definition video steaming is decoded with acquisition 8 video circulation roads Process includes:According to based on minimize differential signal transmission algorithm obtain video flowing each frame image pixel feature to Amount;Based on HDCP agreement and H.264 using the concurrent decoding algorithm of agreement is decoded feature vector;Decoding obtains each The feature vector of a pixel is the data of 24Bit, and the data of 24Bit are arranged by every 8Bit, can be obtained a 8Bit Video circulation road.
In some alternative embodiments, the process of the outputting video streams includes:According to the multiple groups pixel characteristic of acquisition Vector value is packaged using based on real time streaming transport protocol, is generated and is exported the HD video based on real time streaming transport protocol Stream.
In some alternative embodiments, the threshold value set as the 30 total pixels of frame image 80%.
Beneficial effect brought by the present invention:Video flowing slice compression processing is carried out using the pretreated mode in preamble bit, Video code flow is reduced, video flowing is read in advance, is sliced, recombinates etc. and handle, thus increase the compression ratio of outputting video streams, In the case where guaranteeing same video quality, video delay can be made to reduce to 100ms hereinafter, to ensure that video playing Low latency and high concurrent.
For the above and related purposes, one or more embodiments include being particularly described below and in claim In the feature that particularly points out.Certain illustrative aspects are described in detail in the following description and the annexed drawings, and its instruction is only Some modes in the utilizable various modes of the principle of each embodiment.Other benefits and novel features will be under The detailed description in face is considered in conjunction with the accompanying and becomes obvious, the disclosed embodiments be all such aspects to be included and they Be equal.
Detailed description of the invention
Fig. 1 is a kind of flow diagram of the high concurrent HD video processing method based on ARM framework of the present invention.
Specific embodiment
The following description and drawings fully show specific embodiments of the present invention, to enable those skilled in the art to Practice them.Other embodiments may include structure, logic, it is electrical, process and other change.Embodiment Only represent possible variation.Unless explicitly requested, otherwise individual components and functionality is optional, and the sequence operated can be with Variation.The part of some embodiments and feature can be included in or replace part and the feature of other embodiments.This hair The range of bright embodiment includes equivalent obtained by the entire scope of claims and all of claims Object.
As shown in Figure 1, in some illustrative embodiments, providing a kind of high concurrent HD video based on ARM framework Processing method, including:
101:Acquire real-time high-definition video stream.
102:High definition video steaming is decoded to obtain the video circulation road of 8 bits.
Step 102 specifically includes:
Firstly, according to based on minimum differential signal transmission (TMDS, Transition-minimized Differential signaling) agreement algorithm obtain video flowing each frame image pixel feature vector;
Based on HDCP agreement and H.264 then, using the concurrent decoding algorithm of agreement is decoded feature vector;
Finally, the feature vector for each pixel that decoding obtains is the data of 24Bit, by the data of 24Bit by every 8Bit is arranged, and can be obtained the video circulation road of a 8Bit, as follows:
(00110011)(01110011)(01010011)……。
103:The data of 8 × N-bit position before each video circulation road are extracted, and is combined and to form video flowing segments According to.
Wherein, 8 × N≤CPU word length, N=3n, n are positive integer, obtain n≤(CPU word length)/24 finally.It is assumed that (CPU word It is long)=32, n=1, can be obtained the data P of video flowing segment, wherein P=001100110111001101010011 at this time.
104:Video flowing fragment data is put into the register of CPU by cpu data channel, and the arithmetic of CPU is called to patrol It collects unit progress XOR operation and obtains result R, as a result R is as follows:
R=P ⊕ 111111111111111111111111, obtains R=110011001000110010101100.
Arithmetic logic unit is the component that various arithmetic sum logical operations are executed in computer, the basic behaviour of arithmetic unit Make include add, subtract, multiplication and division arithmetic, with or the logical operations such as non-, exclusive or, and displacement, compare and transmit etc. and operate, Arithmetic logic unit is the execution unit of central processor CPU.
105:According to XOR operation result R, new pixel characteristic vector value is obtained.
Step 103, step 104 and step 105 composition extract calculating process.
106:It repeats to extract calculating process, i.e. repeatedly step 103, step 104 and step 105, can be obtained multiple groups pixel Feature vector value R0R1…。
107:Judge accumulation pixel characteristic vector value whether be more than setting threshold value.The threshold value set is 30 frame image The 80% of total pixel, to guarantee video flowing at least 24 frames/second image frame per second.
108:If being more than the threshold value then outputting video streams of setting, otherwise return step 103.The process packet of outputting video streams It includes:It according to the multiple groups pixel characteristic vector value of acquisition, is packaged using based on real time streaming transport protocol, generates and export and be based on The high definition video steaming of real time streaming transport protocol.
It should also be appreciated by one skilled in the art that various illustrative logical boxs, mould in conjunction with the embodiments herein description Electronic hardware, computer software or combinations thereof may be implemented into block, circuit and algorithm steps.In order to clearly demonstrate hardware and Interchangeability between software surrounds its function to various illustrative components, frame, module, circuit and step above and carries out It is generally described.Hardware is implemented as this function and is also implemented as software, depends on specific application and to entire The design constraint that system is applied.Those skilled in the art can be directed to each specific application, be realized in a manner of flexible Described function, still, this realization decision should not be construed as a departure from the scope of protection of this disclosure.

Claims (6)

1. the high concurrent HD video processing method based on ARM framework, which is characterized in that including:
Extract calculating process;
The extraction calculating process is repeated, multiple groups pixel characteristic vector value is obtained;
Judge whether the pixel characteristic vector value of accumulation is more than the threshold value of setting, if being more than that the threshold value set then exports video Stream;
The extraction calculating process includes:
The data of 8 × N-bit position before each video circulation road are extracted, and is combined and to form video flowing fragment data;
Video flowing fragment data is put into the register of CPU by cpu data channel, and call the arithmetic logic unit of CPU into Row XOR operation obtains result;
According to XOR operation as a result, obtaining new pixel characteristic vector value.
2. the high concurrent HD video processing method according to claim 1 based on ARM framework, which is characterized in that described It extracts before each video circulation road during the data of 8 × N-bit position, wherein N=3n, n are positive integer.
3. the high concurrent HD video processing method according to claim 2 based on ARM framework, which is characterized in that the party Further include before method:
Acquire real-time high-definition video stream;
High definition video steaming is decoded to obtain the video circulation road of 8 bits.
4. the high concurrent HD video processing method according to claim 3 based on ARM framework, which is characterized in that described High definition video steaming is decoded to obtain the process of 8 video circulation roads and include:
According to the feature vector for each frame image pixel for obtaining video flowing based on the algorithm for minimizing differential signal transmission;
Based on HDCP agreement and H.264 using the concurrent decoding algorithm of agreement is decoded feature vector;
The feature vector for decoding each pixel obtained is the data of 24Bit, and the data of 24Bit are arranged by every 8Bit Column, can be obtained the video circulation road of a 8Bit.
5. the high concurrent HD video processing method according to claim 4 based on ARM framework, which is characterized in that described The process of outputting video streams includes:According to the multiple groups pixel characteristic vector value of acquisition, carried out using based on real time streaming transport protocol Encapsulation, generates and exports the high definition video steaming based on real time streaming transport protocol.
6. the high concurrent HD video processing method according to claim 5 based on ARM framework, which is characterized in that described The threshold value set as the 30 total pixels of frame image 80%.
CN201810795165.0A 2018-07-19 2018-07-19 High concurrent HD video processing technique based on ARM framework Pending CN108848350A (en)

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