CN108833945B - Method and device for simultaneously transmitting multiple TS streams by using single-channel DMA (direct memory Access) - Google Patents

Method and device for simultaneously transmitting multiple TS streams by using single-channel DMA (direct memory Access) Download PDF

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CN108833945B
CN108833945B CN201810713296.XA CN201810713296A CN108833945B CN 108833945 B CN108833945 B CN 108833945B CN 201810713296 A CN201810713296 A CN 201810713296A CN 108833945 B CN108833945 B CN 108833945B
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stream
packet
mark
streams
channel dma
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CN108833945A (en
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谢新辉
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Jinggangshan Electrical Appliance Co ltd
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Jinggangshan Electrical Appliance Co ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
    • H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
    • H04N21/236—Assembling of a multiplex stream, e.g. transport stream, by combining a video stream with other content or additional data, e.g. inserting a URL [Uniform Resource Locator] into a video stream, multiplexing software data into a video stream; Remultiplexing of multiplex streams; Insertion of stuffing bits into the multiplex stream, e.g. to obtain a constant bit-rate; Assembling of a packetised elementary stream
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/438—Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving MPEG packets from an IP network
    • H04N21/4385—Multiplex stream processing, e.g. multiplex stream decrypting
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/44—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs
    • H04N21/4402—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/222—Studio circuitry; Studio devices; Studio equipment
    • H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/265—Mixing

Abstract

The invention provides a method and a device for simultaneously transmitting multiple TS streams by using single-channel DMA (direct memory access), wherein the method comprises the following steps: changing the first bit of the TS packet of each TS stream into a mark ID, wherein the mark ID and the TS stream have a corresponding relationship; combining more than two TS streams to be processed into one TS stream and transmitting the TS stream through a single-channel DMA (direct memory access); and determining the TS stream to which the TS packet belongs according to the tag ID of the TS packet in the TS stream, restoring the tag ID to the original first bit, and sending the TS packet to an interrupt processing subprogram corresponding to the TS stream to which the TS packet belongs. The invention sets the mark ID and synthesizes more than two TS streams to be processed into one TS stream, and the mark ID is set to enable the CPU to judge which TS stream the TS packet in the synthesized TS stream belongs to in the multi-channel TS stream, thereby realizing the simultaneous transmission of the multi-channel TS streams through the single-channel DMA, and solving the technical problems of high cost and more occupied chip resources caused by the multi-channel DMA transmission required by the traditional multi-channel TS stream transmission.

Description

Method and device for simultaneously transmitting multiple TS streams by using single-channel DMA (direct memory Access)
Technical Field
The invention relates to the technical field of data transmission processing, in particular to a method and a device for simultaneously transmitting multiple TS streams by using single-channel DMA (direct memory access).
Background
In television transmission systems, the transmission of digital audiovisual data is widely carried out using standard TS streams. When a user watches and records a program, the user needs to obtain a television transmission signal through an antenna or a coaxial cable, and then performs frequency reduction and demodulation processing to obtain a TS (transport stream) containing audio and video program information. After obtaining one or more TS streams, the TS streams are usually forwarded to the CPU by the DMA for decoding.
DMA: direct Memory Access (DMA) is a Memory Access technique in computer science. It allows some hardware subsystems (computer peripherals) inside the computer to read and write the system memory independently and directly without the intervention of Central Processing Unit (CPU). DMA is a fast way of data transfer with the same degree of processor load. Many hardware systems use DMA, including hard disk controllers, graphics cards, network cards, and sound cards.
TS flow: the english name Transport Stream, also called Transport Stream, is a standard format for transmitting and storing various data including audio, video and communication protocols, and is used in digital television broadcasting systems, such as DVB, ATSC, IPTV, and the like.
The English name of the IP is the Intellectual Property, which is a modular way for realizing the functions of the integrated circuit and the FPGA. Chip design manufacturers design required functions into independent modules, and developers can build circuits by using the modules which are verified, so that the design progress can be greatly accelerated.
In the existing TS stream collection and forwarding technology, if forwarding of more than two TS streams is to be processed simultaneously, a multi-channel DMA or multiple DMAs are required, and these methods allocate a dedicated DMA channel to each TS stream, and the CPU processes TS data in a corresponding memory according to settings of the DMA.
In the prior art, a multichannel DMA or a plurality of DMAs are adopted to forward more than two TS streams, the design cost of the DMAs is very high, firstly, the IP of the multichannel DMA is complex to realize, and more chip resources are occupied than that of the single-channel DMA; secondly, due to the difference of the number of the TS streams, the DMA channel is modified, and the flexibility is insufficient.
Disclosure of Invention
The invention provides a method and a device for simultaneously transmitting multiple TS streams by using single-channel DMA (direct memory access), which are used for solving the technical problems of high cost and more occupied chip resources caused by the fact that the traditional transmission of the multiple TS streams needs multiple-channel DMA or multiple DMA transmissions.
The invention provides a method for simultaneously transmitting multiple TS streams by using single-channel DMA (direct memory access), which comprises the following steps:
s1: changing the first bit of the TS packet of each TS stream into a mark ID, wherein the mark ID and the TS stream have a corresponding relationship;
s2: combining more than two TS streams to be processed into one TS stream and transmitting the TS stream through a single-channel DMA (direct memory access);
s3: reading the mark ID of the TS packet in the TS stream transmitted by the single-channel DMA, determining the TS stream to which the TS packet belongs according to the mark ID, restoring the mark ID to the original first bit, and sending the TS packet to an interrupt processing subprogram corresponding to the TS stream to which the TS packet belongs.
Preferably, after the step S1 and before the step S2, the method further comprises:
x: more than two TS packets in the same TS stream are combined into one TS packet, and the start mark and the end mark of the TS packet are regenerated.
Preferably, after the step S2 and before the step S3, the method further comprises:
y: an interrupt is generated every a preset number of TS packets.
Preferably, the flag ID is a value i, where i represents the ith TS stream.
The invention provides a device for simultaneously transmitting multiple TS streams by using single-channel DMA, which comprises:
a flag module, configured to change a first bit of a TS packet of each TS stream into a flag ID, where the flag ID and the TS stream have a corresponding relationship;
the TS bus selector switch is used for combining more than two TS streams to be processed into one TS stream and transmitting the TS stream through a single-channel DMA (direct memory access);
and the CPU is used for reading the mark ID of the TS packet in the TS stream transmitted by the single-channel DMA, determining the TS stream to which the TS packet belongs according to the mark ID, restoring the mark ID to the original first bit, and sending the TS packet to the interrupt processing subprogram corresponding to the TS stream to which the TS packet belongs.
Preferably, the apparatus further comprises:
and the combination module is used for combining more than two TS packets in the same TS stream into one TS packet and regenerating the start mark and the end mark of the TS packet.
Preferably, the apparatus further comprises:
and the single-channel DMA is used for transmitting the TS stream and generating one interrupt to the CPU every a preset number of TS packets.
Preferably, the flag ID is a value i, where i represents the ith TS stream.
The invention provides a device for simultaneously transmitting multiple TS streams by using single-channel DMA, which comprises:
a memory to store instructions;
a processor coupled to the memory, the processor configured to perform a method implemented as described above based on instructions stored by the memory.
The invention provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method as described above.
According to the technical scheme, the invention has the following advantages:
the invention provides a method for simultaneously transmitting multiple TS streams by using single-channel DMA (direct memory access), which comprises the following steps: s1: changing the first bit of the TS packet of each TS stream into a mark ID, wherein the mark ID and the TS stream have a corresponding relationship; s2: combining more than two TS streams to be processed into one TS stream and transmitting the TS stream through a single-channel DMA (direct memory access); s3: reading the mark ID of the TS packet in the TS stream transmitted by the single-channel DMA, determining the TS stream to which the TS packet belongs according to the mark ID, restoring the mark ID to the original first bit, and sending the TS packet to an interrupt processing subprogram corresponding to the TS stream to which the TS packet belongs. The invention sets the mark ID and synthesizes more than two TS streams to be processed into one TS stream, and the mark ID is set to enable the CPU to judge which TS stream of the synthesized TS stream the TS packet belongs to and send the TS stream to the corresponding interrupt processing subprogram for processing, thereby realizing the simultaneous transmission of the multiple TS streams through the single-channel DMA, and solving the technical problems of high cost and more occupied chip resources caused by the need of multiple-channel DMA or multiple DMA transmission in the traditional transmission of the multiple TS streams.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
Fig. 1 is a flowchart of an embodiment of a method for simultaneously transmitting multiple TS streams using single-channel DMA according to the present invention;
FIG. 2 is a flow chart of another embodiment of a method for simultaneously transmitting multiple TS streams by using single-channel DMA according to the present invention;
fig. 3 is a schematic diagram for explaining tag IDs in another embodiment of the method for simultaneously transmitting multiple TS streams by using single-channel DMA according to the present invention;
fig. 4 is a schematic diagram illustrating a plurality of TS packets combined into one TS packet according to another embodiment of the method for simultaneously transmitting multiple TS streams by using single-channel DMA according to the present invention;
fig. 5 is a schematic diagram for explaining the transmission of multiple TS streams simultaneously by using single-channel DMA according to another embodiment of the method of the present invention;
fig. 6 is a schematic diagram for explaining CPU interrupt in another embodiment of the method for simultaneously transmitting multiple TS streams by using single-channel DMA according to the present invention.
Detailed Description
The invention provides a method and a device for simultaneously transmitting multiple TS streams by using single-channel DMA (direct memory access), which are used for solving the technical problems of high cost and more occupied chip resources caused by the fact that the traditional transmission of the multiple TS streams needs multiple-channel DMA or multiple DMA transmissions.
In order to make the objects, features and advantages of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the embodiments described below are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, an embodiment of a method for simultaneously transmitting multiple TS streams using single-channel DMA according to the present invention includes:
101: changing the first bit of the TS packet of each TS stream into a mark ID, wherein the mark ID and the TS stream have a corresponding relationship;
the first bit byte of the standard TS stream is fixed to 0x47 hexadecimal, which can be replaced with a flag ID.
The corresponding relationship may be that the identifier ID is a numerical value i, where i represents the ith TS stream, or the identifier ID is j, where j is calculated through a series of algorithms to obtain a numerical value i, where i represents the ith TS stream, which is not limited in this embodiment.
102: combining more than two TS streams to be processed into one TS stream and transmitting the TS stream through a single-channel DMA (direct memory access);
the execution block for this step may be a conventional flow bus switch.
103: reading the mark ID of the TS packet in the TS stream transmitted by the single-channel DMA, determining the TS stream to which the TS packet belongs according to the mark ID, restoring the mark ID to the original first bit, and sending the TS packet to an interrupt processing subprogram corresponding to the TS stream to which the TS packet belongs.
Each TS stream has its corresponding interrupt handling routine, and after the tag ID is restored to the original first bit, the interrupt handling routine can process the TS packet according to the normal flow of the prior art.
The invention sets the mark ID and synthesizes more than two TS streams to be processed into one TS stream, and the mark ID is set to enable the CPU to judge which TS stream of the synthesized TS stream the TS packet belongs to and send the TS stream to the corresponding interrupt processing subprogram for processing, thereby realizing the simultaneous transmission of the multiple TS streams through the single-channel DMA, and solving the technical problems of high cost and more occupied chip resources caused by the need of multiple-channel DMA or multiple DMA transmission in the traditional transmission of the multiple TS streams.
The above is a detailed description of an embodiment of the method for simultaneously transmitting multiple TS streams by using single-channel DMA, and another embodiment of the method for simultaneously transmitting multiple TS streams by using single-channel DMA according to the present invention is described in detail below.
Referring to fig. 2, another embodiment of a method for simultaneously transmitting multiple TS streams using single-channel DMA according to the present invention includes:
201: changing the first bit of the TS packet of each TS stream into a mark ID, wherein the mark ID and the TS stream have a corresponding relationship;
as shown in fig. 3, the first bit of the TS packet of each TS stream is changed to the flag ID of the TS stream, so that the processing flow at the back end can distinguish from which TS stream each packet comes. The tag ID is specifically a value i, where i represents the ith TS stream. Taking the ith TS stream as an example, the first byte 0x47 of all TS packets is replaced by a flag i.
202: combining more than two TS packets in the same TS stream into one TS packet, and regenerating the start and end marks of the TS packet;
as shown in fig. 4, a plurality of TS packets of each TS stream are combined into 1 long packet. The aim of this is to reduce the arbitration frequency of the TS bus of the TS flow switch, so as to reduce the clock frequency required by arbitration and the interruption times of the CPU.
203: combining more than two TS streams to be processed into one TS stream and transmitting the TS stream through a single-channel DMA (direct memory access);
referring to fig. 5, a plurality of TS streams are merged into one TS stream through the TS bus switch. Due to the processing of step 201 and step 202, this TS bus switch may be a conventional stream bus switch, and each TS stream has a buffer. When the bus arbitrates TS flow, the process is carried out according to the length of TS packets, when a TS packet end mark is detected, the arbitration is ended, and new arbitration is started. The synthesized 1 TS stream is transmitted to a memory and a CPU through single-channel DMA.
204: an interrupt is generated every a preset number of TS packets.
The single channel DMA is set to generate one interruption for a plurality of TS long packets, and because the step 202 synthesizes a plurality of TS packets into 1 long packet, the times of DMA interruption generation are reduced by times and the times of CPU interruption response are also reduced by times under the condition of equal TS stream transmission rate.
205: reading the mark ID of the TS packet in the TS stream transmitted by the single-channel DMA, determining the TS stream to which the TS packet belongs according to the mark ID, restoring the mark ID to the original first bit, and sending the TS packet to an interrupt processing subprogram corresponding to the TS stream to which the TS packet belongs.
Referring to fig. 6, in the CPU interrupt process, since the DMA has already sent data to the specified physical memory address, the CPU reads data from the corresponding address at each interrupt. When the first bit is read as i, the CPU judges that this is a packet of the ith TS stream, then restores it to 0x47, and then gives the restored TS packet to the corresponding interrupt processing subroutine.
Therefore, the embodiment of the invention can utilize the improved TS stream to enable a single channel DMA to simultaneously process and transmit a plurality of TS streams. Firstly, a flag bit is added to the TS packet of each TS stream, and the flag bit is placed on the bit of the first TS packet. And combining a plurality of new TS packets into a TS long packet, and regenerating the start and end marks of the packet. All TS flows are synthesized into a TS flow and then sent to a DMA, the DMA generates interruption and sends the interruption to a CPU for processing, the CPU judges a zone bit firstly, then recovers the zone bit and calls an interruption processing subprogram of each TS flow.
The invention marks and repackages the TS stream, so that a plurality of TS streams can be transmitted and processed simultaneously by using single-channel DMA. Therefore, in FPGA design or integrated circuit design, multi-channel DMA is not required to be designed, and TS stream simultaneous processing and transmission can be completed by simply utilizing single-channel DMA.
The above is a detailed description of another embodiment of the method for simultaneously transmitting multiple TS streams by using single-channel DMA according to the present invention, and an embodiment of the apparatus for simultaneously transmitting multiple TS streams by using single-channel DMA according to the present invention will be described in detail below.
The invention provides an embodiment of a device for simultaneously transmitting multiple TS streams by using single-channel DMA, which comprises the following steps:
a flag module, configured to change a first bit of a TS packet of each TS stream into a flag ID, where the flag ID and the TS stream have a corresponding relationship;
the TS bus selector switch is used for combining more than two TS streams to be processed into one TS stream and transmitting the TS stream through a single-channel DMA (direct memory access);
and the CPU is used for reading the mark ID of the TS packet in the TS stream transmitted by the single-channel DMA, determining the TS stream to which the TS packet belongs according to the mark ID, restoring the mark ID to the original first bit, and sending the TS packet to the interrupt processing subprogram corresponding to the TS stream to which the TS packet belongs.
And the combination module is used for combining more than two TS packets in the same TS stream into one TS packet and regenerating the start mark and the end mark of the TS packet.
And the single-channel DMA is used for transmitting the TS stream and generating one interrupt to the CPU every a preset number of TS packets.
The tag ID is specifically a value i, where i represents the ith TS stream.
The following is a detailed description of another embodiment of the present invention, which provides an apparatus for simultaneously transmitting multiple TS streams using single-channel DMA.
Another embodiment of the present invention provides an apparatus for simultaneously transmitting multiple TS streams using single-channel DMA, including:
a memory to store instructions;
a processor coupled to the memory, the processor configured to perform a method implementing the embodiments described above based on instructions stored by the memory.
The following is a detailed description of a computer-readable storage medium provided by the present invention.
The present invention provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method of the above-described embodiments.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (6)

1. A method for simultaneously transmitting multiple TS streams using single channel DMA, comprising:
s1: changing the first byte of the TS packet of each TS stream into a mark ID, wherein the mark ID and the TS stream have a corresponding relationship;
x: combining more than two TS packets in the same TS stream into one TS packet, and regenerating the start and end marks of the TS packet;
s2: combining more than two TS streams to be processed into one TS stream and transmitting the TS stream through a single-channel DMA (direct memory access);
y: generating one interruption every a preset number of TS packets;
s3: reading the mark ID of the TS packet in the TS stream transmitted by the single-channel DMA, determining the TS stream to which the TS packet belongs according to the mark ID, restoring the mark ID to the original first byte, and sending the TS packet to an interrupt processing subprogram corresponding to the TS stream to which the TS packet belongs.
2. The method of claim 1, wherein the flag ID is a value i, where i represents the ith TS stream.
3. An apparatus for simultaneously transmitting multiple TS streams using single channel DMA, comprising:
the marking module is used for changing the first byte of the TS packet of each TS stream into a marking ID, and the marking ID and the TS stream have a corresponding relation;
the combination module is used for combining more than two TS packets in the same TS stream into one TS packet and regenerating the start mark and the end mark of the TS packet;
the TS bus selector switch is used for combining more than two TS streams to be processed into one TS stream and transmitting the TS stream through a single-channel DMA (direct memory access);
the single-channel DMA is used for transmitting TS stream and generating one interruption to the CPU every a preset number of TS packets;
and the CPU is used for reading the mark ID of the TS packet in the TS stream transmitted by the single-channel DMA, determining the TS stream to which the TS packet belongs according to the mark ID, restoring the mark ID to the original first byte, and sending the TS packet to the interrupt processing subprogram corresponding to the TS stream to which the TS packet belongs.
4. The device of claim 3, wherein the ID is a value i, where i represents the ith TS stream.
5. An apparatus for simultaneously transmitting multiple TS streams using single channel DMA, comprising:
a memory to store instructions;
a processor coupled to the memory, the processor configured to perform implementing the method of any of claims 1-2 based on instructions stored by the memory.
6. A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, which computer program, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 2.
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