CN108831379A - Pixel circuit and display panel - Google Patents

Pixel circuit and display panel Download PDF

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Publication number
CN108831379A
CN108831379A CN201811141283.6A CN201811141283A CN108831379A CN 108831379 A CN108831379 A CN 108831379A CN 201811141283 A CN201811141283 A CN 201811141283A CN 108831379 A CN108831379 A CN 108831379A
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China
Prior art keywords
node
switch
coupled
receiving
voltage
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CN201811141283.6A
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Chinese (zh)
Inventor
林钰凯
叶佳元
刘匡祥
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AU Optronics Corp
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AU Optronics Corp
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Publication of CN108831379A publication Critical patent/CN108831379A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Abstract

A pixel circuit includes a driving transistor, a first switch, a storage capacitor, and a light emitting unit. The driving transistor has a first terminal for receiving a system high voltage, a second terminal coupled to the first node, and a control terminal coupled to the second node. The first switch has a first terminal coupled to the first node, a second terminal coupled to the third node, and a control terminal for receiving a first control signal. The first terminal of the storage capacitor is coupled to the second node and is used for receiving the data voltage, and the second terminal is directly coupled to the third node and is used for receiving the reference voltage. The anode terminal of the light emitting unit is coupled to the third node, and the cathode terminal is used for receiving a system low voltage. A display panel is also provided.

Description

Pixel circuit and display panel
Technical field
Present disclosure in relation to a kind of pixel circuit and display panel, in particular to it is a kind of compensated in the way of feedback it is critical The pixel circuit and display panel of voltage.
Background technique
Low-temperature polysilicon film transistor (low temperature poly-silicon thin-film Transistor) have the characteristics that high carrier transport factor is small with size, be suitably applied high-resolution, narrow frame and low power consumption Display panel.Quasi-molecule laser annealing (excimer laser annealing) technology is widely used to be formed in industry at present The polysilicon membrane of low-temperature polysilicon film transistor.However, due to the scan power of each hair of excimer laser and unstable, The polysilicon membrane of different zones can have the difference of crystallite dimension and quantity.Therefore, low in the different zones of display panel The characteristic of warm polycrystalline SiTFT will be different.For example, the low-temperature polysilicon film transistor of different zones can have not Same critical voltage (threshold voltage), this phenomenon is known as critical voltage variation.
Traditional pixel circuit is by the circuit operation before shining, to detect and compensate the critical voltage that it drives transistor Variation.However, this compensation way needs complicated circuit structure and more control signal, it is also necessary to the additional operational phase To generate offset voltage.Therefore, traditional pixel circuit is unable to satisfy display narrow frame, high-resolution and high PPI now Many demands such as (pixels per inch).
In view of this, how to provide to control signal on a small quantity and can be operated, and without the simple pixel in operation bidirectional stage Circuit, actually industry problem to be solved.
Summary of the invention
Present disclosure provides a kind of pixel circuit.Pixel circuit include driving transistor, first switch, storage capacitance and Luminescence unit.Driving transistor includes first end, second end and control terminal, wherein the first end of driving transistor is for receiving system System high voltage, drives the second end of transistor to be coupled to first node, the control terminal of transistor is driven to be coupled to second node.The One switch includes first end, second end and control terminal, and wherein the first end of first switch is coupled to first node, first switch Second end is coupled to third node, and the control terminal of first switch is for receiving first control signal.Storage capacitance includes first end And second end, wherein the first end of storage capacitance is coupled to second node, and voltage for receiving data, and the second of storage capacitance End is coupled directly to third node, and for receiving reference voltage.Luminescence unit includes anode tap and cathode terminal, wherein anode tap It is coupled to third node, cathode terminal is for receiving system low-voltage.
Present disclosure separately provides a kind of display panel.Display panel include gate driving circuit, source electrode drive circuit and Multiple pixel circuits.Gate driving circuit is for providing first control signal.Source electrode drive circuit is for providing data voltage.It is more A pixel circuit is coupled to gate driving circuit and source electrode drive circuit.Each pixel circuit includes that transistor, first is driven to open Pass, storage capacitance and luminescence unit.Driving transistor includes first end, second end and control terminal, wherein the of driving transistor One end drives the second end of transistor to be coupled to first node, drives the control terminal coupling of transistor for receiving system high voltage It is connected to second node.First switch includes first end, second end and control terminal, and wherein the first end of first switch is coupled to first Node, the second end of first switch are coupled to third node, and the control terminal of first switch is for receiving first control signal.Storage Capacitor includes first end and second end, and wherein the first end of storage capacitance is coupled to second node, and voltage for receiving data, The second end of storage capacitance is coupled directly to third node, and for receiving reference voltage.Luminescence unit includes anode tap and yin Extremely, wherein anode tap is coupled to third node, and cathode terminal is for receiving system low-voltage.
Above-mentioned pixel circuit and display panel has framework is simple, operation signal quantity is few and the operational phase is few etc. Advantage.
Detailed description of the invention
For above and other purpose, feature, advantage and the embodiment of open file can be clearer and more comprehensible, the explanation of attached drawing It is as follows:
Fig. 1 is the simplified functional-block diagram of display panel according to one embodiment of present disclosure.
Fig. 2 is the circuit diagram according to the pixel circuit of Fig. 1 of one embodiment of present disclosure.
Fig. 3 is the operation timing diagram of the pixel circuit of Fig. 1 according to one embodiment of present disclosure.
The pixel circuit that Fig. 4 is Fig. 1 drives schematic diagram in the equivalent circuit of write phase.
The pixel circuit that Fig. 5 is Fig. 1 drives schematic diagram in the equivalent circuit of light emitting phase.
Description of symbols:
100:Display panel
110:Pixel circuit
112:Drive transistor
114:Write circuit
116:Luminescence unit
120:Source electrode drive circuit
130:Gate driving circuit
N1~N3:First node~third node
SW1~SW3:First switch~third switch
Cs:Storage capacitance
Idri:Driving current
CT1~CT2:First control signal~second control signal
T1:Write phase
T2:Light emitting phase
VDD:System high voltage
VSS:System low-voltage
Vdata:Data voltage
Vref:Reference voltage
V1~V3:First node voltage~third node voltage
Va:Anode tap voltage
Specific embodiment
Illustrate the embodiment of present disclosure below in conjunction with relevant drawings.In the accompanying drawings, identical label indicates phase Same or similar element or method flow.
It elaborates below according to present invention pixel circuit spy for embodiment cooperation attached drawing, but provided embodiment is not The range covered to limit the present invention.
Fig. 1 is the simplified functional-block diagram of display panel 100 according to one embodiment of present disclosure.Display panel 100 include multiple pixel circuits 110, source electrode drive circuit 120 and gate driving circuit 130, and multiple pixel circuits 110 couple In source electrode drive circuit 120 and gate driving circuit 130.To make simplified form and ease of explanation, other in display panel 100 Element and connection relationship do not show that in Fig. 1.
Each pixel circuit 110 receives data voltage Vdata from source electrode drive circuit 120, and from gate driving circuit 130 receive first control signal CT1 and second control signal CT2, and according to data voltage Vdata, first control signal CT1 and Second control signal CT2 is operated.
Fig. 2 is the circuit diagram according to the pixel circuit 110 of Fig. 1 of one embodiment of present disclosure.Pixel circuit 110 Include driving transistor 112, write circuit 114, first switch SW1, storage capacitance Cs and luminescence unit 116.Drive crystal Pipe 112 includes first end, second end and control terminal, wherein the first end of driving transistor 112 is for receiving system high voltage VDD, the second end of driving transistor 112 are coupled to first node N1, and the control terminal of driving transistor 112 is coupled to second node N2。
First switch SW1 includes first end, second end and control terminal, and wherein the first end of first switch SW1 is coupled to the One node N1, the second end of first switch SW1 are coupled to third node N3, and the control terminal of first switch SW1 is used to drive from grid Dynamic circuit 130 receives first control signal CT1.
Storage capacitance Cs includes first end and second end, and wherein the first end of storage capacitance Cs is coupled to second node N2, And voltage Vdata for receiving data.The second end of storage capacitance Cs is then coupled directly to third node N3, and for receiving ginseng Examine voltage Vref.
Luminescence unit 116 includes anode tap and cathode terminal, and anode tap is coupled to third node N3, and cathode terminal is then used to receive System low-voltage VSS.
In other words, the anode tap of luminescence unit 116 is coupled directly to the second end and first switch SW1 of storage capacitance Cs Second end.
Write circuit 114 is coupled to second node N2 and third node N3, and for receiving number from source electrode drive circuit 120 According to voltage Vdata.Write circuit 114 is also used to the mode of operation according to pixel circuit 110, decides whether to provide data voltage Vdata to second node N2, and reference voltage Vref whether is provided to third node N3.
In the present embodiment, write circuit 114 includes second switch SW2 and third switch SW3.Second switch SW2 includes First end, second end and control terminal, wherein the first end of second switch SW2 is used to receive data electricity from source electrode drive circuit 120 Vdata is pressed, the second end of second switch SW2 is then coupled to second node N2.
Third switch SW3 includes first end, second end and control terminal, and the first end of third switch SW3 is for receiving reference Voltage Vref, the second end of third switch SW3 are coupled to third node N3.Wherein, the control terminal and third of second switch SW2 is opened The control terminal for closing SW3 is all used to receive second control signal CT2 from gate driving circuit 130.
In the present embodiment, driving transistor 112 is for providing the anode tap of driving current Idri to luminescence unit 116. Also, drive transistor 112 that can determine the size of driving current Idri, so that luminescence unit 116 generates the brightness of specific grey-scale.
In implementation, driving transistor 112, first switch SW1, second switch SW2 and third switch SW3 can be thin with p-type Film transistor or other suitable transistors are realized.Luminescence unit 116 can then use Organic Light Emitting Diode (organic Light-emitting diode) or micro- light emitting diode (micro light-emitting diode) etc. luminescent material It realizes, so the present invention is not limited thereto.
Fig. 3 is the time sequences figure of the pixel circuit 110 of Fig. 1 according to one embodiment of present disclosure.It below will be with Fig. 2 Fig. 3 arrange in pairs or groups to further illustrate the function mode of pixel circuit 110.As shown in figure 3, in write phase T1, the first control letter Number CT1 is forbidden energy level (for example, high-voltage level), and second control signal CT2 is enable level (for example, low-voltage is electric It is flat).Therefore, first switch SW1 is in an off state, and second switch SW2 and third switch SW3 are in the conductive state.
The pixel circuit 110 that Fig. 4 is Fig. 1 drives schematic diagram in the equivalent circuit of write phase T1.As shown in figure 4, data Voltage Vdata can be transferred to second node N2 by second switch SW2, so that the second node voltage V2 of second node N2 is equal to Data voltage Vdata.Reference voltage Vref can be transferred to third node N3 by third switch SW3, so that third node N3 Third node voltage V3 is equal to reference voltage Vref.
In the present embodiment, reference voltage Vref is lower than system low-voltage VSS, so luminescence unit 116 can be made in write-in It is maintained at off state in stage T1, to increase the contrast of display panel 100.
Then, in light emitting phase T2, first control signal CT1 is enable level, and second control signal CT2 is forbidden energy Level.Therefore, first switch SW1 is in the conductive state, and second switch SW2 and third switch SW3 are in an off state.
In the light emitting phase T2 of the present embodiment, second control signal CT2 first can switch to forbidden energy level from enable level, Then first control signal CT1 just switches to enable level from forbidden energy level.However, present disclosure is not limited thereto, In some embodiments, while first control signal CT1 switches to enable level from forbidden energy level, second control signal CT2 meeting Forbidden energy level is switched to from enable level.
The pixel circuit 110 that Fig. 5 is Fig. 1 drives schematic diagram in the equivalent circuit of light emitting phase T2.As shown in figure 5, driving Transistor 112 can provide driving current Idri to third node N3 so that luminescence unit 116 is connected.Therefore, third node voltage V3 It can be the anode tap voltage Va of luminescence unit 116 by reference voltage Vref variation.
Since second node N2 is in floating (floating), so the variable quantity of third node voltage V3 can pass through The capacitance coupling effect of storage capacitance Cs is transferred to second node N2, so that second node voltage V2 can be by light emitting phase T2 It is below《Formula 1》It indicates:
V2=Vdata+Va-Vref《Formula 1》
Therefore, driving current Idri can be by following《Formula 2》It indicates:
Wherein, k indicates the list of the carrier transport factor (carrier mobility) of driving transistor 112, grid oxic horizon Position capacitance size and the product of grid breadth length ratio three, Vth then indicate the critical voltage of driving transistor 112.
By《Formula 2》It is found that the size of driving current Idri is related with the driving critical voltage of transistor 112.In addition, hair The anode tap voltage Va of light unit 116 can change with the size for the driving current Idri for flowing through luminescence unit 116.
Therefore, make driving current when the critical voltage of driving transistor 112 includes critical voltage variation amount Δ Vth When the size of Idri changes, third node voltage V3 can generate node voltage amount of variability Δ Va.In the case, third node electricity Pressure V3 needs to change by below in light emitting phase T2《Formula 3》It indicates:
V3=Va+ Δ Va《Formula 3》
Node voltage amount of variability Δ Va can also be transferred to second node N2 by the capacitance coupling effect of storage capacitance Cs, make Obtain second node voltage V2 needs to change by below in light emitting phase T2《Formula 4》It indicates:
V2=Vdata+Va-Vref+ Δ Va《Formula 4》
In summary, when driving the critical voltage variation of transistor 112, driving current Idri is needed in light emitting phase T2 Change by below《Formula 5》It indicates:
《Formula 5》
In the present embodiment, node voltage amount of variability Δ Va is positively correlated with the driving current Idri for flowing through luminescence unit 116 Size.Also, by《Formula 5》It is found that the size negative of driving current Idri is about critical voltage variation amount Δ Vth.Therefore, it saves Point voltage amount of variability Δ Va negative is about critical voltage variation amount Δ Vth, and node voltage amount of variability Δ Va and critical voltage become Corresponding relationship between different amount Δ Vth can be used for compensating influence of the critical voltage variation amount Δ Vth to driving current Idri.
For example, making driving current Idri inclined when driving transistor 112 has biggish critical voltage variation amount Δ Vth When low, node voltage amount of variability Δ Va can be smaller.At this point, lesser node voltage amount of variability Δ Va can be returned via storage capacitance Cs It awards to second node N2, so that driving transistor 112 has biggish source/drain voltage difference, so that driving current Idri rises.
In another example making driving current Idri when driving transistor 112 has lesser critical voltage variation amount Δ Vth When higher, node voltage amount of variability Δ Va can be larger.At this point, biggish node voltage amount of variability Δ Va can be via storage capacitance Cs It is fed back to second node N2, so that driving transistor 112 has lesser source/drain voltage difference, so that driving current Idri decline.
In other words, make the driving transistor 112 positioned at 100 different zones of display panel that there is different critical voltages, The driving current Idri that these driving transistors 112 provide can still have the corresponding relationship of early-fixed with data voltage Vdata.
In certain embodiments, first switch SW1, second switch SW2 and third switch SW3 are with N-type transistor come real It is existing.In the case, the enable level of first control signal CT1 and second control signal CT2 is high-voltage level, forbidden energy level It is then low voltage level.
Table one illustrates the intrinsic brilliance measurement knot of the display panel of 100 implementation of display panel according to above-described embodiment Fruit, wherein display panel is divided into the different region of a total of nine, and each region includes multiple pixels according to above-described embodiment The pixel circuit of 110 implementation of circuit.As shown in Table 1, nine different zones have respective brightness measurement number on display panel Value, wherein the unit of brightness measurement numerical value is nit (nit).
507.9 502.4 504.8
493.5 500.6 501.3
527.6 527.9 532.7
Table one
As shown in Table 1, display panel 100 and pixel circuit 110 are under high gray, in different points of display panel 100 Area can all provide brightness approximately.
Another intrinsic brilliance that table two illustrates the display panel of 100 implementation of display panel according to above-described embodiment is surveyed Measure result.Compared to the measurement example of table one, in the measurement example of table two, display panel is arranged to have lower ash Rank.
362.4 360.2 354.9
350.6 352.6 358.9
360.3 361.2 364.9
Table two
Another intrinsic brilliance that table three illustrates the display panel of 100 implementation of display panel according to above-described embodiment is surveyed Measure result.Compared to the measurement example of table two, in the measurement example of table three, display panel is arranged to have lower ash Rank.
152.7 150.3 149.6
146.3 150.9 151.5
148.3 150.6 151.8
Table three
Another intrinsic brilliance that table four illustrates the display panel of 100 implementation of display panel according to above-described embodiment is surveyed Measure result.Compared to the measurement example of table three, in the measurement example of table four, display panel is arranged to have lower ash again Rank.
29.6 29.5 29.3
28.7 30.1 29.7
28.6 28.9 29.5
Table four
By table one to table four it is found that display panel 100 and pixel circuit 110 are under different grayscale, in display panel 100 Different subregions the uniform display picture of similar brightness can be all provided.
In conclusion the circuit framework of pixel circuit 110 is simple, and with a small amount of at least two operation of operation signal collocation Stage is the critical voltage variation that can compensate for driving transistor 112.Therefore, display panel 100 can meet narrow frame, high PPI with And high-resolution etc. demand.
Some vocabulary is used in specification and claim to censure specific element.However, technical field Middle technical staff is, it is to be appreciated that same element may be called with different nouns.Specification and claim not with The difference of title but carrys out the benchmark as differentiation with the difference of element functionally as the mode for distinguishing element.Illustrating "comprising" mentioned by book and claim is open term, therefore should be construed to " including but not limited to ".In addition, " coupling Connect " herein comprising any direct and indirect connection means.Therefore, if it is described herein that first element is coupled to second element, then Second can be attached directly to by being electrically connected or being wirelessly transferred, and the signals connection type such as optical delivery by representing first element Element, or electrical property or signal are connected to the second element indirectly by other elements or connection means.
In addition, unless specified in the instructions, otherwise the term of any singular lattice all includes the connotation of multiple grid simultaneously.
The above is only the preferred embodiment of present disclosure, all equivalent changes done according to present disclosure claim with Modification, should all belong to the covering scope of present disclosure.

Claims (10)

1. a kind of pixel circuit, includes:
One driving transistor, includes a first end, a second end and a control terminal, wherein the first end of the driving transistor is used In receiving a system high voltage, the second end of the driving transistor is coupled to a first node, the control of the driving transistor End processed is coupled to a second node;
One first switch includes a first end, a second end and a control terminal, and wherein the first end of the first switch is coupled to The first node, the second end of the first switch are coupled to a third node, and the control terminal of the first switch is for receiving One first control signal;
One storage capacitance includes a first end and a second end, and wherein the first end of the storage capacitance is coupled to second section Point, and for receiving a data voltage, the second end of the storage capacitance is coupled directly to the third node, and for receiving one Reference voltage;And
One luminescence unit includes an anode tap and a cathode terminal, and wherein the anode tap is coupled to the third node, which uses In receiving a system low-voltage.
2. pixel circuit as described in claim 1 additionally comprises a write circuit, the write circuit is for providing the data voltage To the second node, and the reference voltage is provided to the third node.
3. pixel circuit as claimed in claim 2, wherein the write circuit includes:
One second switch includes a first end, a second end and a control terminal, and wherein the first end of the second switch is for connecing The data voltage is received, the second end of the second switch is coupled to the second node;And
One third switch includes a first end, a second end and a control terminal, and wherein the first end of third switch is for connecing The reference voltage is received, the second end of third switch is coupled to the third node;
Wherein, the control terminal of the control terminal He the third switch of the second switch is for receiving a second control signal.
4. pixel circuit as claimed in claim 3, wherein in a write phase, which is a forbidden energy level, The second control signal is an enable level.
5. pixel circuit as claimed in claim 4, wherein in a light emitting phase, which is the enable level, The second control signal is the forbidden energy level.
6. a kind of display panel, includes:
One gate driving circuit, for providing a first control signal;
One source electrode drive circuit, for providing a data voltage;
Multiple pixel circuits are coupled to the gate driving circuit and the source electrode drive circuit, wherein each pixel circuit includes:
One driving transistor, includes a first end, a second end and a control terminal, wherein the first end of the driving transistor is used In receiving a system high voltage, the second end of the driving transistor is coupled to a first node, the control of the driving transistor End processed is coupled to a second node;
One first switch includes a first end, a second end and a control terminal, and wherein the first end of the first switch is coupled to The first node, the second end of the first switch are coupled to a third node, and the control terminal of the first switch is for receiving The first control signal;
One storage capacitance includes a first end and a second end, and wherein the first end of the storage capacitance is coupled to second section Point, and for receiving the data voltage, the second end of the storage capacitance is coupled directly to the third node, and for receiving one Reference voltage;And
One luminescence unit includes an anode tap and a cathode terminal, and wherein the anode tap is coupled to the third node, which uses In receiving a system low-voltage.
7. display panel as claimed in claim 6, wherein the pixel circuit additionally comprises a write circuit, which uses In offer data voltage to the second node, and the reference voltage is provided to the third node.
8. display panel as claimed in claim 7, wherein the gate driving circuit also provides for a second control signal, And the write circuit includes:
One second switch includes a first end, a second end and a control terminal, and wherein the first end of the second switch is for connecing The data voltage is received, the second end of the second switch is coupled to the second node;And
One third switch includes a first end, a second end and a control terminal, and wherein the first end of third switch is for connecing The reference voltage is received, the second end of third switch is coupled to the third node;
Wherein, the control terminal of the control terminal He the third switch of the second switch is for receiving the second control signal.
9. display panel as claimed in claim 8, wherein in a write phase, which is a forbidden energy level, The second control signal is an enable level.
10. display panel as claimed in claim 9, wherein in a light emitting phase, which is enable electricity Flat, which is the forbidden energy level.
CN201811141283.6A 2018-07-26 2018-09-28 Pixel circuit and display panel Pending CN108831379A (en)

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CN103377619A (en) * 2012-04-23 2013-10-30 佳能株式会社 Display apparatus, driving apparatus for light-emitting devices, and image forming apparatus
CN103714777A (en) * 2012-09-28 2014-04-09 乐金显示有限公司 Organic light-emitting diode display device
CN104885145A (en) * 2012-12-11 2015-09-02 伊格尼斯创新公司 Pixel circuits for amoled displays
CN103150992A (en) * 2013-03-14 2013-06-12 友达光电股份有限公司 Pixel driving circuit
KR20150071366A (en) * 2013-12-18 2015-06-26 엘지디스플레이 주식회사 Organic light emitting display device with compensation function
CN104064149A (en) * 2014-07-07 2014-09-24 深圳市华星光电技术有限公司 Pixel circuit, display panel with pixel circuit and displayers
CN107393475A (en) * 2017-08-10 2017-11-24 京东方科技集团股份有限公司 Pixel-driving circuit, image element driving method and display device

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Application publication date: 20181116