CN108829977A - A kind of memristor voltage signal circuit and its method for generating memristor multichannel varying voltage signal - Google Patents
A kind of memristor voltage signal circuit and its method for generating memristor multichannel varying voltage signal Download PDFInfo
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- CN108829977A CN108829977A CN201810636153.3A CN201810636153A CN108829977A CN 108829977 A CN108829977 A CN 108829977A CN 201810636153 A CN201810636153 A CN 201810636153A CN 108829977 A CN108829977 A CN 108829977A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
Abstract
The invention discloses a kind of memristor voltage signal circuit and its methods for generating memristor multichannel varying voltage signal, including FPGA, digital analog converter and peripheral circuit, the FPGA to connect with the digital analog converter, and the FPGA is connect with host computer；The FPGA receives required signal from host computer, is grouped and stores；Clock signal needed for the FPGA generates the digital analog converter, and the signal stored before is input in the digital analog converter according to timing, after the analog signal generated passes through peripheral amplifying circuit amplification, it is transferred to memristor circuit.The present invention makes full use of the parallel feature of FPGA, multichannel unlike signal is generated for memristor circuit, and can eliminate the latency issue between unlike signal, thus the stationary problem between realizing signal.
Description
Technical field
The present invention relates to the communications field more particularly to a kind of memristor voltage signal circuit and its generate memristor multichannel not
With the method for voltage signal.
Background technique
The STEP-MXO2 second generation is the newest a FPGA development board that bound feet bifurcation team releases, and has selected Lattice company
MXO2 series larger capacity 4000HC product, logical resource improves nearly 4 times compared with generation product.Meanwhile in the back of board
Face is integrated with programmable device, it is only necessary to which a USB data line can complete the programming and downloading of FPGA, also, consider further that easy
With property, board peripheral hardware abundant is also provided, realizes the function of input/output.In addition it is also possible to which the corresponding position in board welds
2.54mm spacing row's needle is connected to be extended.
10 LTC660 are integrated with 8 accurate serial addressable digital-to-analogues and are turned using the miniature SSOP encapsulation of miniature 16 pin
Parallel operation (DAC).Each buffering DAC only absorbs the electric current of 56uA, is but capable of providing the output electric current more than 5mA, and reliably drive
The dynamic up to capacitive load of 1000pF.Total current is further dropped to negligible 1uA by sleep pattern.Linear Techn Inc.
Proprietary univoltage interpolation framework provides the super tall and erect linearity, and realizes abnormal small and exquisite outer shape.Ultralow electric current, it is energy-efficient
Sleep pattern and extremely compact outer dimension make LTC1660 be highly suitable to be applied for battery supply, simple and clear availability,
High-performance and Width funtion power range then make the excellent selection of universal converter.
Memristor, full name memory resistor (Memristor).It is the circuit devcie for indicating magnetic flux and charge relationship.Memristor
Device have resistance dimension, but with resistance unlike, the resistance value of memristor is determined by the charge for flowing through it.Therefore, pass through survey
Determine the resistance value of memristor, can know the quantity of electric charge for flowing through it, to play the role of remembering charge.Also, based on memristor
Integrated level, power consumption, the read or write speed of random access memory will be more superior than traditional random access memory.In addition, memristor is now
The best way of hardware realization artificial neural network cynapse.Due to the nonlinear wind vibration of memristor, chaos electricity can produce
Road, to also there is many applications in secret communication.
Existing memristor circuit is fewer, is especially able to satisfy and provides multichannel different voltage signal circuits for it.
Summary of the invention
Goal of the invention：In order to overcome the deficiencies in the prior art, the present invention provides a kind of generation based under FPGA
The method of memristor neuron circuit multichannel unlike signal realizes as memristor while generating the different electric signal in eight tunnels, saves
Component simplifies circuit, enhances real-time, improves the stability of system.
Technical solution：
A kind of memristor voltage signal circuit, including FPGA, digital analog converter and peripheral circuit, the FPGA with it is described
Digital analog converter connection, the FPGA are connect with host computer, and receive signal from the host computer；
The peripheral circuit includes the first amplifier U2A, the second amplifier U2B, third amplifier U2C, the 4th amplifier
U2D, the 5th amplifier U3A, the 6th amplifier U3B, the 7th amplifier U3C, the 8th amplifier U3D；Wherein：First amplification
Device U2A anode is connected with VoutA pin, and the second amplifier U2A anode is connected with VoutB pin, third amplifier U2A anode with
VoutC pin is connected, and the 4th amplifier U2A anode is connected with VoutD pin, the 5th amplifier U2A anode and VoutH pin phase
Even, the 6th amplifier U2A anode is connected with VoutG pin, and the 7th amplifier U2A anode is connected with VoutF pin, the 8th amplification
Device U2A anode is connected with VoutE pin；Vcc pin, REF pin, CLR pin and external eight in the peripheral circuit
Amplifying circuit connects 3.3V voltage source；The Vcc pin of the peripheral circuit is connected to the ground by 0.1uf capacitor, GND pin with
Ground is connected.
The amplifier of the peripheral circuit be the Vouta pin of the peripheral circuit, Voutb pin, Voutc pin,
An external LT491 amplifier is formed respectively for Voutd pin, Voute pin, Voutf pin and Voutg pin.
The Dout pin of the peripheral circuit is reserved, for detecting signal.
The FPGA is using Lattice XO2 chip, and the digital analog converter is using LTC1660 chip.
A method of it is specific as follows based on the generation memristor multichannel varying voltage signal under FPGA：The FPGA from
Signal required for host computer receives, is grouped and stores；Timing needed for the FPGA generates the digital analog converter
Signal, and the signal stored before is input in the digital analog converter according to timing, the analog signal generated passes through outer
After enclosing amplifying circuit amplification, it is transferred to memristor circuit.
The FPGA is using Lattice XO2 chip, and the digital analog converter is using LTC1660 chip；Institute
Lattice XO2 chip is stated according to LTC1660 handbook, the LTC1660 chip is generated by verilog HDL speech encoding
Required SCK signal and LD signal；The Lattice XO2 carries the crystal oscillator of 12MHz, more than the signal of required highest 3.85MHz
Frequency divides it to obtain the clock signal of 2MHz.
Using the included simulation software in Diamond software to progress time stimulatiom.
During the time stimulatiom, signal crawl is carried out by oscillograph.
Beneficial effect：The present invention makes full use of the parallel feature of FPGA, generates multichannel unlike signal for memristor circuit, and
The latency issue between unlike signal can be eliminated, thus the stationary problem between realizing signal.
Detailed description of the invention
Fig. 1 is entire block diagram of the invention；
Fig. 2 is circuit sequence analogous diagram of the invention；
Fig. 3 is peripheral circuit diagram of the invention.
Specific embodiment
The present invention will be further explained with reference to the accompanying drawing.
Memristor voltage signal circuit of the invention includes FPGA, digital analog converter and peripheral circuit, the FPGA with
The digital analog converter connection, the FPGA is connect with host computer, and receives signal from the host computer；What the FPGA was used
It is Lattice XO2 chip, for the digital analog converter using LTC1660, the peripheral circuit includes the first amplifier
U2A, the second amplifier U2B, third amplifier U2C, the 4th amplifier U2D, the 5th amplifier U3A, the 6th amplifier U3B,
Seven amplifier U3C, the 8th amplifier U3D；Wherein：The first amplifier U2A anode is connected with VoutA pin, the second amplification
Device U2A anode is connected with VoutB pin, and third amplifier U2A anode is connected with VoutC pin, the 4th amplifier U2A anode with
VoutD pin is connected, and the 5th amplifier U2A anode is connected with VoutH pin, the 6th amplifier U2A anode and VoutG pin
It is connected, the 7th amplifier U2A anode is connected with VoutF pin, and the 8th amplifier U2A anode is connected with VoutE pin.Such as Fig. 3
It is shown.
Vcc pin, REF pin, CLR pin and eight external amplifying circuits connect 3.3V in the peripheral circuit
Voltage source.
The Vcc pin of the peripheral circuit needs to be connected to the ground by 0.1uf capacitor, and GND pin is connected to the ground.
The amplifier of the peripheral circuit be the Vouta pin of the peripheral circuit, Voutb pin, Voutc pin,
An external LT491 amplifier is formed respectively for Voutd pin, Voute pin, Voutf pin and Voutg pin.
The Dout pin of the peripheral circuit is reserved, for detecting signal.
The Lattice XO2 carries the crystal oscillator of 12MHz, has been more than the signal frequency of highest 3.85MHz needed for us, because
We need to divide corresponding 2MHz for this, facilitate processing.Here, the present invention is divided using frequency division module,
The Lattice XO2 generates corresponding timing and order, provides signal for LTC1660；The timing is driving
LTC1660 chip, order is obtained from host computer, the two are realized by verilog HDL speech encoding；So
SCK signal and LD signal needed for regenerating LTC1660 chip afterwards pass through verilog HDL specifically according to LTC1660 handbook
Speech encoding；Pulse number is judged by counting rising edge (or failing edge), uses same clock as far as possible in this process,
Clocking error is avoided, brings unnecessary trouble to result.
The method of generation memristor multichannel varying voltage signal of the invention is specific as follows：The FPGA is received from host computer
Required signal, is grouped and stores；Clock signal needed for the FPGA generates the digital analog converter, and by it
The signal of preceding storage is input in the digital analog converter according to timing, and the analog signal generated is put by peripheral amplifying circuit
After big, it is transferred to memristor circuit.
Simulation software is carried in Diamond software carries out time stimulatiom, the logical problem for checking signal.And institute
It states time stimulatiom to need to carry out signal crawl by oscillograph in the process, for verifying prolonging between sequence problem and each signal
Shi Wenti.Specific simulation result is as shown in Figure 2.
The sequence of the input of signal is encoded according to following table, and different output ports is according to LTC1660 chip hand
Volume is encoded, and realizes sequentially inputting for signal；
Specific output port coding is as shown in the table：
| A3 | A2 | A1 | A1 | Port |
| 0 | 0 | 0 | 1 | VoutA |
| 0 | 0 | 1 | 0 | VoutB |
| 0 | 0 | 1 | 1 | VoutC |
| 0 | 1 | 0 | 0 | VoutD |
| 0 | 1 | 0 | 1 | VoutE |
| 0 | 1 | 1 | 0 | VoutF |
| 0 | 1 | 1 | 1 | VoutG |
| 1 | 0 | 0 | 0 | VoutH |
Fig. 3 is the peripheral circuit of LTC1660 chip, we first can carry out replication experiment with bread board, after success again
Draw pcb board.VoutA, VoutB, VoutC, VoutD, VoutE, VoutF, VoutG, VoutH output should meet following formula：
The above is only a preferred embodiment of the present invention, it should be pointed out that：For the ordinary skill people of the art
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered
It is considered as protection scope of the present invention.
Claims (8)
1. a kind of memristor voltage signal circuit, it is characterised in that：It is described including FPGA, digital analog converter and peripheral circuit
FPGA is connect with the digital analog converter, and the FPGA is connect with host computer；
The peripheral circuit include the first amplifier U2A, the second amplifier U2B, third amplifier U2C, the 4th amplifier U2D,
5th amplifier U3A, the 6th amplifier U3B, the 7th amplifier U3C, the 8th amplifier U3D；Wherein：First amplifier
U2A anode is connected with VoutA pin, and the second amplifier U2A anode is connected with VoutB pin, third amplifier U2A anode with
VoutC pin is connected, and the 4th amplifier U2A anode is connected with VoutD pin, the 5th amplifier U2A anode and VoutH pin phase
Even, the 6th amplifier U2A anode is connected with VoutG pin, and the 7th amplifier U2A anode is connected with VoutF pin, the 8th amplification
Device U2A anode is connected with VoutE pin；
Vcc pin, REF pin, CLR pin and external eight amplifying circuits connection 3.3V voltage electricity in the peripheral circuit
Source；The Vcc pin of the peripheral circuit is connected to the ground by 0.1uf capacitor, and GND pin is connected to the ground.
2. memristor voltage signal circuit according to claim 1, it is characterised in that：The amplifier of the peripheral circuit is
The Vouta pin of the peripheral circuit, Voutb pin, Voutc pin, Voutd pin, Voute pin, Voutf pin and
An external LT491 amplifier is formed Voutg pin respectively.
3. memristor voltage signal circuit according to claim 1, it is characterised in that：The Dout pin of the peripheral circuit
It is reserved, for detecting signal.
4. memristor voltage signal circuit according to claim 1, it is characterised in that：The FPGA using
Lattice XO2 chip, the digital analog converter is using LTC1660 chip.
5. a kind of side for generating memristor multichannel varying voltage signal using memristor voltage signal circuit described in claim 1
Method, it is characterised in that：It is specific as follows：The FPGA receives required signal from host computer, is grouped and stores；It is described
Clock signal needed for FPGA generates the digital analog converter, and the signal stored before is input to the digital-to-analogue according to timing
In converter, after the analog signal generated passes through peripheral amplifying circuit amplification, it is transferred to memristor circuit.
6. according to the method described in claim 5, it is characterized in that：The FPGA is described using Lattice XO2 chip
Digital analog converter is using LTC1660 chip；The Lattice XO2 chip passes through verilog according to LTC1660 handbook
SCK signal and LD signal needed for HDL speech encoding generates the LTC1660 chip；The Lattice XO2 carries 12MHz's
Crystal oscillator divides it to obtain the clock signal of 2MHz more than the signal frequency of required highest 3.85MHz.
7. according to the method described in claim 6, it is characterized in that：Using the included simulation software in Diamond software into
Row time stimulatiom.
8. according to the method described in claim 7, it is characterized in that：During the time stimulatiom, carried out by oscillograph
Signal crawl.
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| CN201810636153.3A CN108829977A (en) | 2018-06-20 | 2018-06-20 | A kind of memristor voltage signal circuit and its method for generating memristor multichannel varying voltage signal |
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| CN201810636153.3A CN108829977A (en) | 2018-06-20 | 2018-06-20 | A kind of memristor voltage signal circuit and its method for generating memristor multichannel varying voltage signal |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110428049A (en) * | 2019-08-21 | 2019-11-08 | 南京邮电大学 | A kind of voltage-type neural network and its operating method based on polymorphic memristor |
| CN112486076A (en) * | 2020-12-08 | 2021-03-12 | 长光卫星技术有限公司 | Clock synchronization and reset synchronization system among multiple FPGAs |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110428049A (en) * | 2019-08-21 | 2019-11-08 | 南京邮电大学 | A kind of voltage-type neural network and its operating method based on polymorphic memristor |
| CN112486076A (en) * | 2020-12-08 | 2021-03-12 | 长光卫星技术有限公司 | Clock synchronization and reset synchronization system among multiple FPGAs |
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Application publication date: 20181116 |