CN108809466A

CN108809466A - A kind of method of synchronous TTE networks and TTP bus network clocks

Info

Publication number: CN108809466A
Application number: CN201710317419.3A
Authority: CN
Inventors: 罗泽雄
Original assignee: China Aeronautical Radio Electronics Research Institute
Current assignee: China Aeronautical Radio Electronics Research Institute
Priority date: 2017-05-05
Filing date: 2017-05-05
Publication date: 2018-11-13

Abstract

The present invention relates to a kind of methods of synchronous TTE networks and TTP bus network clocks, using novel TTE structure avionics backbone networks and TTP as winged control, electromechanical and power supply dispatch control system bus, solves the problems, such as the real-time of the communication inside subsystem and deterministic, but the communication of cross-network segment still remains larger shake and causes transmission uncertain.Under the overall situation of mobile system synthesization and data fusion, there are the application demands of mass data communication between the system of cross-network segment, using the motive power for being forever technology development, on the basis of ensureing precise synchronization inside TTE and TTP bus network systems, it is proposed that the clock synchronous design method based on the TTE/TTP cross-network segments under time triggered framework.The present invention is to provide the global clock synchronizing function of across a network integral type, and time basis is provided for the time triggered communication of airborne-bus across a network.The present invention, which should transplant to trigger with other times in TTE networks, realizes that the high precision clock of across a network integral type is synchronous in the combined type network system of network, global clock is provided for the time triggered communication of this kind of cross-network segment, such as TTE is combined with TTCAN and switch type TTE combines network system with bus type TTE.

Description

A kind of method of synchronous TTE networks and TTP bus network clocks

Technical field

The invention belongs to the Clock Synchronization Technology field of airborne-bus in avionics system, more particularly to time triggered is logical Believe the clock synchronous design method of the cross-domain under framework.

Background technology

Using the network system based on event-triggered communication with aviation electronics field, since node Stochastic accessing transmissions are believed Road inevitably generates transmission competition, and the delay and shake brought by competition is uncontrollable, for some for time safety The application scenario of key demand harshness, the network system cannot be received.As avionics system is to time-critical Property and security critical distributed communication application demand it is growing, solve conventional network communications transmission uncertainty compel The eyebrows and eyelashes, using the uncertain of the network transmission solved well based on the time triggered communication on network global clock synchronous foundation Property and real-time.

TTE is a kind of time-triggered network under switched interconnection environment, it introduces high-precision on Basic Ethernet The distributed clock synchronization mechanism of degree, provides uncompetitive TT communications and efficient ET (Event-Triggered, event triggering) is logical Letter, ensure that the real-time and certainty of the different grades of security critical task of system.TTE networks are on the basis of time synchronization On plan and guide the activity of whole system according to the layout of scheduling of resource consistency, realize System Resources Sharing, effectively carry Resource utilization has been risen, system design and maintenance cost are considerably reduced；Keys of the TTP as aviation dcs One of network technology proves the value of itself in the application verification in 10 coming year of past, the technology from aero-engine control, seat Cabin system and power management are widely used to systems such as flight controls.The time-division multiple access (TDMA) (TDMA) of TTP Lothrus apterus Mode accesses, the time synchronization of high fault-tolerant ability, quick member response, communication intercept, quick fault testing is isolated and redundancy It is weak that design solves airborne control system anti-interference ability, the bottleneck problems such as fault-tolerant ability difference, improves data communication It is preferred to become aircraft safety key/mission critical system bus for efficiency and time determinability.

The design method of the airborne combinational network of original mainstream is using AFDX buses as avionics backbone network, 429 buses It is all made of event triggering as control network to carry out data transmission, be substituted using the novel compositions network architecture of TTE and TTP above-mentioned Scheme.The new network architecture solves the communication uncertain problem inside each network system, but TTE and TTP cross-network segments Communication, which still remains larger shake, leads to the uncertainty of transmission.In the overall situation of mobile system synthesization and data fusion Under, the data communication needs amount of cross-network segment will likely welcome the development of blowout, improve the real-time of the data communication of cross-network segment There is great strategic importance with certainty.

The design method of the traditional cross-network segment communicating in the airborne electronic equipment communications field is using AFDX buses as avionics backbone network Network, 429 buses can no longer meet airborne high real-time, the application demand that high deterministic data communicates as control network.

The present invention innovatively devises a kind of the complete of the integral type across TTE and TTP under the communication construction based on time triggered Office clock synchronizes, and realizes the synchronised clock of TTE networks to the biography of TTP buses in the principal and subordinate's time service mode for devising pulse signal It passs, TTP buses ensure that the overall situation across the integral type of TTE/TTP using the miscellaneous equipment in the master clock synchronization system transmitted Clock synchronizes, and time reference is provided for the data communication based on time triggered of cross-network segment.

Invention content

Goal of the invention

The global clock synchronizing function of across a network integral type is provided, when solving the time triggered communication of airborne-bus across a network The technical problem that clock can not synchronize.

Technical solution

A kind of method of synchronous TTE networks and TTP bus network clocks is given referring to Fig. 1, TTE networks are time triggered Switching network, including interchanger and TTE controllers；TTP bus network is static bus network, including TTP controllers, more A terminal and transfer bus；The TTE controllers constitute the gateway with TTP controllers；Gateway uses the IO of FPGA module Interface realizes the interconnection between the TTE network segments and the TTP network segments；

Gateway obtains the clock of the TTE network segments from TTE controllers, and gateway is sent out in each period of clock to TTP controllers Go out pulse signal, whenever TTP controllers collect a pulse signal, then the local synchronous clock of the TTP network segments is set as zero Moment point, and TTP controllers broadcast a pulse signal to the TTP network segments；Each terminal in TTP bus network is according to acquisition The pulse signal arrived is into row clock amendment.

The synchronised clock of TTE networks uses SAE AS6802 international standards.

Technique effect

The present invention by between two controllers in the gateway device in the design with the principal and subordinate time service side of pulse signal The synchronised clock of TTE networks is passed to TTP as the bus synchronous master clock by formula, and TTP is realized by the way of designing herein Clock inside bus synchronizes, and reaches the global clock synchronizing function of across a network.TTE controllers are adopted with TTP controllers in gateway With unified clock source, avoid two controllers using different crystal oscillators as clock source, clock drift rate, which has differences, to be caused Pulse signal transmission delay-non-determinism between synchronised clock deviation and two controllers.Pass through the master of above-mentioned impulse form From time service method, it sets the synchronised clock of TTE networks to the master clock source of TTP buses, the clock for completing across a network transmits.

Description of the drawings

The structural schematic diagram that a kind of clock of TTE to TTP across a networks of Fig. 1 synchronizes.

Specific implementation mode

The synchronised clock of TTE networks uses SAE AS6802 international standards.

It will be seen from figure 1 that a kind of method of synchronous TTE networks and TTP bus network clocks of the present invention, this method use The synchronised clock of TTE structures passes to TTP buses as master clock source, and TTP miscellaneous equipments are synchronized to the master clock source, by TTE The unified global clock of across a network, the data between TTE and TTP across a networks are synchronized to the respective clock of TTP bus network Transmission provides the global clock basis of time triggered.The technology passes through between two controllers in the gateway device in the design The synchronised clock of TTE networks is passed into TTP as the bus synchronous master clock, TTP in a manner of principal and subordinate's time service of pulse signal It realizes that the clock inside bus synchronizes by the way of designing herein, reaches the global clock synchronizing function of across a network.

TTE controllers use unified clock source with TTP controllers in gateway, and two controllers is avoided to use different crystal oscillators As clock source, clock drift rate, which has differences, causes pulse signal between synchronised clock deviation and two controllers to pass Defeated delay-non-determinism.By principal and subordinate's time service method of above-mentioned impulse form, it is total to set the synchronised clock of TTE networks to TTP The master clock source of line, the clock for completing across a network transmit.

Claims

1. a kind of method of synchronous TTE networks and TTP bus network clocks, TTE networks are the switching network of time triggered, packet Include interchanger and TTE controllers；TTP bus network is static bus network, including TTP controllers, multiple terminals and transmission are always Line；The TTE controllers constitute the gateway with TTP controllers；Gateway realizes the TTE network segments using the I/O interface of FPGA module With the interconnection between the TTP network segments；

Gateway obtains the clock of the TTE network segments from TTE controllers, and gateway sends out arteries and veins in each period of clock to TTP controllers Signal is rushed, whenever TTP controllers collect a pulse signal, then sets the local synchronous clock of the TTP network segments to zero moment Point, and TTP controllers broadcast a pulse signal to the TTP network segments；Each terminal in TTP bus network is according to getting Pulse signal is into row clock amendment.