CN108809133B - Capacitor voltage balance control method of active neutral point clamped five-level inverter - Google Patents

Capacitor voltage balance control method of active neutral point clamped five-level inverter Download PDF

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CN108809133B
CN108809133B CN201810470450.5A CN201810470450A CN108809133B CN 108809133 B CN108809133 B CN 108809133B CN 201810470450 A CN201810470450 A CN 201810470450A CN 108809133 B CN108809133 B CN 108809133B
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voltage
value
capacitor
current
action time
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CN108809133A (en
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朱俊杰
聂子玲
叶伟伟
吴延好
韩一
许杰
孙兴法
徐文凯
原景鑫
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Naval University of Engineering PLA
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H02M1/123—Suppression of common mode voltage or current

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Abstract

The invention discloses a capacitor voltage balance control method of an active neutral point clamped five-level inverter, wherein the active neutral point clamped five-level inverter comprises a supporting capacitor C1, a supporting capacitor C2, four input side bridge arms and two output side bridge arms, each input side bridge arm and each output side bridge arm respectively comprise two semiconductor switch devices, and the active neutral point clamped five-level inverter is subjected to supporting capacitor voltage balance control to obtain zero-sequence voltage; carrying out balance control on the voltage of the suspension capacitor on the active neutral point clamped five-level inverter to obtain a redundant state action time adjustment value dx; and obtaining an auxiliary modulation wave according to the zero sequence voltage and the redundant state action time adjustment value dx.

Description

Capacitor voltage balance control method of active neutral point clamped five-level inverter
Technical Field
The invention belongs to the technical field of power supplies, and particularly relates to a capacitor voltage balance control technology of an active neutral point clamped five-level inverter.
Background
With the continuous popularization of high-voltage high-power applications, the voltage class of the current semiconductor switching devices is limited, and the improvement of the output voltage class through multi-level output is an effective method, so that the multi-level inverter is more and more concerned by the industry and students, and although a large amount of documents introduce related research results, the topological structure which really has practical value and successfully realizes commercial application is very limited, and mainly comprises a diode clamping type, a flying capacitor type, a cascade H-bridge type and a modular multi-level topology. Active Neutral Point clamped five-level (ANPC-5L) was proposed by ABB researchers in 2005 and has been successfully applied to ACS2000 series products by ABB corporation, and thus its utility has been examined. Compared with a diode clamping topology, a flying capacitor topology and a cascade H-bridge topology ANPC-5L topology, the method has the advantages that: three phases share a direct current bus, the number of direct current sources is reduced, and the system can work in a back-to-back mode; the topological structure is relatively simple, and the control is easy; the advantages of the diode clamp topology are retained. Therefore, the active neutral point clamped five-level inverter has good application prospect.
The capacitor voltage balance control is the key point of research on almost all inverters with three or more levels, and the capacitor voltage balance control technology of the current diode clamping topology, flying capacitor topology, cascade H-bridge topology and modular multilevel topology is mature, but the research on ANPC-5L topology is less. Although ABB company has already introduced a commercial product of ANPC-5L, the capacitance-voltage balance control method is a commercial secret, and the implementation manner thereof is unknown, and the current research on the capacitance-voltage balance control of the ANPC-5L inverter has the following problems: firstly, the current support capacitor voltage control based on zero sequence voltage injection can cause overlarge common mode voltage, which can generate adverse effect on the service life of a load motor; secondly, at present, the balance control of the voltage of the suspension capacitor is mainly to select different redundant switch states by detecting the voltage and the current, but the control mode is qualitative control rather than quantitative control, which easily causes the overlarge voltage fluctuation of the suspension capacitor and loses the advantage of self-balance of phase-shift carrier modulation; thirdly, the voltage balance control of the support capacitor and the voltage balance control of the suspension capacitor are not organically combined, which is also the most main problem existing in the current ANPC-5L topology research. In fact, the balance of the support capacitor voltage and the balance of the floating capacitor voltage are mutually coupled, and improper control of the voltage balance of the floating capacitor will affect the control effect of the voltage balance of the support capacitor.
The invention content is as follows:
in order to overcome the defects of the prior art, the invention provides a capacitor voltage balance control method of an active neutral point clamped five-level inverter, which organically combines the voltage control of a support capacitor and the voltage control of a suspension capacitor by introducing an auxiliary modulation wave, and effectively controls the voltage balance of the ANPC-5L capacitor of the active neutral point clamped five-level inverter.
In order to solve the technical problems, the invention adopts the technical scheme that:
a capacitance-voltage balance control method for an active neutral point clamped five-level inverter comprises a supporting capacitor C1, a supporting capacitor C2, four input side bridge arms and two output side bridge arms, wherein each input side bridge arm and each output side bridge arm respectively comprise two semiconductor switch devices, and the active neutral point clamped five-level inverter is subjected to balance control of supporting capacitance voltage to obtain zero sequence voltage; carrying out balance control on the voltage of the suspension capacitor on the active neutral point clamped five-level inverter to obtain a redundant state action time adjustment value dx; and obtaining an auxiliary modulation wave according to the zero sequence voltage and the redundant state action time adjustment value dx.
Preferably, the method for performing the balance control of the support capacitor voltage on the active midpoint clamping five-level inverter to obtain the zero-sequence voltage specifically includes:
step 1.1, obtaining ideal average midpoint current for balancing the voltages of the support capacitors in a carrier period according to the difference value of the voltages of the two support capacitors
Figure BDA0001663114770000031
Step 1.2, the voltage of the support capacitor is controlled by injecting zero sequence voltage, and the range [ U ] of the zero sequence voltage is obtained on the premise that the reference voltage is in the range of the level intervalzmin,Uzmax]；
Step 1.3, according to the intermediate value U of the three-phase voltagemidThe polarity and the zero sequence voltage range of (1), and the average midpoint current range
Figure BDA0001663114770000032
Step 1.4, according to the ideal average midpoint current
Figure BDA0001663114770000033
And average midpoint current range
Figure BDA0001663114770000034
Relation and zero sequence voltage range [ U ]zmin,Uzmax]Obtaining average midpoint current
Figure BDA0001663114770000035
Current closest to ideal mean midpoint
Figure BDA0001663114770000036
Zero sequence voltage U ofz。
Preferably, the specific method for performing the balance control of the floating capacitor voltage on the active midpoint clamping five-level inverter to obtain the redundant state action time adjustment value includes:
step 2.1, obtaining the average current value for balancing the voltage of the suspension capacitor according to the deviation value of the voltage of the suspension capacitor
Figure BDA0001663114770000037
Step 2.2, adding a redundant state action time adjustment value dx to the duty ratio of one semiconductor switching device of the first output side bridge arm, subtracting the redundant state action time adjustment value dx from the duty ratio of the other semiconductor switching device of the output side bridge arm, and taking the carrier amplitude as a limit to obtain the value range of the redundant state action time adjustment value dx;
step 2.3, average current value
Figure BDA0001663114770000041
The value obtained by calculation after taking the negative number of the ratio of the two times of actual measured current is used as the adjustment value dx of the action time in the redundant state, and if the value obtained by calculation exceeds the value obtained by calculationAnd (4) taking the maximum value or the minimum value of the value range as the redundant state action time adjustment value dx when the value range of the redundant state action time adjustment value dx is obtained.
Preferably, the specific method for obtaining the auxiliary modulation wave according to the zero sequence voltage and the redundant state action time adjustment value dx includes:
two auxiliary modulation waves
Figure BDA0001663114770000042
Wherein, UrefxTo modulate the amplitude of the wave.
The invention has the beneficial effects that: the voltage balance of the suspension capacitor is controlled by adopting a zero sequence voltage injection method, the generation of zero sequence voltage is optimized, and the generation of overhigh common mode voltage is prevented; the action time of the redundant switch state is accurately adjusted, so that the quantitative control of the voltage of the suspension capacitor is realized, and the voltage fluctuation of the suspension capacitor is prevented from being too large; by introducing auxiliary modulation waves, the voltage balance control of the support capacitor and the voltage balance control of the suspension capacitor are combined, and the balance control of all capacitor voltages of the ANPC-5L inverter is realized.
Drawings
Fig. 1 is a diagram of an active neutral point clamped five-level single-phase topology.
Fig. 2 is a three-phase topology structure diagram of an active neutral point clamped five-level ANPC-5L inverter according to an embodiment of the present invention.
Fig. 3 shows the switching states and corresponding outputs of an active midpoint clamped five-level ANPC-5L inverter according to an embodiment of the present invention.
Fig. 4 is a diagram of active midpoint clamp five-level ANPC-5L inverter carrier phase shift modulation according to an embodiment of the present invention.
Fig. 5 is a modulation diagram for an active neutral point clamped five level ANPC-5L inverter in one carrier cycle after the introduction of an auxiliary modulation wave in accordance with an embodiment of the present invention.
In the figure: 1-a first input side leg, 2-a second input side leg, 3-a third input side leg, 4-a fourth input side leg, 5-a first output side leg, 6-a second output side leg.
Detailed Description
A capacitance-voltage balance control method for an active neutral point clamped five-level inverter comprises a supporting capacitor C1, a supporting capacitor C2, four input side bridge arms and two output side bridge arms, wherein each input side bridge arm and each output side bridge arm respectively comprise two semiconductor switch devices, and the control method comprises the following steps:
step 1, carrying out support capacitor voltage balance control on an active neutral point clamped five-level inverter to obtain zero sequence voltage, wherein the method specifically comprises the following steps:
step 1.1, obtaining ideal average midpoint current for balancing the voltages of the support capacitors in a carrier period according to the difference value of the voltages of the two support capacitors
Figure BDA0001663114770000051
Step 1.2, the voltage of the supporting capacitor is controlled by injecting zero sequence voltage, and the range [ U ] of the zero sequence voltage is obtained on the premise of not changing the reference voltage level intervalzmin,Uzmax]；
Step 1.3, according to the intermediate value U of the three-phase voltagemidThe polarity and the zero sequence voltage range of (1), and the average midpoint current range
Figure BDA0001663114770000061
Step 1.4, according to the ideal average midpoint current
Figure BDA0001663114770000062
And average midpoint current range
Figure BDA0001663114770000063
Relation and zero sequence voltage range [ U ]zmin,Uzmax]Obtaining average midpoint current
Figure BDA0001663114770000064
Current closest to ideal mean midpoint
Figure BDA0001663114770000065
Zero sequence voltage U ofz。
Step 2, carrying out balance control on the voltage of the suspension capacitor of the active neutral point clamped five-level inverter to obtain a redundant state action time adjustment value dx, wherein the specific method comprises the following steps:
step 2.1, obtaining the average current value for balancing the voltage of the suspension capacitor according to the deviation value of the voltage of the suspension capacitor
Figure BDA0001663114770000066
Step 2.2, adding a redundant state action time adjustment value dx to the duty ratio of one semiconductor switching device of the first output side bridge arm, subtracting the redundant state action time adjustment value dx from the duty ratio of the other semiconductor switching device of the output side bridge arm, and taking the carrier amplitude as a limit to obtain the value range of the redundant state action time adjustment value dx;
step 2.3, average current value
Figure BDA0001663114770000067
And if the calculated value exceeds the value range of the redundant state action time adjustment value dx, taking the maximum value or the minimum value of the value range as the redundant state action time adjustment value dx.
And 3, obtaining an auxiliary modulation wave according to the zero sequence voltage and the redundant state action time adjustment value dx, wherein the specific method comprises the following steps:
two auxiliary modulation waves
Figure BDA0001663114770000068
Wherein, UrefxTo modulate the amplitude of the wave.
The invention is further described below with reference to the accompanying drawings and examples.
As shown in fig. 1, the active midpoint clamp five-level inverter ANP of the present embodimentThe C-5L single phase topology contains 6 bridge arms: the bridge comprises a first input side bridge arm, a second input side bridge arm, a third input side bridge arm, a fourth input side bridge arm, a first output side bridge arm and a second output side bridge arm, wherein each bridge arm comprises two semiconductor switching devices. Three phases a, B and C, denoted by x, of the embodiment including the active midpoint clamped five-level inverter ANPC-5L, each having 12 semiconductor switching devices, S respectivelyx1-Sx6And corresponding complementary switch device S'x1-S'x6. In addition, each phase has 1 suspension capacitor Cfx. The DC source DC, the supporting capacitors C1 and C2 are three-phase common, and as shown in fig. 2, the ANPC-5L inverter is a three-phase full-bridge structure. If the voltage of the direct current source is 4E, the voltage of the support capacitor is 2E, and the voltage of the floating capacitor is E. ANPC-5L switching state, output and current relationships are shown in FIG. 3, semiconductor switching device Sx1-Sx4And complementary switch tube S'x1-S'x4Operating at a fundamental frequency, S when the output is positivex1-Sx4Are all 1, i.e. open, and when the output voltage is negative, Sx1-Sx4Are both 0, i.e., off. Therefore, for the ANPC-5L inverter, only the semiconductor switching device S of the first output-side arm 5 needs to be controlledx5And Sx6And their complementary switching devices, i.e. semiconductor switching device S 'of second output-side arm 6'x5And S'x6. Therefore, when phase-shift carrier modulation is adopted, only two groups of triangular carriers U are neededC5And UC6As shown in fig. 4. As shown in fig. 3, the ANPC-5L includes 8 switch states and 5 output levels, where the outputs E and E have two switch states, St2, St3, St6 and St7, respectively, and the two switch states have the same output voltage but have opposite effects on the floating capacitor voltage, so that the action time of the redundant state is accurately adjusted according to the floating capacitor voltage deviation value and the current direction, and the balance control of the floating capacitor voltage can be realized. Taking the voltage E as a reference, and outputting a reference voltage U of an x phasexoMapping to the interval [ -2,2 [)]Then, the modulated wave is mapped to the interval [0, 1 ]]Modulated wave U of x-phaserefxCan be expressed as:
Figure BDA0001663114770000081
as shown in fig. 1, the bus voltage is maintained constant, and the following voltage-current relationship can be obtained:
Figure BDA0001663114770000082
the current flowing through the capacitors C1 and C2 can thus be expressed as:
Figure BDA0001663114770000083
wherein inIs the midpoint current. It can be seen from equation (3) that the current flowing through the capacitors C1 and C2 is determined by the midpoint current, so that the support capacitor voltage has a close relationship with the midpoint current, and the voltage of the support capacitor can be controlled by controlling the midpoint current. With support capacitance and suspension capacitor voltage decoupling control, the rethread auxiliary modulation ripples combines both, therefore the control of capacitance voltage balance can be divided into three big steps and go on:
the first step is as follows: the balance control of the voltage of the supporting capacitor is carried out by 4 small steps.
1. Calculating ideal midpoint current, keeping the bus voltage constant at 4E, and keeping the voltage of the supporting capacitor C1 at Uc1C2 has a voltage of Uc2Then Uc1+Uc24E, capacitor voltage offset dUc＝2E-Uc1＝Uc2-2E, the ideal average midpoint current for balancing the voltage of the supporting capacitor during a carrier period according to equation (3) and the voltage-current relationship of the capacitor is
Figure BDA0001663114770000084
Wherein T is a carrier wave Uc5And Uc6C is the capacitance of the support capacitors C1 and C2.
2. The zero sequence voltage range is calculated, and according to fig. 3, the midpoint current can be represented as:
Figure BDA0001663114770000091
wherein S x51 denotes a semiconductor switching device Sx5Opening, S x50 denotes a semiconductor switching device Sx5And closing. In one carrier period, S is shown in FIG. 4x5Duty cycle dS ofx5＝Urefx. Thus, according to equations (1) and (5), when only one phase is considered in one carrier period, the mean value of the midpoint current is expressed as
Figure BDA0001663114770000092
If at voltage UoxAdding a zero sequence voltage UzThe new midpoint current average is then the total midpoint current average for the three-phase system
Figure BDA0001663114770000094
For a three-phase three-wire system, there is iao+ibo+icoThe mean value of the midpoint current is changed after the zero sequence voltage is added, so that the support capacitor voltage can be controlled by changing the midpoint current by adding different zero sequence voltages. After adding zero sequence voltage, common mode voltage Umod＝{(Uao+Uz)+(Ubo+Uz)+(Uco+Uz) And/3, limiting the voltage level interval of the added zero sequence voltage to not change the reference voltage in order to not generate an excessively high common mode voltage. Therefore, the maximum and minimum values of the zero-sequence voltage are:
Figure BDA0001663114770000096
where ceil () is a ceiling function and floor () is a floor function.
3. And calculating the range of the midpoint current after the zero sequence voltage is added. Make three-phase voltage Uao，Ubo，UcoThe medium maximum value is UmaxCorresponding to the current i1The median value is UmidCorresponding to a current of i2Minimum current of UminCorresponding to the current i3It can be determined that Umax>0 and Umin<0, and UmidIs uncertain and therefore needs to be discussed in two cases:
a) if U is presentmid>0, then the new midpoint current average value after adding zero sequence voltage in step 2 is
Figure BDA0001663114770000101
According to the range of the zero sequence voltage,
Figure BDA0001663114770000102
the maximum and minimum values of (d) are:
Figure BDA0001663114770000103
wherein
Figure BDA0001663114770000104
b) If U is presentmidLess than or equal to 0, then the new midpoint current average value after adding zero sequence voltage in step 2 is
Figure BDA0001663114770000105
Figure BDA0001663114770000106
The maximum and minimum values of (d) are:
Figure BDA0001663114770000107
wherein
Figure BDA0001663114770000108
4. And calculating zero sequence voltage. According to
Figure BDA0001663114770000109
A range of
Figure BDA00016631147700001010
The injected zero sequence voltage is calculated according to three conditions:
a) if it is not
Figure BDA00016631147700001011
Then the zero sequence voltage is:
Figure BDA00016631147700001012
b) if it is not
Figure BDA00016631147700001013
Then the zero sequence voltage is:
Figure BDA0001663114770000111
c) if it is not
Figure BDA0001663114770000112
Then the zero sequence voltage is:
Figure BDA0001663114770000113
wherein
Figure BDA0001663114770000114
Represents the midpoint current without adding zero sequence voltage.
The second step is that: the balance control of the voltage of the suspension capacitor is carried out by 3 small steps.
1. The current required to balance the floating capacitor voltage is calculated. As can be seen from fig. 3, the current flowing through the floating capacitor can be expressed as:
ifx＝(Sx6-Sx5)ixo(13)
wherein ixoTo actually measure the current. Sx6Meaning to Sx5Similarly, when Sx6When 1, it denotes a semiconductor switching device Sx6Opening, Sx6And when 0, it means off. As can be seen from fig. 4, S is within one carrier periodx6Duty cycle dS of 1x6＝UrefxTherefore, in one carrier period, flows through the floating capacitor CfxThe average value of the current of (a) is:
Figure BDA0001663114770000115
due to dSx5＝Urefx，dSx6＝UrefxThus, therefore, it is
Figure BDA0001663114770000116
Theoretically 0, however, due to the existence of errors and non-linear factors, the floating capacitor voltage may deviate to a certain extent, and the inverter may be unbalanced in long-term operation, so that the floating capacitor voltage must be controlled. The voltage rating of the suspension capacitor is E and the voltage deviation value is dUfx＝UfxE, then the average value of the ideal current for balancing the voltage of the floating capacitor in accordance with the voltage-current relationship of the capacitor during one carrier period is:
Figure BDA0001663114770000117
wherein C isfIs the capacitance value of the floating capacitor.
2. A range of redundant state action time adjustment values dx is calculated. As can be seen from the analysis of step 1 of the second major step, dS can be determinedx5Adding a dx while simultaneously converting dSx6Subtracting a dx to adjust dSx5And dSx6But modulating wave UrefxCannot exceed the carrier amplitude 1, and is combined with the zero sequence voltage U obtained by the first step of calculationzThe range of dx is:
Figure BDA0001663114770000121
3. dx is calculated. After introduction of dx，dSx5-dSx6As can be seen from equations (14) and (15) for 2dx, the target value dx of dx is obtained when the floating capacitor voltage is to be balancedoptThe following relationships are required
Figure BDA0001663114770000122
Determining the value of dx according to equation (15), equation (16) and equation (17):
Figure BDA0001663114770000123
the third step: an auxiliary modulation wave is calculated. According to the zero sequence voltage obtained by the first step of calculation and dx obtained by the second step of calculation, two auxiliary modulation waves are introduced:
Figure BDA0001663114770000124
as shown in fig. 5, by auxiliary modulating wave Urefx1And carrier wave Uc5Semiconductor switching device S for controlling first output-side bridge arm 5 by comparison with PWM pulsesx5And complementary switching device S'x5. Through Urefx2And carrier wave Uc6Semiconductor switching device S for controlling output of first output side arm 5 by comparing generated PWM pulsesx6And complementary switching device S'x6。
Since the line voltage output by the inverter is not changed by adding the zero sequence voltage, the output voltage of the inverter is not changed by the auxiliary modulation wave as long as the introduced dx does not change the output voltage. It can be shown that dx does not change the output voltage either. As shown in fig. 5, the modulated wave is considered to be a constant value within one carrier period, to (U)refx+Uz/2)∈[0,0.5]For example, when dx is added, the duty ratios of the output voltages E and 0 are not changed, but only the duty ratios of the switching states St2 and St3 are changed, and since the outputs of St2 and St3 are both E, the addition of dx has no influence on the output voltage of the inverter. It can be shown that adding dx does not change either when the output is otherwise the caseAnd outputting the voltage. In summary, neither the zero sequence voltage nor dx affects the inverter output line voltage.
It will be understood that modifications and variations can be made by persons skilled in the art in light of the above teachings and all such modifications and variations are intended to be included within the scope of the invention as defined in the appended claims.

Claims (1)

1. A capacitance-voltage balance control method for an active neutral point clamped five-level inverter, wherein the active neutral point clamped five-level inverter comprises a supporting capacitor C1, a supporting capacitor C2, four input side bridge arms and two output side bridge arms, each input side bridge arm and each output side bridge arm comprise two semiconductor switching devices, and the method is characterized in that: carrying out balance control on the voltage of a support capacitor on the active neutral point clamped five-level inverter to obtain zero-sequence voltage; carrying out balance control on the voltage of the suspension capacitor on the active neutral point clamped five-level inverter to obtain a redundant state action time adjustment value dx; obtaining an auxiliary modulation wave according to the zero sequence voltage and the redundant state action time adjustment value dx;
the specific method for carrying out support capacitor voltage balance control on the active neutral point clamped five-level inverter to obtain the zero-sequence voltage comprises the following steps:
step 1.1, obtaining ideal average midpoint current for balancing the voltages of the support capacitors in a carrier period according to the difference value of the voltages of the two support capacitors
Figure FDF0000009271970000011
Step 1.2, the voltage of the support capacitor is controlled by injecting zero sequence voltage, and the range [ U ] of the zero sequence voltage is obtained on the premise that the reference voltage is in the range of the level intervalzmin,Uzmax]；
Step 1.3, according to the intermediate value U of the three-phase voltagemidThe polarity and the zero sequence voltage range of (1), and the average midpoint current range
Figure FDF0000009271970000012
Step 1.4, according to the ideal average midpoint current
Figure FDF0000009271970000013
And the average midpoint current range
Figure FDF0000009271970000014
Relation and zero sequence voltage range [ U ]zmin,Uzmax]Obtaining average midpoint current
Figure FDF0000009271970000015
Current closest to the ideal average midpoint
Figure FDF0000009271970000016
Zero sequence voltage U ofz；
The maximum value and the minimum value of the zero-sequence voltage are as follows:
Figure FDF0000009271970000017
wherein ceil () is an upward rounding function and floor () is a downward rounding function;
the specific method for carrying out balance control on the voltage of the floating capacitor on the active neutral point clamped five-level inverter to obtain the action time adjustment value of the redundant state comprises the following steps:
step 2.1, obtaining the average current value for balancing the voltage of the suspension capacitor according to the deviation value of the voltage of the suspension capacitor
Figure FDF0000009271970000021
Step 2.2, adding a redundant state action time adjustment value dx to the duty ratio of one semiconductor switching device of the first output side bridge arm, subtracting the redundant state action time adjustment value dx from the duty ratio of the other semiconductor switching device of the output side bridge arm, and taking the carrier amplitude as a limit to obtain the value range of the redundant state action time adjustment value dx;
step 2.3, the average current value is measured
Figure FDF0000009271970000022
Taking a negative value of the ratio of the current to the two times of actual measured current as a redundant state action time adjustment value dx, and if the calculated value exceeds the value range of the redundant state action time adjustment value dx, taking the maximum value or the minimum value of the value range as the redundant state action time adjustment value dx;
the specific method for obtaining the auxiliary modulation wave according to the zero sequence voltage and the redundant state action time adjustment value dx comprises the following steps:
two auxiliary modulation waves
Figure FDF0000009271970000023
Wherein, UrefxTo modulate the amplitude of the wave.
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