CN108803509A - A kind of polymorphic type CPU compatibilities industrial controller system - Google Patents
A kind of polymorphic type CPU compatibilities industrial controller system Download PDFInfo
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Abstract
The invention belongs to technical field of industrial control, disclose a kind of polymorphic type CPU compatibilities industrial controller system, including：Power supply module, initial parameter configuration module, drive load module, central control module, CPU scheduler modules, load balancing module, data encryption module, state display module.The present invention passes through a CPU in the CPU for obtaining the thread and N number of operation in M thread, will be handled on a CPU that a thread in the M thread is bundled in the CPU of N number of operation.Under the premise of not influencing system performance, the resource of each CPU is taken full advantage of, thread saltus step between each CPU can be prevented, reduce the power consumption of multi -CPU；The present invention is directed to each receiving port by load balancing module simultaneously, and according to shunting rule by message classification, message is read from the receiving queue bound with this CPU core；The efficiency of multi-core CPU can be greatly improved.
Description
Technical field
The invention belongs to technical field of industrial control more particularly to a kind of polymorphic type CPU to be compatible with industrial controller system.
Background technology
Currently, the prior art commonly used in the trade is such：
Industrial control system is the requirement to the big data quantities such as image, voice signal, high rate data transmission, and is expedited the emergence of
Currently in the combination of the fashionable Ethernet of commercial field and control network.This strand of industrial control system networking tide again will such as
A variety of current popular techniques such as embedded technology, the interconnection of multi-standard industrial control network, wireless technology, which are integrated into, to be come, to expand
The development space of industrial control field, brings new opportunity to develop.However, existing polymorphic type CPU compatibilities industrial control unit (ICU) is more
Core CPU power consumption is big；Many multi-core CPUs simultaneously, hardware interrupts are all interface level, i.e. synchronization, and only there are one CPU processing reports
Text causes multi-core CPU that cannot play multinuclear efficiency.
Research can either provide safety and integrity protection for user data in cloud storage environment, the access control to data
High efficient and reliable processed, and the cloud storage security system framework of the performance of cloud storage service system is not influenced, it is of great significance.It is sorry
, there is no the relevant technologies can be for reference at present.
Cooperation transmission technology is quickly grown in recent years.In cooperation transmission, each mobile node can only install a day
Line, by selecting partner node appropriate (or for cooperative node, relay node etc.) to participate in forwarding message in the wireless network,
The signal that source node is emitted can be made to pass through differential declines path and reach destination node, to form a virtual multiple antennas
System.Cooperation transmission makes the resource-sharing between node become possibility, other than it can obtain diversity and spatial multiplexing gain, it is also possible to
Bring the expansion of coverage area, and because of the segmentation of transmission path obtain path loss gain etc..
Although cooperation transmission technology has above-mentioned many advantages, latent defect but also clearly, in cooperation transmission,
Due to the half-duplex characteristic of node, relaying cannot send and receive message simultaneously in identical frequency, and the transmission of message needs to undergo
From source to relaying and from being relayed to destination at least double bounce so that its spectrum efficiency understands drop by half compared with directly transmitting.
Thus, how to promote spectrum efficiency is the great difficult problem that cooperation transmission faces.
In conclusion problem of the existing technology is：
Existing polymorphic type CPU compatibilities industrial control unit (ICU) multi-core CPU power consumption is big；Many multi-core CPUs, hardware interrupts are all simultaneously
Interface level, i.e., synchronization causes multi-core CPU that cannot play multinuclear efficiency only there are one CPU processing messages.
The present invention improves the essential defect that cooperation transmission spectrum efficiency declines, and promotes the spectrum efficiency and mistake of cooperation transmission
Performance.
Invention content
In view of the problems of the existing technology, the present invention provides a kind of polymorphic type CPU to be compatible with industrial controller system.
The invention is realized in this way a kind of polymorphic type CPU is compatible with industrial controller system, including：
Initial parameter configuration module, connect with central control module, is used for the initial parameter of Configuration Control Unit system；
Drive load module, connect with central control module, for loading hardware drive program；
Central control module, with power supply module, initial parameter configuration module, drive load module, CPU scheduler modules, negative
Balance module, data encryption module, state display module connection are carried, for controlling modules normal work；Center control mould
The control method of block includes：Destination will feed back 2bits information representations to the signal that is received by the link that direct transfers in time slot 1
3 kinds of reception states：Success, half success, failure, source and relaying will determine operation in next time slot according to feedback information；And
Relay node also can select different relay forwarding agreements according to itself to the demodulation success or not of data；
CPU scheduler modules, connect with central control module, for carrying out rational management to multi-core CPU；
Load balancing module is connect with central control module, for after receiving port receives message, generating in hardware
It is disconnected, and hardware interrupts are reported to all CPU cores bound with receiving port simultaneously, and then multi-core CPU handles message simultaneously；
Data encryption module is connect with central control module, is encrypted for the data to controller system；
The encryption upload of user terminal file and user are decrypted and download file, when file needs shared, is uploaded in encryption
User file key is got into user terminal afterwards, file key is decrypted in user terminal and then uses the public key of other side again again
It is encrypted and generates new file key, be then uploaded to server-side storage, file is decrypted using private key when other side uses file
Key decrypts file and obtains definitive document again in turn；
Specifically include following steps：
Step 1, system initialization：
User A is initialized with user B when first logging into system；
User A and user B carries out login system after completing to initialize, and landfall process is as follows：
Automatic acquisition is stored in the key file of third party's storing mechanism by logging in system by user, user terminal, and by right
Log-on message carries out Hash calculation and gets password key, by password key decruption key file, is solved to key file
User's master key and private key for user are obtained after analysis respectively, and master key and private key are stored in user terminal；
Step 2, file encryption upload；
Step 3, Cryptograph Sharing；
Step 4, file download decryption；
Step 5 is nullified：
When needing to nullify, user terminal can remove the master key and private key for user for being stored in user terminal automatically；
State display module is connect with central control module, for passing through signal lamp viewing hardware working condition.
Further, the initialization procedure described in step 1 includes：
The first step, user enter register interface, provide username & password as required and are registered, then user terminal can root
Generate the user password key for meeting symmetric cryptographic key length requirement by hash function in user terminal according to log-on message；
Second step, user terminal can be locally generated the secure random number that size is m by local function call, and random number is made
For the master key of user, the size of m is determined according to requirement of the symmetric encipherment algorithm to key length, is at the same time also existed
The key pair of the local asymmetric encryption for generating user；
Third walks, and user's master key of generation is encrypted with private key for user by password key, generates ciphertext state
Key file, file is stored by being uploaded to third-party platform mechanism after coding, store to user's registration information arrange
In table；
The public key of generation is directly uploaded in user's registration information list by the 4th step, is stored to complete to register；
The file upload procedure described in step 2 includes：
The first step, user A selection need to encrypt the file uploaded, then generate the random of safety at random by user terminal
Number, length meets symmetric cryptographic key length, using random number as file key；
Second step is encrypted selected file by using file key, and encrypted result is buffered in local；
Third walks, and file key is encrypted by user's master key, and encrypted file key is passed through file
The mode of splicing is spliced to by before the encrypted file of second step, forming a new file, and preceding m bytes are encrypted text
Part key is encrypted file content after m bytes；
The encryption file newly formed is uploaded to server-side and stored by the 4th step, user A.
Further, the control method of central control module includes：
Step 1, time slot 1, source S is with power PSThe information data of oneself is broadcasted, relaying is in destination and receives shape
State；
Step 2, destination demodulate the reception data for the link that direct transfers, and broadcast 3 kinds of demodulation shapes by feedback channel
State：Success, half success, failure；
Step 3, when the received signal to noise ratio for meeting the link that direct transfers is not less than snr threshold, i.e. PSγ >=η, demodulation state
For success, destination feedack is 11, then after receiving feedback information, source is in time slot 2 with power PSSend new letter
Symbol is ceased, relay node is kept silent；
Step 4, when being unsatisfactory for PSγ >=η but meet 2PSγ >=η, demodulation state are half success, destination feedack
It is 10 or 01, then upon reception of the feedback information, source is in time slot 2 with power PSThe information symbol broadcasted in upper time slot is retransmitted,
Relay node is kept silent；
Step 5, when meeting 2PSγ < η, demodulation state are failure, and destination feedack is 00, then receive anti-
After feedforward information, source is kept silent in time slot 2, and relay node judges according to received signal to noise ratio for number transmitted by 1 source of time slot
According to reception state；
Step 6, when destination demodulation state is failure and relaying is in time slot 1 and meets received signal to noise ratio not less than correct
The threshold value of demodulation, i.e. PSα >=η illustrates relay node by the data decoding success transmitted by 1 source of time slot, then relaying is in time slot 2
Use decoding forwarding DF agreements by after this data encoding with power PRForwarding, reception of the destination to direct transfer link and repeated link
It is demodulated after information Maximal ratio combiner；
Step 7, when destination demodulation state is failure and relaying is in time slot 1 and meets PSα < η, illustrate relay node not
Data decoding transmitted by 1 source of time slot can be succeeded, then relaying is after the use amplification forwarding AF agreements of time slot 2 are by this data quantization
With power PRForwarding, destination after the reception information Maximal ratio combiner of direct transfer link and repeated link to demodulating；
The spectrum efficiency of the cooperation transmission mechanism implementation method based on feedback information is described as：
Wherein α, β, γ indicate the unit recipient signal-to-noise ratio of S → R, R → D, S → D links respectively.
Further, the CPU scheduler modules dispatching method is as follows：
First, a CPU in the CPU of the thread and N number of operation in M thread is obtained, wherein M is more than 0
Integer, N is integer more than 0；
Then, a thread in the M thread is bundled on a CPU in the CPU of N number of operation
Reason.
Further, other N-1 CPU of the CPU of other M-1 thread and N number of operation of described M thread of acquisition；
When the M-1 is less than the N-1, then by the one-to-one CPU for being bundled in M-1 operation of the M-1 thread
Upper processing；Or when the M-1 be equal to the N-1 when, by the M-1 thread it is one-to-one be bundled in it is described N-1 run
CPU on handle；
Or when the M-1 be more than the N-1 when, by N-1 thread it is one-to-one be bundled in it is described N-1 run
It handles on CPU, is handled on M-N CPU M-N thread being bundled on the CPU of the N-1 operation.
Further, the method for load balancing module is as follows：
First, for each receiving port, according to shunting rule by message classification, and according to the receiving queue of receiving port
With the relations of distribution of type of message, forward the packet to there are the receiving queues of the relations of distribution with affiliated type of message；
Then, after receiving port receives message, hardware interrupts are generated, and hardware interrupts are reported to and receiving terminal simultaneously
All CPU cores of mouth binding；
Finally, each CPU core of hardware interrupts is received in traps processing procedure, is connect from what this CPU core was bound
It receives queue and reads message.
Realizing that the polymorphic type CPU is compatible with industrial controller system controlling party another object of the present invention is to provide a kind of
The computer program of method.
Another object of the present invention is to provide a kind of letters being compatible with industrial controller system equipped with the polymorphic type CPU
Cease data processing terminal.
Another object of the present invention is to provide a kind of computer readable storage mediums, including instruction, when it is in computer
When upper operation so that computer executes the control method of the polymorphic type CPU compatibilities industrial controller system.
Advantages of the present invention and good effect are：
The present invention is by CPU scheduler modules, by obtaining in a thread in M thread and the CPU of N number of operation
One CPU will be handled on a CPU that a thread in the M thread is bundled in the CPU of N number of operation.Not
Under the premise of influencing system performance, the resource of each CPU is taken full advantage of, thread saltus step between each CPU can be prevented, dropped
The low power consumption of multi -CPU.The present invention is directed to each receiving port by load balancing module simultaneously, regular by message according to shunting
Classification, and according to the relations of distribution of the receiving queue of receiving port and type of message, forward the packet to affiliated message class
There are the receiving queues of the relations of distribution for type；After receiving port receives message, generate hardware interrupts, and by hardware interrupts simultaneously on
Offer all CPU cores bound with receiving port；Each CPU core of hardware interrupts is received in traps processing procedure, from
Message is read with the receiving queue of this CPU core binding；The efficiency of multi-core CPU can be greatly improved.
Data encryption module of the present invention ensures the safety for being stored in third party's data, and uploads and downloaded in file
Due to being all encrypted in journey, so being all safe；By using complete client encryption and decryption mode to user data into
Row secrecy, ensures that the safety of user data；The mode of operation fully transparent to user is used, user uses simple
It is convenient, it is not required to the purpose that file-sharing can be completed in extra work；Using multistage key, the characteristics of taking full advantage of public and private key, makes
The file obtained in shared system is safer, and greatly reduces the complexity of cryptograph files sharing method；By using a text
One is close and the encrypted mode of key reconsul make it is shared without carrying out re-encrypted to full text, in the condition for ensureing certain safety
Under fundamentally reduce the calculation amount of system；Used encryption key distribution mode makes user have and only to oneself file
Control so that file storage is safer.
The invention avoids waste of resource to carry out unnecessary information forwarding, with classical AF or classics DF cooperation transmission machines
System not only improves the essential defect of cooperation transmission, cooperation is greatly improved compared under the premise of only needing 2bits overheads
The spectrum efficiency of transmission, while the error performance of cooperation transmission can also be promoted.
Description of the drawings
Fig. 1 is polymorphic type CPU compatibilities industrial controller system structure diagram provided in an embodiment of the present invention.
In figure：1, power supply module；2, initial parameter configuration module；3, drive load module；4, central control module；5,
CPU scheduler modules；6, load balancing module；7, data encryption module；8, state display module.
Fig. 2 is the classical cooperation transmission model schematic of simplification provided in an embodiment of the present invention.
Fig. 3 is that the present invention provided in an embodiment of the present invention illustrates compared with the spectrum efficiency performance of classical cooperation transmission mechanism
Figure；
Fig. 4 is that the present invention provided in an embodiment of the present invention illustrates compared with the bit error rate performance of classical cooperation transmission mechanism
Figure.
Specific implementation mode
In order to further understand the content, features and effects of the present invention, the following examples are hereby given, and coordinate attached drawing
Detailed description are as follows.
As shown in Figure 1, polymorphic type CPU compatibilities industrial controller system provided by the invention includes：It is power supply module 1, initial
Parameter configuration module 2, drive load module 3, central control module 4, CPU scheduler modules 5, load balancing module 6, data encryption
Module 7, state display module 8.
Initial parameter configuration module 2 is connect with central control module 4, is used for the initial parameter of Configuration Control Unit system；
Drive load module 3 is connect with central control module 4, for loading hardware drive program；
Central control module 4, with power supply module 1, initial parameter configuration module 2, drive load module 3, CPU scheduler modules
5, load balancing module 6, data encryption module 7, state display module 8 connect, for controlling modules normal work；
CPU scheduler modules 5 are connect with central control module 4, for carrying out rational management to multi-core CPU；
Load balancing module 6 is connect with central control module 4, for after receiving port receives message, generating hardware
It interrupts, and hardware interrupts is reported to all CPU cores bound with receiving port simultaneously, and then multi-core CPU handles message simultaneously；
Data encryption module 7 is connect with central control module 4, is encrypted for the data to controller system；
State display module 8 is connect with central control module 4, for passing through signal lamp viewing hardware working condition.
5 dispatching method of CPU scheduler modules provided by the invention is as follows：
First, a CPU in the CPU of the thread and N number of operation in M thread is obtained, wherein M is more than 0
Integer, N is integer more than 0；
Then, a thread in the M thread is bundled on a CPU in the CPU of N number of operation
Reason.
Other N-1 CPU of other M-1 thread of M thread of acquisition provided by the invention and the CPU of N number of operation；
When the M-1 is less than the N-1, then by the one-to-one CPU for being bundled in M-1 operation of the M-1 thread
Upper processing；Or when the M-1 be equal to the N-1 when, by the M-1 thread it is one-to-one be bundled in it is described N-1 run
CPU on handle；
Or when the M-1 be more than the N-1 when, by N-1 thread it is one-to-one be bundled in it is described N-1 run
It handles on CPU, is handled on M-N CPU M-N thread being bundled on the CPU of the N-1 operation.
The control method of central control module includes：Destination will feed back 2bits information representations to by direct transferring in time slot 1
3 kinds of reception states of the signal that link receives：Success, half success, failure, source and relaying will be determined according to feedback information under
The operation of one time slot；And relay node also can select different relay forwardings to assist the demodulation success or not of data according to itself
View；
CPU scheduler modules, connect with central control module, for carrying out rational management to multi-core CPU；
Load balancing module is connect with central control module, for after receiving port receives message, generating in hardware
It is disconnected, and hardware interrupts are reported to all CPU cores bound with receiving port simultaneously, and then multi-core CPU handles message simultaneously；
The data encryption module of the present invention, connect with central control module, adds for the data to controller system
It is close；
The encryption upload of user terminal file and user are decrypted and download file, when file needs shared, is uploaded in encryption
User file key is got into user terminal afterwards, file key is decrypted in user terminal and then uses the public key of other side again again
It is encrypted and generates new file key, be then uploaded to server-side storage, file is decrypted using private key when other side uses file
Key decrypts file and obtains definitive document again in turn；
Specifically include following steps：
Step 1, system initialization：
User A is initialized with user B when first logging into system；
User A and user B carries out login system after completing to initialize, and landfall process is as follows：
Automatic acquisition is stored in the key file of third party's storing mechanism by logging in system by user, user terminal, and by right
Log-on message carries out Hash calculation and gets password key, by password key decruption key file, is solved to key file
User's master key and private key for user are obtained after analysis respectively, and master key and private key are stored in user terminal；
Step 2, file encryption upload；
Step 3, Cryptograph Sharing；
Step 4, file download decryption；
Step 5 is nullified：
When needing to nullify, user terminal can remove the master key and private key for user for being stored in user terminal automatically；
State display module is connect with central control module, for passing through signal lamp viewing hardware working condition.
Further, the initialization procedure described in step 1 includes：
The first step, user enter register interface, provide username & password as required and are registered, then user terminal can root
Generate the user password key for meeting symmetric cryptographic key length requirement by hash function in user terminal according to log-on message；
Second step, user terminal can be locally generated the secure random number that size is m by local function call, and random number is made
For the master key of user, the size of m is determined according to requirement of the symmetric encipherment algorithm to key length, is at the same time also existed
The key pair of the local asymmetric encryption for generating user；
Third walks, and user's master key of generation is encrypted with private key for user by password key, generates ciphertext state
Key file, file is stored by being uploaded to third-party platform mechanism after coding, store to user's registration information arrange
In table；
The public key of generation is directly uploaded in user's registration information list by the 4th step, is stored to complete to register；
The file upload procedure described in step 2 includes：
The first step, user A selection need to encrypt the file uploaded, then generate the random of safety at random by user terminal
Number, length meets symmetric cryptographic key length, using random number as file key；
Second step is encrypted selected file by using file key, and encrypted result is buffered in local；
Third walks, and file key is encrypted by user's master key, and encrypted file key is passed through file
The mode of splicing is spliced to by before the encrypted file of second step, forming a new file, and preceding m bytes are encrypted text
Part key is encrypted file content after m bytes；
The encryption file newly formed is uploaded to server-side and stored by the 4th step, user A.
Further, the control method of central control module includes：
Step 1, time slot 1, source S is with power PSThe information data of oneself is broadcasted, relaying is in destination and receives shape
State；
Step 2, destination demodulate the reception data for the link that direct transfers, and broadcast 3 kinds of demodulation shapes by feedback channel
State：Success, half success, failure；
Step 3, when the received signal to noise ratio for meeting the link that direct transfers is not less than snr threshold, i.e. PSγ >=η, demodulation state
For success, destination feedack is 11, then after receiving feedback information, source is in time slot 2 with power PSSend new letter
Symbol is ceased, relay node is kept silent；
Step 4, when being unsatisfactory for PSγ >=η but meet 2PSγ >=η, demodulation state are half success, destination feedack
It is 10 or 01, then upon reception of the feedback information, source is in time slot 2 with power PSThe information symbol broadcasted in upper time slot is retransmitted,
Relay node is kept silent；
Step 5, when meeting 2PSγ < η, demodulation state are failure, and destination feedack is 00, then receive anti-
After feedforward information, source is kept silent in time slot 2, and relay node judges according to received signal to noise ratio for number transmitted by 1 source of time slot
According to reception state；
Step 6, when destination demodulation state is failure and relaying is in time slot 1 and meets received signal to noise ratio not less than correct
The threshold value of demodulation, i.e. PSα >=η illustrates relay node by the data decoding success transmitted by 1 source of time slot, then relaying is in time slot 2
Use decoding forwarding DF agreements by after this data encoding with power PRForwarding, reception of the destination to direct transfer link and repeated link
It is demodulated after information Maximal ratio combiner；
Step 7, when destination demodulation state is failure and relaying is in time slot 1 and meets PSα < η, illustrate relay node not
Data decoding transmitted by 1 source of time slot can be succeeded, then relaying is after the use amplification forwarding AF agreements of time slot 2 are by this data quantization
With power PRForwarding, destination after the reception information Maximal ratio combiner of direct transfer link and repeated link to demodulating；
The spectrum efficiency of the cooperation transmission mechanism implementation method based on feedback information is described as：
Wherein α, β, γ indicate the unit recipient signal-to-noise ratio of S → R, R → D, S → D links respectively.
6 method of load balancing module provided by the invention is as follows：
First, for each receiving port, according to shunting rule by message classification, and according to the receiving queue of receiving port
With the relations of distribution of type of message, forward the packet to there are the receiving queues of the relations of distribution with affiliated type of message；
Then, after receiving port receives message, hardware interrupts are generated, and hardware interrupts are reported to and receiving terminal simultaneously
All CPU cores of mouth binding；
Finally, each CPU core of hardware interrupts is received in traps processing procedure, is connect from what this CPU core was bound
It receives queue and reads message.
When the present invention works, controller system is powered by power supply module 1；Pass through initial parameter configuration module 2
The initial parameter of Configuration Control Unit system；Hardware drive program is loaded by drive load module 3；Central control module 4 is dispatched
CPU scheduler modules 5 carry out rational management to multi-core CPU；By load balancing module 6 after receiving port receives message, production
Raw hardware interrupts, and hardware interrupts are reported to all CPU cores bound with receiving port simultaneously, and then multi-core CPU is located simultaneously
Manage message；The data of controller system are encrypted by data encryption module 7；Pass through 8 viewing hardware of state display module
Working condition.
As shown in Fig. 2, for simplified classical cooperation transmission model, cooperation and purpose section of the source node S by relay node R
Point D communications；Two time slots are undergone in transmission of the message from source to destination, and time slot 1, source S is with certain power broadcasts oneself
Data, relaying can receive this message with destination；Time slot 2, relaying R data that upper time slot is received handle after with
Certain power is transmitted to destination D, is solved after the merging for the data progress certain way that two time slots of destination pair receive
It adjusts and restores；The relay forwarding strategy being widely studied at present mainly include amplification forwarding (Amplify-and-Forward, AF) and
Decoding forwarding (Decode-and-Forward, DF)；Under AF patterns, relay node simply measures the signal received
Destination is transmitted to after change；And relay node needs docking collection of letters breath to be detected and decode under DF patterns, then will be after decoding
Information is sent to destination after recompiling；
Enable hSD, hSRWith hRDRespectively indicate direct transfer link S → D, repeated link S → R and R → D Cyclic Symmetry multiple Gauss believe
Road coefficient, and additive white Gaussian noise (the Additive White Gaussian of each link are assumed without loss of generality
Noise, AWGN) independently of each other and power spectral density be N0；It is assumed that the transmission power of source and relaying is respectively PSWith PR, and mesh
End to direct transfer on repeated link reception information carry out Maximal ratio combiner (Maximum ratio combining,
MRC)；If relaying R in Fig. 2 institutes representation model is forwarded using AF patterns, enable α=| hSR|2/N0, β=| hRD|2/N0, γ=| hSD|2/
N0, and bandwidth is normalized, then according to the description having in achievement in research, spectrum efficiency can be expressed as：
If the relaying R in Fig. 2 institutes representation model fixes forwarding using DF patterns, basis has the description in achievement in research,
Its spectrum efficiency can be expressed as：
As it can be seen that no matter which kind of retransmission protocol relaying uses, since same band is occupied in the transmission of primary information symbol
With twice, the factor of the spectrum efficiency of cooperation transmission before logarithm is 1/2, with directly transmission compared to drop by half (directly biography
Defeated spectrum efficiency is Idirect=log21+PSγ)；
For the defect that cooperation transmission technology spectrum efficiency declines, it is an object of the invention to change to the mechanism
Into providing a kind of cooperation transmission mechanism based on feedback information to improve the spectrum efficiency and error performance of cooperation transmission；
In classical coordination model, no matter destination is demodulated to the information symbol transmitted by source in the 1st time slot
Whether work(, relay node can carry out data forwarding in next time slot；But if the link condition that direct transfers of S → D is preferable, then in
After forwarding then become It is not necessary to, but also time slot or bandwidth resources can be wasted；In order to make source and relaying be best understood from mesh
End for the reception state of information symbol, transmit operation to make wiser information, feedback letter can be set in systems
Road；Meanwhile it is more clear to make reception state express, 2bits can be used in feedback information, for example indicates that destination has received with 11
Success；It indicates to receive half success with 10 or 01；Reception failure is indicated with 00；Here it receives and partly successfully means, although currently
Reception it is unsuccessful, but by assessment can conclude that, if destination can receive an identical signal-to-noise ratio of current message again
(SNR) copy, reception can succeed；
On the other hand, with the gradual perfection of hardware facility, equipment cost continuously decreases, and different forwardings are arranged for relaying
Pattern has not been difficult matter；In order to improve the reliability of cooperation transmission, it is assumed that relay node is operable with AF patterns, and can work
In DF patterns, which kind of operating mode relaying can select then dependent on the quality of S → R link-qualities.
The application effect of the present invention is described further by following emulation：
By Monte Carlo emulation come verify the spectrum efficiency of the cooperation transmission mechanism based on feedback information with it is error resistance
The advantage of energy；It is assumed that power mean allocation between each node, even PS=PR=PO.By the noise power normalization between each node
And define SNR=PO/N0, SNR threshold value η=20dB are enabled, and enable hSD, hSRWith hRDVariance be expressed as c, a and b；
Fig. 3 shows the channel of the present invention to improve mechanism with the spectrum efficiency performance of traditional mechanism with the link that direct transfers
Variance c and the comparison result changed；Simulation parameter is set as a=b=10, SNR=10dB；As seen from Figure 3, only as c < 0.6,
I.e. when there is no S → D direct transfer link or the very weak link that direct transfers when, the spectrum efficiency of transmission mechanism of the present invention is just less than
Classical DF cooperation transmissions；And work as and meet c >=1, i.e. c/a >=and 1. or behind c/b >=0.1, the frequency spectrum of transmission mechanism of the present invention is imitated
Rate is increased with the increase of c with rate quickly；When direct transfer link channel variance be repeated link channel variance half when, this
The spectrum efficiency for inventing the mechanism be respectively classical AF cooperation transmissions, classics DF cooperation transmission spectrum efficiencies 120%,
133%；
Fig. 4 shows that of the present invention improve mechanism changes with the bit error rate of traditional mechanism (BER) performance with SNR
Comparison result；Simulation parameter is set as a=b=10, c=5；From fig. 4, it can be seen that the bit error rate performance of transmission mechanism of the present invention
All it is minimum in the entire SNR range of emulation, moreover, the BER fall off rates of itself and classical AF transmission mechanisms are identical,
Thus it can be concluded that the BER of the transmission mechanism can still be less than classics AF cooperation transmissions in the SNR range not emulated；This
Illustrate that transmission mechanism of the present invention has best error performance.
In conclusion the cooperation transmission mechanism of the present invention based on feedback information is compared with classical cooperation transmission mechanism
Under the premise of only needing 2bits overheads, the essential defect of cooperation transmission can not only be improved, increase substantially the frequency of cooperation transmission
Spectrum efficiency, and the error performance of cooperation transmission can also be promoted.
The above is only the preferred embodiments of the present invention, and is not intended to limit the present invention in any form,
Every any simple modification made to the above embodiment according to the technical essence of the invention, equivalent variations and modification, belong to
In the range of technical solution of the present invention.
Claims (9)
1. a kind of polymorphic type CPU is compatible with industrial controller system, which is characterized in that the polymorphic type CPU is compatible with industrial control unit (ICU)
System includes：
Initial parameter configuration module, connect with central control module, is used for the initial parameter of Configuration Control Unit system；
Drive load module, connect with central control module, for loading hardware drive program；
Central control module, it is equal with power supply module, initial parameter configuration module, drive load module, CPU scheduler modules, load
Module, data encryption module, the state display module of weighing connect, for controlling modules normal work；Central control module
Control method includes：Destination is in time slot 1 by feedback 2bits information representations to 3 kinds of the signal received by the link that direct transfers
Reception state：Success, half success, failure, source and relaying will determine operation in next time slot according to feedback information；And it relays
Node also can select different relay forwarding agreements according to itself to the demodulation success or not of data；
CPU scheduler modules, connect with central control module, for carrying out rational management to multi-core CPU；
Load balancing module is connect with central control module, for after receiving port receives message, generating hardware interrupts,
And hardware interrupts are reported to all CPU cores bound with receiving port simultaneously, and then multi-core CPU handles message simultaneously；
Data encryption module is connect with central control module, is encrypted for the data to controller system；
The encryption upload of user terminal file and user are decrypted and download file, it, will after encryption uploads when file needs shared
User file key gets user terminal, is decrypted to file key in user terminal and then is re-started again with the public key of other side
Encryption generates new file key, is then uploaded to server-side storage, file key is decrypted using private key when other side uses file
And then file is decrypted again and obtains definitive document；
Specifically include following steps：
Step 1, system initialization：
User A is initialized with user B when first logging into system；
User A and user B carries out login system after completing to initialize, and landfall process is as follows：
Automatic acquisition is stored in the key file of third party's storing mechanism by logging in system by user, user terminal, and by registration
Information carries out Hash calculation and gets password key, by password key decruption key file, after being parsed to key file
User's master key and private key for user are obtained respectively, and master key and private key are stored in user terminal；
Step 2, file encryption upload；
Step 3, Cryptograph Sharing；
Step 4, file download decryption；
Step 5 is nullified：
When needing to nullify, user terminal can remove the master key and private key for user for being stored in user terminal automatically；
State display module is connect with central control module, for passing through signal lamp viewing hardware working condition.
2. polymorphic type CPU as described in claim 1 is compatible with industrial controller system, which is characterized in that described in step 1 just
Beginning process includes：
The first step, user enter register interface, provide username & password as required and are registered, then user terminal can be according to note
Volume information generates the user password key for meeting symmetric cryptographic key length requirement in user terminal by hash function；
Second step, user terminal can be locally generated the secure random number that size is m by local function call, and random number is as use
The master key at family, the size of m is determined according to requirement of the symmetric encipherment algorithm to key length, at the same time also in local
Generate the key pair of the asymmetric encryption of user；
Third walks, and user's master key of generation is encrypted with private key for user by password key, generates the close of ciphertext state
File is stored by being uploaded to third-party platform mechanism after coding, is stored into user's registration information list by key file；
The public key of generation is directly uploaded in user's registration information list by the 4th step, is stored to complete to register；
The file upload procedure described in step 2 includes：
The first step, user's A selections need to encrypt the file uploaded, then generate the random number of a safety at random by user terminal,
Length meets symmetric cryptographic key length, using random number as file key；
Second step is encrypted selected file by using file key, and encrypted result is buffered in local；
Third walks, and file key is encrypted by user's master key, and encrypted file key is spliced by file
Mode be spliced to by before the encrypted file of second step, form a new file, preceding m bytes are that encrypted file is close
Key is encrypted file content after m bytes；
The encryption file newly formed is uploaded to server-side and stored by the 4th step, user A.
3. polymorphic type CPU as described in claim 1 is compatible with industrial controller system, which is characterized in that the control of central control module
Method processed includes：
Step 1, time slot 1, source S is with power PSThe information data of oneself is broadcasted, relaying is in reception state with destination；
Step 2, destination demodulate the reception data for the link that direct transfers, and broadcast 3 kinds of demodulation states by feedback channel：
Success, half success, failure；
Step 3, when the received signal to noise ratio for meeting the link that direct transfers is not less than snr threshold, i.e. PSγ >=η, demodulation state be at
Work(, destination feedack are 11, then after receiving feedback information, source is in time slot 2 with power PSSend new information symbol
Number, relay node is kept silent；
Step 4, when being unsatisfactory for PSγ >=η but meet 2PSγ >=η, demodulation state are half success, and destination feedack is 10
Or 01, then upon reception of the feedback information, source is in time slot 2 with power PSRetransmit the information symbol broadcasted in upper time slot, relaying
Node is kept silent；
Step 5, when meeting 2PSγ < η, demodulation state are failure, and destination feedack is 00, then receives feedback information
Afterwards, source is kept silent in time slot 2, and relay node judges connecing for data transmitted by 1 source of time slot according to received signal to noise ratio
Receipts state；
Step 6, when destination demodulation state is failure and relaying is in time slot 1 and meets received signal to noise ratio not less than correct demodulation
Threshold value, i.e. PSα >=η illustrates relay node by the data decoding success transmitted by 1 source of time slot, then relaying is in the use of time slot 2
Decoding forwarding DF agreements by after this data encoding with power PRForwarding, reception information of the destination to direct transfer link and repeated link
It is demodulated after Maximal ratio combiner；
Step 7, when destination demodulation state is failure and relaying is in time slot 1 and meets PSα < η, illustrate relay node fail by
Transmitted by 1 source of time slot data decoding success, then relaying time slot 2 use amplification forwarding AF agreements by this data quantization after with work(
Rate PRForwarding, destination after the reception information Maximal ratio combiner of direct transfer link and repeated link to demodulating；
The spectrum efficiency of the cooperation transmission mechanism implementation method based on feedback information is described as：
Wherein α, β, γ indicate the unit recipient signal-to-noise ratio of S → R, R → D, S → D links respectively.
4. polymorphic type CPU as described in claim 1 is compatible with industrial controller system, which is characterized in that the CPU scheduler modules tune
Degree method is as follows：
First, a CPU in the CPU of the thread and N number of operation in M thread is obtained, wherein M is whole more than 0
Number, N are the integer more than 0；
Then, it will be handled on a CPU that a thread in the M thread is bundled in the CPU of N number of operation.
5. polymorphic type CPU as claimed in claim 4 is compatible with industrial controller system, which is characterized in that described M thread of acquisition
Other N-1 CPU of other M-1 thread and the CPU of N number of operation；
When the M-1 be less than the N-1 when, then by the M-1 thread it is one-to-one be bundled in M-1 run CPU on
Reason；Or when the M-1 is equal to the N-1, by the one-to-one CPU for being bundled in the N-1 operation of the M-1 thread
Upper processing；
Or when the M-1 be more than the N-1 when, by N-1 thread it is one-to-one be bundled in it is described N-1 run CPU on
It handles, is handled on M-N CPU M-N thread being bundled on the CPU of the N-1 operation.
6. polymorphic type CPU as described in claim 1 is compatible with industrial controller system, which is characterized in that the side of load balancing module
Method is as follows：
First, for each receiving port, according to shunting rule by message classification, and according to the receiving queue and report of receiving port
The relations of distribution of literary type are forwarded the packet to there are the receiving queues of the relations of distribution with affiliated type of message；
Then, after receiving port receives message, hardware interrupts are generated, and hardware interrupts are reported to simultaneously and are tied up with receiving port
Fixed all CPU cores；
Finally, each CPU core of hardware interrupts is received in traps processing procedure, from the reception team bound with this CPU core
Row read message.
7. a kind of meter realized polymorphic type CPU described in claim 1~6 any one and be compatible with industrial controller system control method
Calculation machine program.
8. a kind of information data being compatible with industrial controller system equipped with polymorphic type CPU described in claim 1~6 any one
Processing terminal.
9. a kind of computer readable storage medium, including instruction, when run on a computer so that computer is executed as weighed
Profit requires the control method of polymorphic type CPU compatibilities industrial controller system described in 1-6 any one.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109842983A (en) * | 2018-12-28 | 2019-06-04 | 刘明远 | A kind of lamp light control system based on WEB |
| CN110027566A (en) * | 2018-12-31 | 2019-07-19 | 柳姿贝 | The autonomous hedging control device of vehicle under a kind of driver's abnormal conditions |
| CN110083107A (en) * | 2019-05-17 | 2019-08-02 | 南京晓庄学院 | A kind of micro-capacitance sensor Intelligent central policy controlling system and method |
| CN116684074A (en) * | 2023-07-25 | 2023-09-01 | 杭州海康威视数字技术股份有限公司 | Method and device for driving multi-core scheduling algorithm of hardware password module and electronic equipment |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103617071A (en) * | 2013-12-02 | 2014-03-05 | 北京华胜天成科技股份有限公司 | Method and device for improving calculating ability of virtual machine in resource monopolizing and exclusive mode |
| CN104460934A (en) * | 2013-09-13 | 2015-03-25 | 华为终端有限公司 | Scheduling method and device for multi central processing units (CPU) |
| CN104660318A (en) * | 2015-03-16 | 2015-05-27 | 西安科技大学 | Implementation method of cooperative transmission mechanism based on feedback information |
| CN104917759A (en) * | 2015-05-26 | 2015-09-16 | 西安电子科技大学 | Third-party-based safety file storage and sharing system and method |
| CN106293905A (en) * | 2015-06-09 | 2017-01-04 | 宇龙计算机通信科技(深圳)有限公司 | Resource regulating method based on polycaryon processor and device |
| CN106713185A (en) * | 2016-12-06 | 2017-05-24 | 瑞斯康达科技发展股份有限公司 | Load balancing method and apparatus of multi-core CPU |
| CN107479976A (en) * | 2017-08-14 | 2017-12-15 | 郑州云海信息技术有限公司 | A kind of multiprogram example runs lower cpu resource distribution method and device simultaneously |
| CN108259173A (en) * | 2018-01-23 | 2018-07-06 | 武汉城市职业学院 | A kind of mobile Intelligent campus system based on Internet of Things |
| CN108650096A (en) * | 2018-04-23 | 2018-10-12 | 广东水利电力职业技术学院（广东省水利电力技工学校） | A kind of industrial field bus control system |
-
2018
- 2018-05-31 CN CN201810548704.0A patent/CN108803509A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104460934A (en) * | 2013-09-13 | 2015-03-25 | 华为终端有限公司 | Scheduling method and device for multi central processing units (CPU) |
| CN103617071A (en) * | 2013-12-02 | 2014-03-05 | 北京华胜天成科技股份有限公司 | Method and device for improving calculating ability of virtual machine in resource monopolizing and exclusive mode |
| CN104660318A (en) * | 2015-03-16 | 2015-05-27 | 西安科技大学 | Implementation method of cooperative transmission mechanism based on feedback information |
| CN104917759A (en) * | 2015-05-26 | 2015-09-16 | 西安电子科技大学 | Third-party-based safety file storage and sharing system and method |
| CN106293905A (en) * | 2015-06-09 | 2017-01-04 | 宇龙计算机通信科技(深圳)有限公司 | Resource regulating method based on polycaryon processor and device |
| CN106713185A (en) * | 2016-12-06 | 2017-05-24 | 瑞斯康达科技发展股份有限公司 | Load balancing method and apparatus of multi-core CPU |
| CN107479976A (en) * | 2017-08-14 | 2017-12-15 | 郑州云海信息技术有限公司 | A kind of multiprogram example runs lower cpu resource distribution method and device simultaneously |
| CN108259173A (en) * | 2018-01-23 | 2018-07-06 | 武汉城市职业学院 | A kind of mobile Intelligent campus system based on Internet of Things |
| CN108650096A (en) * | 2018-04-23 | 2018-10-12 | 广东水利电力职业技术学院（广东省水利电力技工学校） | A kind of industrial field bus control system |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109842983A (en) * | 2018-12-28 | 2019-06-04 | 刘明远 | A kind of lamp light control system based on WEB |
| CN110027566A (en) * | 2018-12-31 | 2019-07-19 | 柳姿贝 | The autonomous hedging control device of vehicle under a kind of driver's abnormal conditions |
| CN110083107A (en) * | 2019-05-17 | 2019-08-02 | 南京晓庄学院 | A kind of micro-capacitance sensor Intelligent central policy controlling system and method |
| CN116684074A (en) * | 2023-07-25 | 2023-09-01 | 杭州海康威视数字技术股份有限公司 | Method and device for driving multi-core scheduling algorithm of hardware password module and electronic equipment |
| CN116684074B (en) * | 2023-07-25 | 2023-10-20 | 杭州海康威视数字技术股份有限公司 | Method and device for driving multi-core scheduling algorithm of hardware password module and electronic equipment |
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