CN108777577A - A kind of wireless receiver circuit - Google Patents
A kind of wireless receiver circuit Download PDFInfo
- Publication number
- CN108777577A CN108777577A CN201810482142.4A CN201810482142A CN108777577A CN 108777577 A CN108777577 A CN 108777577A CN 201810482142 A CN201810482142 A CN 201810482142A CN 108777577 A CN108777577 A CN 108777577A
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- China
- Prior art keywords
- circuit
- frequency
- interference signal
- amplifier
- signal
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0626—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by filtering
- H03M1/0629—Anti-aliasing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
Abstract
The present invention relates to wireless receiver circuits, including a kind of analog-digital converter circuit with filtering characteristic, the signal transfer function of the analog-digital converter circuit includes multiple poles, at least one of multiple poles pole is located in passband or is less than at a distance from passband the 100% of pass band width, the circuit itself has filter function, so that in wireless receiver circuit, it is no longer necessary to the connection of filter analog-digital converter circuit be arranged；Zero can also be introduced near interference signal so that circuit has trap function, increases the anti-interference ability to larger interference signal.
Description
Technical field
The present invention relates to wireless receiver circuit fields, more particularly to include the wireless receiver for having filtering characteristic ADC
Circuit.
Background technology
With the development of the communication technology, the communication systems of more and more various criterions simultaneously and is deposited.This is allowed for wirelessly
The working environment of reception system becomes to become increasingly complex, it is desirable that ADC has the ability for resisting various interference signals.Such as present
In wireless receiver, around this channel useful signal, often there is also the high reject signals that other communication equipments generate.
This requires systems must have stronger anti-interference ability, avoids disturbed signal jam.In order to reach this purpose, tradition
Way, be before ADC setting filter circuit, interference signal is attenuated in advance, with ensure ADC work normally.Usually
Analog filter is realized by using integrator, and sdmADC is also to be realized by analogue integrator.Such as one
A third-order filter meets the sdm ADC of a second order 60dB, needs five integrators in total, it is contemplated that complex signal processing is then accumulated
Divide device up to ten, brings additional power consumption, cost overhead in this way.Another method is to improve the dynamic range of ADC, ensures it
Big signal and small signal can be handled simultaneously, this also inevitably improves the complexity of design, while also to increase integral
Device number.
Invention content
It is an object of the present invention to above-mentioned shortcoming existing in the prior art is solved, the position of adjustment member pole,
Make it in passband or near pass-band, participate in filtering, remaining pole is kept away from passband, keeps the suppression to quantizing noise
System.
To achieve the above object, the first aspect present invention provides a kind of analog-digital converter circuit, and there are one works for circuit tool
Make passband, which carries out analog-to-digital conversion to input signal, and the frequency of input signal is located in working passband, and the signal of circuit passes
Delivery function includes multiple poles, and at least one of multiple poles pole is located in working passband, although logical positioned at work
Band is outer but is less than the 100% of working passband bandwidth at a distance from working passband.
Preferably, which includes loop filter, and loop filter includes integrator, forward direction amplifier, internal feedback
Circuit, feedback amplifier, the circuit include at least following parameter：The gain of integrator, the coefficient of forward direction amplifier, internal feedback
The coefficient of circuit, the coefficient of feedback amplifier, by adjusting at least one of parameter so that at least one of multiple poles
Pole is located in working passband, although being located at outside working passband at a distance from working passband less than working passband bandwidth
100%.
Preferably, which is also interfered by M interference signal, and the signal transfer function of circuit further includes N number of zero,
N number of zero is equal with the centre frequency of N number of interference signal in M interference signal respectively, wherein M >=N, M and N are just whole
Number.
Preferably, which includes loop filter, and loop filter includes integrator, forward direction amplifier, internal feedback
Circuit, feedback amplifier, circuit include at least following parameter：The gain of integrator, the coefficient of forward direction amplifier, internal feedback electricity
The coefficient on road, the coefficient of feedback amplifier, according to interfering frequency, by adjusting at least one of parameter so that N number of zero point
It is inequal with the centre frequency of N number of interference signal in M interference signal.
The second aspect present invention provides a kind of analog-digital converter circuit, and the signal transfer function of the circuit includes multiple poles
Point, the circuit are also interfered by least one interference signal, which carries out analog-to-digital conversion to the signal less than first frequency,
The circuit is presented the low-frequency filter characteristics that upper limiting frequency is second frequency, minimum in the frequency of at least one interference signal
Frequency is interfering frequency, by adjusting at least one of multiple poles pole so that second frequency is greater than or equal to the first frequency
Rate, and it is less than interfering frequency.
Preferably, circuit includes loop filter, and loop filter includes integrator, forward direction amplifier, internal feedback electricity
Road, feedback amplifier, circuit include at least following parameter：The gain of integrator, the coefficient of forward direction amplifier, internal feedback circuitry
Coefficient, the coefficient of feedback amplifier adjusts at least one of multiple poles pole and specifically includes：In adjusting parameter at least
One.
Preferably, the signal transfer function of the circuit further includes at least N number of trap wave point, and N number of trap wave point is respectively at least one
The centre frequency of N number of interference signal in a interference signal is equal, wherein the number of trap wave point is less than or equal to interference signal
Number, N is positive integer.
Preferably, circuit includes loop filter, and loop filter includes integrator, forward direction amplifier, internal feedback electricity
Road, feedback amplifier, circuit include at least following parameter：The gain of integrator, the coefficient of forward direction amplifier, internal feedback circuitry
Coefficient, the coefficient of feedback amplifier, by adjusting at least one of described parameter so that N number of trap wave point respectively at least
The centre frequency of N number of interference signal in one interference signal is equal.
The third aspect present invention provides one kind, and wireless receiver circuit includes the modulus of first aspect or second aspect
Converter circuit.
The present invention participates in filtering, while the inhibition of member-retaining portion pole conservation degree noise, realizes by adjusting part pole
ADC carries filtering characteristic so that in wireless receiver circuit, filter need not in addition be arranged when using the ADC, adjusting
On the basis of pole, zero can also be introduced near interference signal frequency, increases trap characteristic, increased to larger interference signal
Anti-interference ability.
Description of the drawings
Fig. 1 is a kind of analog-digital converter circuit structural schematic diagram；
Fig. 2 is a kind of discrete time quadravalence ADC structural schematic diagrams provided in an embodiment of the present invention；
Fig. 3 is a kind of tradition dsm ADC poles and zeros assignment schematic diagrames；
Fig. 4 is that one kind provided in an embodiment of the present invention has filtering characteristic dsm ADC poles and zeros assignment schematic diagrames；
Fig. 5 is that the signal of the tradition ADC provided in an embodiment of the present invention and dsm ADC with rate wave property a kind of transmits letter
Several comparison diagrams；
Fig. 6 is that the signal of the tradition ADC provided in an embodiment of the present invention and dsm ADC with trap characteristic a kind of transmits letter
The comparison diagram of number pole distribution；
Fig. 7 is the STF of a kind of tradition ADC and the dsm ADC with trap characteristic provided in an embodiment of the present invention, NTF's
Comparison diagram；
Fig. 8 is a kind of time-domain simulation results figure of the dsm ADC with trap characteristic provided in an embodiment of the present invention；
Fig. 9 is a kind of time-domain simulation results figure of the dsm ADC with trap characteristic provided in an embodiment of the present invention.
Specific implementation mode
The embodiment of the present invention provides a kind of wireless receiver circuit, including a kind of analog-digital converter with filtering characteristic
(Analog to Digital Converter, ADC) circuit, the adc circuit carry filtering characteristic due to itself, it is no longer necessary to
In addition filter is set and ADC is applied in combination.
With reference to the accompanying drawings and examples, technical scheme of the present invention will be described in further detail.
The adc circuit with filtering characteristic can be a kind of adc circuit obtained by adjusting the method for pole distribution.
Fig. 1 is a kind of analog-digital converter (Analog to Digital Converter, ADC) electrical block diagram.Such as
Fig. 1, the circuit include loop filter and quantizer, wherein loop filter is composed in series by multi-stage integrator, wherein L0 tables
The transmission function of signal path is levied, L1 characterizes the transmission function of feedback signal.The output Y of loop filter is analog signal, warp
It crosses quantizer and is converted to digital signal, while introducing quantizing noise.
The pole of NTF can be adjusted can influence the frequency response of STF accordingly, realize specific filtering characteristic.The poles STF
The adjustment of point is mutual indepedent with the Distribution of Zeros of NTF, and the two is separately optimized, and realizes the folding that filtering characteristic inhibits with quantizing noise
In.
By taking a discrete time quadravalence ADC as an example, as shown in Fig. 2, the loop filter of ADC by level Four series connection integrator (Wherein C1-C4 be integrator gain), forward direction amplifier (b1-b5), feedback amplifier (a1-a4) and inside
Feedback circuit (g1, g2) forms.Input signal U is through forward direction amplifiers at different levels (b1-b5) FD feed access, modulated signal
It is converted into discrete digital signal V into quantizer Q, introduces quantizing noise in this process.Digital signal V is again via feedback electricity
Road (a1-a4) feeds back to integrators at different levels, forms a complete mixed signal circuit.By the gain for configuring integrators at different levels
(c1-c4), forward direction amplifier coefficient and feedback factor, may be implemented specific noise transfer function NTF and signal transmits letter
Number STF, characterizes the quantizing noise characteristic and signal transmission characteristics of ADC respectively.It can be with by setting internal feedback coefficient (g1, g2)
So that the zero in NTF is distributed in ADC bandwidth by optimum way, the maximum suppression to quantizing noise is realized.NTF and STF is total
Enjoy four poles.In traditional dsm ADC, these poles are typically remote from ADC passbands, and certain suppression is only played to High-frequency quantization noise
It makes and uses.For input signal, since these poles are far from passband, STF shows as broadband character, to believing outside ADC passbands
Number there is no rejection ability.Its poles and zeros assignment is as shown in Figure 3.
Pole is divided into two parts by the embodiment of the present invention by adjusting the distribution of pole in transmission function, a part to
Ensure the STF filtering characteristics of ADC, another part is to reduce the influence to NTF to the greatest extent, to realize filtering and noise suppressed
Perfect adaptation.
In one example, the position relationship for adjusting at least one of multiple poles pole and passband makes at least one
Pole is located in passband or is less than the 100% of pass band width with passband distance, this part pole participates in ensureing the STF filters of ADC
Wave property, remaining pole are kept away from passband so that NTF keeps enough inhibition to quantizing noise in passband.
In one example, by taking quadravalence dsm ADC as an example, Optimal Distribution of the zero in passband in its NTF is kept, is chosen
Two of which pole is arranged according to second-order low-pass filter, and other poles are kept away from passband.Zero after redesign
Pole distribution is as shown in Figure 4.In Fig. 4, two poles are located in passband, other two pole is kept away from passband, due to only
Part pole composition filter is had chosen, the NTF after adjusting maintains enough inhibition to quantizing noise in passband.And phase
The STF answered then has filtering characteristic.
In one example, adc circuit includes loop filter and quantizer, and loop filter includes integrator, forward direction
The parameter of amplifier, internal feedback circuitry and feedback amplifier, adc circuit includes：The gain of integrator, forward direction amplifier are
Number, the coefficient of internal feedback circuitry and the coefficient of feedback amplifier, can be by adjusting at least one of parameter so that
At least one of multiple poles pole is located in working passband, although positioned at working passband it is outer with working passband away from
From 100% less than working passband bandwidth.
Comparison such as Fig. 5 institutes of the signal transfer function of the traditional dsm ADC and above-mentioned quadravalence dsm ADC with filtering characteristic
Show.From Fig. 5, it can be seen that new dsm ADC have the characteristic of low-pass filtering.
It should be noted that according to the difference of anti-interference ability in actual design demand and precision, for the participation of selection
The number of the pole of filtering, the pole for participating in filtering is relatively close from passband or in passband, and to adjust which parameter, is joined
The amplitude of number adjustment, can all change.
The pole for forming filter simultaneously can also be according to requiring freely to choose the filtering such as butterworth, chebyshev
Device type adapts to different anti-interference requirements.
In one embodiment, which is also interfered the interference of signal, resists to larger interference signal to increase
Interference performance can also introduce zero on the basis of above-mentioned adjustment pole near interference signal so that DAC has trap
Function.
In one example, which is interfered by M interference signal, and the signal transfer function of circuit further includes N number of
Zero, N number of zero are equal with the centre frequency of N number of interference signal in M interference signal respectively, wherein M >=N, M and N are
Positive integer.Wherein, the position of zero can select at the centre frequency of interference signal, specifically introduce several zeros, be root
It is determined according to application design requirement.
In one example, when only there are one when interference signal, there are one zeros, which believes with unique interference
Number centre frequency it is equal.
In one example, when there are three interference signal, zero can there are one, two or three.When only one
When a zero, which is equal to the centre frequency of any one interference signal in three interference signals；When there are two zero, this
Two zeros can be respectively equal to the centre frequency of any two interference signal in three interference signals；When there are three zeros
When, three zeros are respectively equal to the centre frequency of three interference signals.
In one example, can by adjusting the gain of integrator, the coefficient of forward direction amplifier, internal feedback circuitry
Coefficient, at least one of coefficient of feedback amplifier so that N number of zero respectively with N number of interference signal in M interference signal
Centre frequency it is equal.
In one example, the position of zero can select near the centre frequency of interference signal.
The embodiment of the present invention also provides a kind of adc circuit, and the signal transfer function of the circuit includes multiple poles, the circuit
It is also interfered by least one interference signal, which carries out analog-to-digital conversion to the signal less than first frequency, which is in
An existing upper limiting frequency is the low-frequency filter characteristics of second frequency, and minimum frequency is interference frequency in the frequency of multiple interference signals
Rate, by adjusting at least one of multiple poles pole so that second frequency is greater than or equal to first frequency, and less than interference
Frequency.
Herein, second frequency is more than first frequency, and is less than interfering frequency, in order to ensure that adc circuit receives
The wavelength band of signal and the range of its useful signal match, and can filter out interference signal so that adc circuit itself can carry
Filtering characteristic.
In one example, adc circuit includes loop filter and quantizer, and loop filter includes integrator, forward direction
The parameter of amplifier, internal feedback circuitry and feedback amplifier, adc circuit includes：The gain of integrator, forward direction amplifier are
Number, the coefficient of internal feedback circuitry and the coefficient of feedback amplifier.It can be by adjusting at least one of parameter, to adjust
At least one of whole multiple poles pole so that second frequency is more than first frequency, and is less than interfering frequency.
In one embodiment, the signal transfer function of the circuit further includes trap wave point, and trap wave point appears in interference signal
Near.
In one example, the signal transfer function of the circuit further includes at least N number of trap wave point, N number of trap wave point respectively with
The centre frequency of N number of interference signal at least one interference signal is equal, wherein the number of trap wave point is less than or equal to dry
The number of signal is disturbed, N is positive integer.Wherein, the position of trap wave point can select at the centre frequency of interference signal, specifically
Several trap wave points are introduced, are determined according to application design requirement.
In one example, when only there are one when interference signal, there are one trap wave points, the trap wave point is unique dry with this
The centre frequency for disturbing signal is equal.
In one example, when there are three interference signal, trap wave point can there are one, two or three.When only
When one trap wave point, which is equal to the centre frequency of any one interference signal in three interference signals；When there are two fall into
When wave point, the two trap wave points can be respectively equal to the centre frequency of any two interference signal in three interference signals；When
There are three when trap wave point, three trap wave points are respectively equal to the centre frequency of three interference signals.
In one example, can by adjusting the gain of integrator, the coefficient of forward direction amplifier, internal feedback circuitry
One or more in the coefficient of coefficient and feedback amplifier so that N number of trap wave point respectively at least one interference signal
In N number of interference signal centre frequency it is equal.
In a specific embodiment, by taking the dsm adc circuits of five ranks as an example, 3 poles is chosen and participate in filtering,
The real zero of two STF is introduced near interfering frequency.The pole of the signal transfer function of the circuit as shown in fig. 6,
In Fig. 6, it is pole location in the prior art that the point come is not enclosed by "○", and it is to have pole participation that the point come is enclosed by "○"
The pole location of filtering, STF, NTF are as shown in fig. 7, in the figure 7, curve with "×" label and with "○" is distinguished
STF, NTF in the prior art are represented, curve with " " label and with " ☆ " respectively represents in the embodiment of the present invention
STF, NTF, it can be seen from figure 7 that frequency be 0.2 × 107Hz and 0.4 × 107At Hz, there is trap, thus will
The free transmission range of ADC is compressed to the range to match with the working frequency range of ADC so that ADC inherently carries filter function.
Table its dynamic range can be calculated in time-domain simulation results Fig. 8 of this circuit and has reached 91dB, on the basis of Fig. 8
Upper addition filtering characteristic obtains Fig. 9, it can be seen in figure 9 that believing simultaneously there is strong jamming situation interfering signal to be filtered out
Number dynamic range is also maintained at 91dB, adds the structure of ADC to compare with conventional filter, same five integrator circuits, I
Realize filtering trap function while greatly improving the signal-to-noise ratio of ADC close to 30dB.In other words, we can reduce electricity
Road Save power consumption circuit area.
Present invention could apply to discrete times and continuous time dsm ADC, for wireless receiver circuit, continuous time
Dsm ADC have anti-aliasing effect itself, while circuit gain can be realized by adjusting ADC input resistances size, from
Without in addition using filter/PGA circuits, the design of receiver circuit is greatly simplified, power consumption is reduced and reduces face
Product.
Using dsm ADC of the present invention, the filter circuit needed for traditional ADC can be saved, saves power consumption and cost.
Meanwhile the dsm ADC with filter characteristic rely on to the rejection ability with outer high reject signal, compare traditional dsm ADC, it can
To realize the signal handling capacity under same interference environment with less exponent number, itself also has higher energy consumption and cost excellent
Gesture.Dsm ADC of the present invention are very suitable for low-power consumption, inexpensive application scenarios.
Realize that Gain tuning, wireless receiver no longer need traditional adjustable gain circuit by adjusting ADC input resistances.
Wireless receiver circuit provided in an embodiment of the present invention, using the adc circuit with filtering characteristic, the adc circuit by
Filtering characteristic is carried in itself, it is no longer necessary in addition filter be set and ADC is applied in combination.
Above specific implementation mode has carried out further in detail the purpose of the present invention, technical solution and advantageous effect
Illustrate, it should be understood that these are only the specific implementation mode of the present invention, the protection model being not intended to limit the present invention
It encloses, all within the spirits and principles of the present invention, any modification, equivalent substitution, improvement and etc. done should be included in the present invention
Protection domain within.
Claims (9)
1. a kind of analog-digital converter circuit, which is characterized in that for the circuit tool there are one working passband, the circuit believes input
Number analog-to-digital conversion is carried out, the frequency of the input signal is located in the working passband, the signal transfer function packet of the circuit
Containing multiple poles,
At least one of the multiple pole pole is located in working passband, although being located at outside working passband and work
The distance of passband is less than the 100% of working passband bandwidth.
2. circuit according to claim 1, which is characterized in that the circuit includes loop filter, the loop filtering
Device includes integrator, and forward direction amplifier, internal feedback circuitry, feedback amplifier, the circuit is including at least following parameter：It is described
The gain of integrator, the coefficient of the forward direction amplifier, the coefficient of the internal feedback circuitry, the feedback amplifier are
Number,
By adjusting at least one of described parameter so that at least one of the multiple pole pole is located at working passband
It is interior, although being located at outside working passband at a distance from working passband less than the 100% of working passband bandwidth.
3. circuit according to claim 1, which is characterized in that the circuit is also interfered by M interference signal, described
The signal transfer function of circuit further includes N number of zero, and N number of zero is believed with N number of interference in the M interference signal respectively
Number centre frequency it is equal, wherein M >=N, M and N are positive integers.
4. circuit according to claim 3, which is characterized in that the circuit includes loop filter, the loop filtering
Device includes integrator, and forward direction amplifier, internal feedback circuitry, feedback amplifier, the circuit is including at least following parameter：It is described
The gain of integrator, the coefficient of the forward direction amplifier, the coefficient of the internal feedback circuitry, the feedback amplifier are
Number,
By adjusting at least one of described parameter so that N number of zero respectively with it is N number of in the M interference signal
The centre frequency of interference signal is equal.
5. a kind of analog-digital converter circuit, which is characterized in that the signal transfer function of the circuit includes multiple poles, the electricity
Road is also interfered by least one interference signal, and the circuit carries out analog-to-digital conversion to the signal less than first frequency, described
Circuit is presented the low-frequency filter characteristics that upper limiting frequency is second frequency, minimum in the frequency of at least one interference signal
Frequency be interfering frequency,
By adjusting at least one of the multiple pole pole so that the second frequency is greater than or equal to first frequency
Rate, and it is less than the interfering frequency.
6. circuit according to claim 5, which is characterized in that the circuit includes loop filter, the loop filtering
Device includes integrator, and forward direction amplifier, internal feedback circuitry, feedback amplifier, the circuit is including at least following parameter：It is described
The gain of integrator, the coefficient of the forward direction amplifier, the coefficient of the internal feedback circuitry, the feedback amplifier are
Number,
At least one of the multiple pole of adjustment pole specifically includes：Adjust at least one of described parameter.
7. circuit according to claim 5, which is characterized in that the signal transfer function of the circuit further includes N number of trap
Point, N number of trap wave point are equal with the centre frequency of N number of interference signal at least one interference signal respectively, wherein
The number of trap wave point is less than or equal to the number of at least one interference signal, and N is positive integer.
8. according to the circuit described in claim 7, which is characterized in that the circuit includes loop filter, the loop filter
Including integrator, forward direction amplifier, internal feedback circuitry, feedback amplifier, the circuit is including at least following parameter：The product
The gain of point device, the coefficient of the forward direction amplifier, the coefficient of the internal feedback circuitry, the coefficient of the feedback amplifier,
By adjusting at least one of described parameter so that N number of trap wave point respectively at least one interference signal
In N number of interference signal centre frequency it is equal.
9. a kind of wireless receiver circuit, including such as a kind of analog-digital converter circuit according to any one of claims 1-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810482142.4A CN108777577A (en) | 2018-05-18 | 2018-05-18 | A kind of wireless receiver circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810482142.4A CN108777577A (en) | 2018-05-18 | 2018-05-18 | A kind of wireless receiver circuit |
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| CN108777577A true CN108777577A (en) | 2018-11-09 |
Family
ID=64027256
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| CN201810482142.4A Pending CN108777577A (en) | 2018-05-18 | 2018-05-18 | A kind of wireless receiver circuit |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1290427A (en) * | 1998-10-08 | 2001-04-04 | 皇家菲利浦电子有限公司 | radio receiver |
| US7307565B1 (en) * | 2005-12-22 | 2007-12-11 | Cirrus Logic, Inc. | Signal processing system with delta-sigma modulation and FIR filter post processing to reduce near out of band noise |
| US20110102222A1 (en) * | 2009-10-30 | 2011-05-05 | Stmicroelectronics Design & Application Gmbh | Continuous time sigma-delta a/d converter and electrical system comprising the a/d converter |
| US8294605B1 (en) * | 2009-12-16 | 2012-10-23 | Syntropy Systems, Llc | Conversion of a discrete time quantized signal into a continuous time, continuously variable signal |
| CN102843323A (en) * | 2011-06-20 | 2012-12-26 | 苏州东奇信息科技有限公司 | Asymmetric binary modulation signal receiver |
| CN103299549A (en) * | 2010-12-03 | 2013-09-11 | 马维尔国际贸易有限公司 | A continuous time sigma-delta adc with embedded low-pass filter |
| CN103326694A (en) * | 2013-05-23 | 2013-09-25 | 江苏天源电子有限公司 | Novel calibration complex filter |
-
2018
- 2018-05-18 CN CN201810482142.4A patent/CN108777577A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1290427A (en) * | 1998-10-08 | 2001-04-04 | 皇家菲利浦电子有限公司 | radio receiver |
| US7307565B1 (en) * | 2005-12-22 | 2007-12-11 | Cirrus Logic, Inc. | Signal processing system with delta-sigma modulation and FIR filter post processing to reduce near out of band noise |
| US20110102222A1 (en) * | 2009-10-30 | 2011-05-05 | Stmicroelectronics Design & Application Gmbh | Continuous time sigma-delta a/d converter and electrical system comprising the a/d converter |
| US8294605B1 (en) * | 2009-12-16 | 2012-10-23 | Syntropy Systems, Llc | Conversion of a discrete time quantized signal into a continuous time, continuously variable signal |
| CN103299549A (en) * | 2010-12-03 | 2013-09-11 | 马维尔国际贸易有限公司 | A continuous time sigma-delta adc with embedded low-pass filter |
| CN102843323A (en) * | 2011-06-20 | 2012-12-26 | 苏州东奇信息科技有限公司 | Asymmetric binary modulation signal receiver |
| CN103326694A (en) * | 2013-05-23 | 2013-09-25 | 江苏天源电子有限公司 | Novel calibration complex filter |
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Application publication date: 20181109 |