CN108768311B - Nonlinear regulator and dead zone circuit thereof - Google Patents

Nonlinear regulator and dead zone circuit thereof Download PDF

Info

Publication number
CN108768311B
CN108768311B CN201810746419.XA CN201810746419A CN108768311B CN 108768311 B CN108768311 B CN 108768311B CN 201810746419 A CN201810746419 A CN 201810746419A CN 108768311 B CN108768311 B CN 108768311B
Authority
CN
China
Prior art keywords
resistor
voltage
input end
dead zone
inputting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201810746419.XA
Other languages
Chinese (zh)
Other versions
CN108768311A (en
Inventor
杨波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Foshan University
Original Assignee
Foshan University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Foshan University filed Critical Foshan University
Priority to CN201810746419.XA priority Critical patent/CN108768311B/en
Publication of CN108768311A publication Critical patent/CN108768311A/en
Application granted granted Critical
Publication of CN108768311B publication Critical patent/CN108768311B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3211Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45076Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention discloses a nonlinear regulator and a dead zone circuit thereof, comprising: a first differential amplifying circuit for outputting a first linear amplified signal; a second differential amplifying circuit for outputting a second linear amplified signal; the first voltage comparator is used for inputting a second direct-current voltage at the non-inverting input end and inputting a voltage input signal at the inverting input end; the second voltage comparator is used for inputting a first direct-current voltage at the in-phase input end and inputting a voltage input signal at the opposite-phase input end; the fourth input end is connected with the output end of the second differential amplifying circuit, the first gating controlled end is connected with the output end of the first voltage comparator, and the second gating controlled end is connected with the output end of the second voltage comparator. The nonlinear regulator and the dead zone circuit thereof have high response speed and can obtain accurate and stable dead zone.

Description

Nonlinear regulator and dead zone circuit thereof
Technical Field
The invention relates to the technical field of automatic process control, in particular to a nonlinear regulator and a dead zone circuit thereof.
Background
The dead zone circuit is a nonlinear amplifying circuit with dead zone, and is characterized in that when an input signal is positioned in a set range, the output signal of the dead zone circuit is always 0; when the input signal exceeds the set range, the output signal of the dead zone circuit changes along with the input signal; the range of the input signal corresponding to the output signal always being 0 is called a dead zone of the dead zone circuit.
Dead band circuits have been widely used in analog computing circuits and process control systems in nonlinear regulators where they play a critical role. The traditional dead zone circuit mainly comprises an operational amplifier, a diode and a resistor network, and the dead zone characteristic is realized by selecting the on or off state of the diode, however, because the diode is not an ideal switching element, the threshold voltage needs to be overcome when the diode is conducted; when the diode is cut off, leakage current exists; in addition, the diode is extremely susceptible to the influence of the ambient temperature and unstable, so that the conventional dead zone circuit has the problems that the response speed is relatively low, and accurate and stable dead zone is difficult to obtain.
Disclosure of Invention
In view of the above problems, a nonlinear regulator and a dead zone circuit thereof of the present invention have a fast response speed and can obtain an accurate and stable dead zone.
In order to solve the above technical problem, a dead zone circuit of the present invention includes:
the first differential amplifying circuit is provided with a first input end, a second input end and an output end, wherein the first input end is used for inputting a first direct-current voltage, the second input end is used for inputting a voltage input signal, and the output end is used for outputting a first linear amplifying signal;
the second differential amplifying circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the second differential amplifying circuit is used for inputting a second direct-current voltage, the second input end of the second differential amplifying circuit is used for inputting the voltage input signal, and the output end of the second differential amplifying circuit is used for outputting a second linear amplifying signal;
the first voltage comparator is used for inputting the second direct-current voltage at the non-inverting input end and inputting the voltage input signal at the inverting input end;
the non-inverting input end of the second voltage comparator is used for inputting the first direct-current voltage, and the inverting input end of the second voltage comparator is used for inputting the voltage input signal;
the four-way switch is provided with a first input end, a second input end, a third input end, a fourth input end, a first gating controlled end, a second gating controlled end and an output end, wherein the first input end of the four-way switch is connected with the output end of the first differential amplifying circuit, the second input end of the four-way switch and the third input end of the four-way switch are grounded, the fourth input end of the four-way switch is connected with the output end of the second differential amplifying circuit, the first gating controlled end is connected with the output end of the first voltage comparator, and the second gating controlled end is connected with the output end of the second voltage comparator.
As an improvement of the above-described aspect, the dead zone circuit further includes:
and the non-inverting input end of the voltage follower is connected with the output end of the one-out-of-four switch, and the inverting input end of the voltage follower is connected with the output end.
As an improvement of the above-described aspect, the first differential amplifying circuit includes: the first operational amplifier, the first resistor, the second resistor, the third resistor and the fourth resistor; wherein, the liquid crystal display device comprises a liquid crystal display device,
one end of the first resistor is used as a first input end of the first differential amplifying circuit and is used for inputting the first direct-current voltage, the other end of the first resistor is connected with an inverting input end of the first operational amplifier and one end of the second resistor, and the other end of the second resistor is connected with an output end of the first operational amplifier;
one end of the third resistor is used as a second input end of the first differential amplifying circuit and is used for inputting the voltage input signal, the other end of the third resistor is connected with the non-inverting input end of the first operational amplifier and one end of the fourth resistor, and the other end of the fourth circuit is grounded.
As an improvement of the above-mentioned scheme, the resistance value of the first resistor is equal to the resistance value of the third resistor; the resistance value of the second resistor is equal to the resistance value of the fourth resistor.
As an improvement of the above-described aspect, the second differential amplifying circuit includes: a second operational amplifier, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor; wherein, the liquid crystal display device comprises a liquid crystal display device,
one end of the fifth resistor is used as a first input end of the second differential amplifying circuit and is used for inputting the second direct-current voltage, the other end of the fifth resistor is connected with an inverting input end of the second operational amplifier and one end of the sixth resistor, and the other end of the sixth resistor is connected with an output end of the second operational amplifier;
one end of the seventh resistor is used as a second input end of the second differential amplifying circuit and is used for inputting the voltage input signal, the other end of the seventh resistor is connected with the non-inverting input end of the second operational amplifier and one end of the eighth resistor, and the other end of the eighth resistor is grounded.
As an improvement of the above-described aspect, a resistance value of the fifth resistor, a resistance value of the seventh resistor, and the like; the resistance value of the sixth resistor is equal to the resistance value of the eighth resistor.
As an improvement of the above scheme, the voltage value of the first dc voltage is equal to the voltage value of the second dc voltage, and the polarity of the first dc voltage is opposite to the polarity of the second dc voltage.
In order to solve the above technical problem, the present invention further provides a nonlinear regulator, including: any one of the dead zone circuits described above.
Compared with the prior art, the nonlinear regulator and the dead zone circuit thereof control one of the output of the first differential amplifying circuit or the output of the second differential amplifying circuit or the ground corresponding to the one-out-of-four switch gating according to the input voltage signal, so that the dead zone circuit has higher response speed, the use of diodes in the traditional scheme is avoided, and the devices adopted by the nonlinear regulator and the dead zone circuit thereof have higher stability and are not easily influenced by the ambient temperature, so that the nonlinear regulator and the dead zone circuit thereof can obtain accurate and stable dead zone.
Drawings
Fig. 1 is a schematic diagram of a dead zone circuit according to embodiment 1 of the present invention.
Fig. 2 is a schematic diagram of a dead zone circuit according to embodiment 2 of the present invention.
Fig. 3 is a signal transmission characteristic diagram of the dead zone circuit in the embodiment of the present invention.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The invention may be embodied in many other forms than described herein and similarly practiced by those skilled in the art without departing from the spirit or scope of the invention, which is therefore not limited to the specific embodiments disclosed below.
The technical scheme of the present invention is clearly and completely described below with reference to specific embodiments and drawings.
Example 1
As shown in fig. 1, a dead zone circuit of embodiment 1 of the present invention.
The dead zone circuit includes: the first differential amplifying circuit 1 has a first input terminal for inputting a first DC voltage-E, a second input terminal for inputting a voltage input signal U, and an output terminal i Output end U 1 For outputting a first linearly amplified signal; a second differential amplifying circuit 2 having a first input terminal for inputting a second DC voltage +E, a second input terminal for inputting a voltage input signal U, and an output terminal i Output end U 2 For outputting a second linearly amplified signal; first voltage comparator A 3 The non-inverting input end is used for inputting a second direct voltage +E, and the inverting input end is used for inputting a voltage input signal U i The method comprises the steps of carrying out a first treatment on the surface of the Second voltage comparator A 4 The non-inverting input end is used for inputting a first direct current voltage-E, and the inverting input end is used for inputting a voltage input signal U i The method comprises the steps of carrying out a first treatment on the surface of the A switch 3 having a first input end and an output end U of the first differential amplifying circuit 1 1 The second input end and the third input end are grounded, and the fourth input end is grounded to the output end U of the second differential amplifying circuit 2 2 A first gating control end A is connected with a first voltage comparator A 3 Output terminal U of (2) 3 A second gating control end B is connected with a second voltage comparator A 4 Output terminal U of (2) 4 The output end Y of the switch 3 is the output end of a dead zone circuit.
Next, the operation of embodiment 1 of the present invention will be described with reference to fig. 1 and 3.
When U is i When < -E, the first voltage comparator A 3 Output terminal U of (2) 3 And a second voltage comparator A 4 Output terminal U of (2) 4 The first gating control end A and the second gating control end B of the one-out-of-four switch 3 are controlled to be connected with the high level, the one-out-of-four switch 3 controls the first input end to be connected with the output end Y, and at the moment, Y-U 1 The output end Y of the switch 3 is conducted, and a first linear amplified signal is output;
when-E is less than or equal to U i When less than or equal to +E, the first voltage comparator A 3 Output terminal U of (2) 3 Output high level, second voltage comparator A 4 Output terminal U of (2) 4 Outputting a low level, namely controlling a first gating control end A of the one-out-of-four switch 3 to be connected with a high level and a second gating control end B to be connected with a low level, wherein the one-out-of-four switch 3 controls a second input end to be connected with an output end Y, at the moment, Y is conducted in a ground mode, and the voltage output by the output end Y of the one-out-of-four switch 3 is 0;
when U is i When > +E, the first voltage comparator A 3 Output terminal U of (2) 3 And a second voltage comparator A 4 Output terminal U of (2) 4 The first gating control end A and the second gating control end B of the one-out-of-four switch 3 are respectively connected with the low level, the one-out-of-four switch 3 controls the fourth input end to be connected with the output end Y, and at the moment, the Y-U 2 The output end Y of the switch 3 is conducted and outputs a second linear amplified signal.
Specifically, as shown in fig. 1, the first differential amplification circuit 1 includes: first operational amplifier A 1 A first resistor R 1 A second resistor R 2 Third resistor R 3 And a fourth resistor R 4 The method comprises the steps of carrying out a first treatment on the surface of the Wherein R of the first resistance 1 One end is used as a first input end of the first differential amplifying circuit for inputting a first direct current voltage-E and a first resistor R 1 And the other end of the first operational amplifier A 1 Is connected with the second resistor R 2 Is connected to one end of a second resistor R 2 And the other end of the first operational amplifier A 1 Output terminal U of (2) 1 Connecting; third resistor R 3 Is used as the second input end of the first differential amplifying circuit for inputting the voltage input signal U i Third resistor R 3 And the other end of the first operational amplifier A 1 In-phase input terminal of (a) and fourth resistor R 4 Is connected to one end of a fourth resistor R 4 The other end of which is grounded.
The second differential amplifying circuit 2 includes: second operational amplifier A 2 Fifth electricityR resistance 5 Sixth resistor R 6 Seventh resistor R 7 And an eighth resistor R 8 The method comprises the steps of carrying out a first treatment on the surface of the Wherein the fifth resistor R 5 A fifth resistor R for inputting a second DC voltage +E as a first input terminal of the second differential amplifying circuit 5 And the other end of the second operational amplifier A 2 Is connected with the inverting input terminal of the (C) and the sixth resistor R 6 Is connected to one end of a sixth resistor R 6 And the other end of the second operational amplifier A 2 Output terminal U of (2) 2 Connecting; seventh resistor R 7 Is used as the second input end of the second differential amplifying circuit for inputting the voltage input signal U i Seventh resistor R 7 And the other end of the second operational amplifier A 2 Is connected with the non-inverting input terminal of the resistor R 8 Is connected to one end of an eighth resistor R 8 The other end of which is grounded.
Preferably, R 1 =R 3 =R 5 =R 7 =R,R 2 =R 4 =R 6 =R 8 =R F A first operational amplifier A in the first differential amplifying circuit 1 1 Output terminal U 1 Output first linear amplified signal U O1 Is thatSecond operational amplifier a in second differential amplifying circuit 2 2 Output terminal U 2 Outputting a second linear amplified signal U O2 Is->Wherein the first linear amplified signal U O1 And a second linearly amplified signal U O2 Has the same slope K, k=r F /R。
Preferably, the voltage value of the first direct current voltage-E is equal to the voltage value of the second direct current voltage +e, the polarity of the first direct current voltage-E is opposite to the polarity of the second direct current voltage +e, the voltage value of the first voltage signal-E is equal to the voltage value of the second voltage signal +e, and the directions of the voltage values are opposite, so that the dead zone section of the dead zone circuit is conveniently set.
Example 2
As shown in fig. 2, is another dead zone circuit of the present invention.
The dead zone circuit includes, in addition to all the components in embodiment 1: voltage follower A 5 The voltage follower A 5 The in-phase input end of (2) is connected with the output end Y of the one-out-of-four switch 3, and the opposite-phase input end is connected with the output end U O Is connected to output a first linear amplified signal U via the output terminal Y of the one-out-of-four switch 3 O1 Or a second linearly amplified signal U O2 Or 0, can pass through the voltage follower A 5 Output terminal U of (2) O And outputting, namely realizing isolation of output signals and improving the stability of the output signals.
In summary, as shown in FIGS. 1 and 2, when the voltage signal U is inputted i Meet the condition that E is less than or equal to U i When less than or equal to +E, the dead zone circuit works in the dead zone section, and the output end U of the dead zone circuit O Is U Out =0; when U is i When < -E, the dead zone circuit works in the linear amplifying region, and the output end U of the dead zone circuit O Is the output voltage of (a)When U is i When > +E, the dead zone circuit works in the linear amplifying region, and the output end U of the dead zone circuit O Is +.>
Further, the present invention also provides a nonlinear regulator comprising: any one of the dead zone circuits described above.
Compared with the prior art, the nonlinear regulator and the dead zone circuit thereof have the following beneficial effects:
(1) The first voltage comparator and the second voltage comparator control one of the output of the first differential amplifying circuit or the output of the second differential amplifying circuit or the ground corresponding to the one-fourth switch gating according to the input voltage signal, and then the output signal is used as an output signal of a dead zone circuit, so that the dead zone circuit has a faster response speed, and the use of a diode in the traditional scheme is avoided; the nonlinear regulator and the dead zone circuit thereof can obtain accurate and stable dead zone because the adopted devices have higher stability and are not easily influenced by the ambient temperature;
(2) The linear regulator and the dead zone circuit thereof can be realized by setting resistors R and R F The precision of the output signal of the dead zone circuit in the linear amplifying region is improved;
(3) The anti-interference capability of the circuit can be improved by connecting the voltage follower with the output end of the one-out-of-four switch;
(4) The linear regulator and the dead zone circuit thereof have the characteristics of simple circuit structure, good linearity, low cost and small nonlinear influence on the regulating system.
The present invention is not limited to the preferred embodiments, and any simple modification, equivalent variation and modification made to the above embodiments according to the technical substance of the present invention will still fall within the scope of the technical solution of the present invention.

Claims (8)

1. A dead zone circuit, comprising:
the first differential amplifying circuit is provided with a first input end, a second input end and an output end, wherein the first input end is used for inputting a first direct-current voltage, the second input end is used for inputting a voltage input signal, and the output end is used for outputting a first linear amplifying signal;
the second differential amplifying circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the second differential amplifying circuit is used for inputting a second direct-current voltage, the second input end of the second differential amplifying circuit is used for inputting the voltage input signal, and the output end of the second differential amplifying circuit is used for outputting a second linear amplifying signal;
the first voltage comparator is used for inputting the second direct-current voltage at the non-inverting input end and inputting the voltage input signal at the inverting input end;
the non-inverting input end of the second voltage comparator is used for inputting the first direct-current voltage, and the inverting input end of the second voltage comparator is used for inputting the voltage input signal;
the fourth input end of the fourth switch is connected with the output end of the second differential amplifying circuit, the first gating controlled end is connected with the output end of the first voltage comparator, and the second gating controlled end is connected with the output end of the second voltage comparator;
when the input voltage input signal is smaller than the first direct-current voltage, the output end of the first voltage comparator and the output end of the second voltage comparator both output high level, the first gating controlled end and the second gating controlled end of the fourth switch are controlled to be connected with high level, the fourth switch controls the first input end to be connected with the output end, the output end of the fourth switch is conducted with the output end of the first differential amplifying circuit, and the output end of the fourth switch outputs a first linear amplifying signal.
2. The dead zone circuit of claim 1, further comprising:
and the non-inverting input end of the voltage follower is connected with the output end of the one-out-of-four switch, and the inverting input end of the voltage follower is connected with the output end.
3. The dead zone circuit of claim 1, wherein the first differential amplification circuit comprises: the first operational amplifier, the first resistor, the second resistor, the third resistor and the fourth resistor; wherein, the liquid crystal display device comprises a liquid crystal display device,
one end of the first resistor is used as a first input end of the first differential amplifying circuit and is used for inputting the first direct-current voltage, the other end of the first resistor is connected with an inverting input end of the first operational amplifier and one end of the second resistor, and the other end of the second resistor is connected with an output end of the first operational amplifier;
one end of the third resistor is used as a second input end of the first differential amplifying circuit and is used for inputting the voltage input signal, the other end of the third resistor is connected with the non-inverting input end of the first operational amplifier and one end of the fourth resistor, and the other end of the fourth resistor is grounded.
4. The dead zone circuit of claim 3, wherein the resistance value of the first resistor is equal to the resistance value of the third resistor; the resistance value of the second resistor is equal to the resistance value of the fourth resistor.
5. The dead zone circuit of claim 1, wherein the second differential amplification circuit comprises: a second operational amplifier, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor; wherein, the liquid crystal display device comprises a liquid crystal display device,
one end of the fifth resistor is used as a first input end of the second differential amplifying circuit and is used for inputting the second direct-current voltage, the other end of the fifth resistor is connected with an inverting input end of the second operational amplifier and one end of the sixth resistor, and the other end of the sixth resistor is connected with an output end of the second operational amplifier;
one end of the seventh resistor is used as a second input end of the second differential amplifying circuit and is used for inputting the voltage input signal, the other end of the seventh resistor is connected with the non-inverting input end of the second operational amplifier and one end of the eighth resistor, and the other end of the eighth resistor is grounded.
6. The dead zone circuit of claim 5, wherein the resistance value of the fifth resistor is equal to the resistance value of the seventh resistor; the resistance value of the sixth resistor is equal to the resistance value of the eighth resistor.
7. The dead zone circuit of claim 1, wherein the voltage value of the first dc voltage is equal in magnitude to the voltage value of the second dc voltage, and the polarity of the first dc voltage is opposite to the polarity of the second dc voltage.
8. A non-linear regulator, comprising: the dead zone circuit of any of claims 1 to 7.
CN201810746419.XA 2018-07-09 2018-07-09 Nonlinear regulator and dead zone circuit thereof Active CN108768311B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810746419.XA CN108768311B (en) 2018-07-09 2018-07-09 Nonlinear regulator and dead zone circuit thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810746419.XA CN108768311B (en) 2018-07-09 2018-07-09 Nonlinear regulator and dead zone circuit thereof

Publications (2)

Publication Number Publication Date
CN108768311A CN108768311A (en) 2018-11-06
CN108768311B true CN108768311B (en) 2023-08-25

Family

ID=63972940

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810746419.XA Active CN108768311B (en) 2018-07-09 2018-07-09 Nonlinear regulator and dead zone circuit thereof

Country Status (1)

Country Link
CN (1) CN108768311B (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201078843Y (en) * 2007-06-05 2008-06-25 广州信锐电子科技有限公司 Sine wave signal fixed amplitude and fixed voltage converting circuit with high precision, broad band and low aberration
CN102243505A (en) * 2011-07-07 2011-11-16 杭州矽力杰半导体技术有限公司 Low-offset and fast-response voltage-controlled current source, control method and power circuit applying voltage-controlled current source
CN106059522A (en) * 2016-05-19 2016-10-26 中国电子科技集团公司第三十六研究所 Method and circuit for avoiding overshoot of power amplifier
CN107040228A (en) * 2017-06-09 2017-08-11 佛山科学技术学院 A kind of failure circuit suitable for dead-band regulator
CN206892706U (en) * 2017-06-27 2018-01-16 哈尔滨理工大学 A kind of current comparator VCCS
CN108258900A (en) * 2016-12-28 2018-07-06 上海甄平半导体有限公司 A kind of DC to DC converter and power supply modulator
CN208386500U (en) * 2018-07-09 2019-01-15 佛山科学技术学院 A kind of dead-band regulator and its dead-zone circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7495940B2 (en) * 2005-08-19 2009-02-24 Honeywell International Inc. Method and device for producing rectifier gating signals using a peak detector

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201078843Y (en) * 2007-06-05 2008-06-25 广州信锐电子科技有限公司 Sine wave signal fixed amplitude and fixed voltage converting circuit with high precision, broad band and low aberration
CN102243505A (en) * 2011-07-07 2011-11-16 杭州矽力杰半导体技术有限公司 Low-offset and fast-response voltage-controlled current source, control method and power circuit applying voltage-controlled current source
CN106059522A (en) * 2016-05-19 2016-10-26 中国电子科技集团公司第三十六研究所 Method and circuit for avoiding overshoot of power amplifier
CN108258900A (en) * 2016-12-28 2018-07-06 上海甄平半导体有限公司 A kind of DC to DC converter and power supply modulator
CN107040228A (en) * 2017-06-09 2017-08-11 佛山科学技术学院 A kind of failure circuit suitable for dead-band regulator
CN206892706U (en) * 2017-06-27 2018-01-16 哈尔滨理工大学 A kind of current comparator VCCS
CN208386500U (en) * 2018-07-09 2019-01-15 佛山科学技术学院 A kind of dead-band regulator and its dead-zone circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PWM型D类音频功率放大器的设计;蔡艳艳;李文方;;现代显示(第08期);144-151 *

Also Published As

Publication number Publication date
CN108768311A (en) 2018-11-06

Similar Documents

Publication Publication Date Title
JP4442746B2 (en) Exponential function generator and variable gain amplifier using the same
JPS615608A (en) Wide band, variable gain, differential input direct couplingamplifier
US8143880B2 (en) Dual-range measurement of electrical current
GB798523A (en) Improvements relating to transistor amplifier circuits
KR100843065B1 (en) Linearized class c amplifier with dynamic biasing
JPH04273610A (en) Filter circuit for integrated circuit
CN108768311B (en) Nonlinear regulator and dead zone circuit thereof
JPH0865134A (en) Buffer circuit
US2813934A (en) Transistor amplifier
US2848564A (en) Temperature stabilized transistor amplifier
CN106941343A (en) A kind of linear variable gain amplifier
CN208386500U (en) A kind of dead-band regulator and its dead-zone circuit
CN103744463B (en) The variable reference power supply of dutycycle can be detected
US8941438B2 (en) Bandwidth limiting for amplifiers
CN206790449U (en) A kind of failure circuit suitable for dead-band regulator
CN204360862U (en) Numerical control rheostat
JP2012151539A (en) Transmission power control circuit
US20110140738A1 (en) Multi-Phase Integrators in Control Systems
AU701157B2 (en) Improvements to a logarithmic converter
EP3477863B1 (en) Dynamic amplifying circuit
WO2016001207A1 (en) Class ab amplifier with bias control
CN211044050U (en) Resistance sensor common mode voltage zero stabilization circuit and resistance type transmitter
CN216086592U (en) Electronic device
CN117311441B (en) Current mirror circuit, method and device
SU660196A1 (en) Matching amplifier

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant