CN108745394A - A kind of catalysis material and preparation method - Google Patents

A kind of catalysis material and preparation method Download PDF

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CN108745394A
CN108745394A CN201810328402.2A CN201810328402A CN108745394A CN 108745394 A CN108745394 A CN 108745394A CN 201810328402 A CN201810328402 A CN 201810328402A CN 108745394 A CN108745394 A CN 108745394A
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temperature
catalysis material
current
programmable gate
gate array
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杨勇
曹文斌
王海宝
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Chongqing Three Gorges University
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B01PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01JCHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS OR COLLOID CHEMISTRY; THEIR RELEVANT APPARATUS
    • B01J37/00Processes, in general, for preparing catalysts; Processes, in general, for activation of catalysts
    • B01J37/34Irradiation by, or application of, electric, magnetic or wave energy, e.g. ultrasonic waves ; Ionic sputtering; Flame or plasma spraying; Particle radiation
    • B01J37/341Irradiation by, or application of, electric, magnetic or wave energy, e.g. ultrasonic waves ; Ionic sputtering; Flame or plasma spraying; Particle radiation making use of electric or magnetic fields, wave energy or particle radiation
    • B01J37/343Irradiation by, or application of, electric, magnetic or wave energy, e.g. ultrasonic waves ; Ionic sputtering; Flame or plasma spraying; Particle radiation making use of electric or magnetic fields, wave energy or particle radiation of ultrasonic wave energy
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B01PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01JCHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS OR COLLOID CHEMISTRY; THEIR RELEVANT APPARATUS
    • B01J27/00Catalysts comprising the elements or compounds of halogens, sulfur, selenium, tellurium, phosphorus or nitrogen; Catalysts comprising carbon compounds
    • B01J27/24Nitrogen compounds
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B01PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01JCHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS OR COLLOID CHEMISTRY; THEIR RELEVANT APPARATUS
    • B01J35/00Catalysts, in general, characterised by their form or physical properties
    • B01J35/30Catalysts, in general, characterised by their form or physical properties characterised by their physical properties
    • B01J35/39Photocatalytic properties
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B01PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01JCHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS OR COLLOID CHEMISTRY; THEIR RELEVANT APPARATUS
    • B01J37/00Processes, in general, for preparing catalysts; Processes, in general, for activation of catalysts
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B01PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01JCHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS OR COLLOID CHEMISTRY; THEIR RELEVANT APPARATUS
    • B01J37/00Processes, in general, for preparing catalysts; Processes, in general, for activation of catalysts
    • B01J37/08Heat treatment
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B01PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01JCHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS OR COLLOID CHEMISTRY; THEIR RELEVANT APPARATUS
    • B01J37/00Processes, in general, for preparing catalysts; Processes, in general, for activation of catalysts
    • B01J37/32Freeze drying, i.e. lyophilisation

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Abstract

The invention belongs to technical field of novel materials, a kind of catalysis material and preparation method are disclosed, catalysis material is by nano TiO 2, silane coupling agent, azobenzene, bronsted acid catalyst, solvent, C described in catalysis material3N4Photochemical catalyst, graphene oxide composition;Nano TiO 2:Silane coupling agent:Azobenzene:Bronsted acid catalyst:Solvent:C3N4Photochemical catalyst:The mass ratio of graphene oxide is 5~10:1~2:3~6:3~6:1~2:2~4:2~4;Silane coupling agent is gamma-aminopropyl-triethoxy-silane;The azobenzene is 4- aminoazabenzols;The bronsted acid catalyst is HCl.Name catalysis material of the present invention is prepared simply, of low cost, and electricity conversion is high;The problem of present invention solves preparation method existing for the preparation of current photochemical catalyst and loads, carrier secondary pollution.

Description

A kind of catalysis material and preparation method
Technical field
The invention belongs to technical field of novel materials more particularly to a kind of catalysis material and preparation methods.
Background technology
Currently, the prior art commonly used in the trade is such:
Currently, catalysis material refers to by one kind needed for the material, the photochemical reaction occurred under the action of light Semiconductor catalyst material, in the world can be many as having for catalysis material, including titanium dioxide, zinc oxide, tin oxide, two Because its oxidability is strong, chemical property is stablized for many oxides sulfide semiconductor such as zirconium oxide, cadmium sulfide, wherein titanium dioxide It is nontoxic, become nano photocatalyst catalytic material most hot in the world.Existing photocatalysis material of titanium dioxide preparation method is excessively complicated, Cost is higher, it is therefore desirable to a kind of a kind of at low cost, preparation method of the high photocatalysis material of titanium dioxide of electricity conversion.
With the rapid development of economic society and the change dramatically of environment, solves energy shortage and problem of environmental pollution has become For realize social sustainable development and safeguard national security there is an urgent need to.It is direct with solar energy in numerous technological approaches The catalysis material of driving force has received extensive concern.The solar energy of low-density can be effectively converted into highly dense by catalysis material The chemical energy of degree, if splitting water prepares hydrogen and oxygen, degradable organic pollutant, reducing heavy metal ion are realized to air and water Purification therefore consider from the angle of the energy and environment, solar energy photocatalytic technology is that solve energy shortage and environment dirty One of final scheme of dye.
However, the catalysis material studied at present is essentially all based on powder, and most of researchs all surround Powder photocatalyst doping, crystal face control etc. expansion, there are also research by catalyst load to some specific surface areas compared with On big carrier.However, the most of carriers studied at present are all inactive and there are more or less combination shakinesses Fixed problem, and many carriers itself are all to have contaminated materials to environment.Therefore, more suitable catalyst carrier one is found It is directly an important research direction in the field.
Grapheme material is studied due to it has good electric conductivity and electron transport ability by people extensively in recent years, Wherein it is even more the carrier there are many research as photochemical catalyst.Such as Zhang and Li et al., TiO is successfully used2Photocatalyst Onto graphene aerogel, obtained catalysis material has good degradation property to dyestuff methylene orange (J.Am.Chem.Soc., 2014,136,5852-5855;Applied Catalysis B:Environmental, 2015, 174-175,421-426).Similar report further includes the (Adv.Mater.2015,27,3767-3773 such as Niu;).But such It all usually needs to use high temperature (180 degrees Celsius) when method synthesizes three-dimensional integrated formula photocatalysis aeroge again, long-time hydro-thermal is anti- It answers (for 24 hours) and some bridging agents.Under these severe conditions, nano particle catalysis material ability and graphene aerogel Substrate has preferable combination.But influence of these exacting terms to catalyst itself and environment is inevitable again.
Based on the big lamellar structure of graphene (including graphene oxide), I considers whether can be by using similar piece Shape photochemical catalyst is loaded on graphene aerogel, and such piece is combined the binding ability that will greatly increase the two with piece. For this purpose, the present invention uses graphene oxide as carrier for the first time, by simple freeze-drying, successfully by C3N4, MoS2Deng Sheet catalyst loads to the surface of graphene oxide synusia, and obtains the three-dimensional catalysis material for being loaded in graphene oxide, after It is continuous to can be obtained photocatalyst in graphene aerogel by simple gas phase or annealing reduction.This aeroge light is urged Change material relatively has larger specific surface area in powder photocatalyst, and greatly increases photocatalytic activity position Point, to increase photocatalytic activity.Moreover, this three-dimensional porous aeroge catalysis material can also adsorb dyestuff, oil Equal organic matters, have extensive potential application foreground.
In recent years, with the rapid development of integrated circuit technique, FPGA (Field Programmable Gate Array) Field programmable gate array, because it has the features such as abundant integrated level height, logical resource, flexible design and reconfigurability, in light Catalysis material field is widely used general, and annual China is needed from a large amount of FPGA of external import (Field Programmable Gate Array) field programmable gate array chip and mating support software, and country FPGA (Field Programmable Gate Array) field programmable gate array industry is to be developed, restrict country FPGA (Field Programmable Gate Array) the factor of field programmable gate array industry development is mainly a lack of the support of the high-performance high quality of independent research The eda software of FPGA (Field Programmable Gate Array) field programmable gate array exploitation.
The design cycle of FPGA (Field Programmable Gate Array) field programmable gate array, it is main to wrap Include design input, behavior integration, logic synthesis, Technology Mapping, package, place and route.Wherein, layout is particularly important one A link, it directly influences the performance of the quality subsequently connected up and entire circuit, including critical path delay and total wiring The critical index such as line length.Support the exploitation of FPGA (Field Programmable Gate Array) field programmable gate array Eda software include behavior integration, logic synthesis, technology-mapped, package, layout, wiring, configuration file generate and it is preceding emulation, The functions such as post-simulation.
The layout of FPGA (Field Programmable Gate Array) field programmable gate array is based on certain The logical block CLB (including I/O, logic unit Block and interconnection resource etc.) that optimization and constraint criterion describe net meter file reflects It is mapped to the mistake of the field programmable gate array chip internal physical position FPGA (Field Programmable Gate Array) The layout of journey, academia and industrial quarters to FPGA (Field Programmable Gate Array) field programmable gate array Commonly used approach is simulated annealing method.
Simulated annealing method is proposed in nineteen fifty-three by Metropolis et al., is a kind of heuristic iterative search method, more For complicated combinatorial optimization problem and np complete problem.Its thought source is in solid annealing theory physically, due to solid There are certain similitudes between body annealing process and general combinatorial optimization problem, are introduced during Combinatorial Optimization Metropolis criterion just obtain a kind of combinatorial optimization algorithm being iterated to Metropolis algorithms, while mathematically There is good model " Markov chain " that strictly formalized description can be carried out to it again.It is theoretical based on Markov process, Simulated annealing method convergence with probability 1 can be proved in globally optimal solution, this is a good mathematical characteristic.Simulated annealing side The basic thought of method is to introduce random perturbation to deterministic algorithm so that when searching Local Extremum, with certain probability Jump out the trap of local extremum.Each of solution space of combinatorial optimization problem point represents a solution, and different solutions has not Same cost value.Optimization is that cost function is found in solution space, i.e. the maximum value or minimum value of object function.Simulated annealing Method generates an initial layout as current solution S first, and initializes the number L of iteration at start temperature T and each temperature. Each iteration random perturbation on the basis of currently solution S generates a new explanation, receives new explanation if new explanation is better than S, and replace Current solution S;Otherwise new explanation is received with certain probability, temperature T is lower, and the probability for receiving new explanation is lower.Then temperature T is continuously decreased, Current solution is exported if temperature reaches the freezing point or current solution reaches requirement is used as optimal solution.This method is in each temperature The search done enough must can be only achieved thermodynamical equilibrium, and theoretically the decline process of temperature declines in logarithm, but The methods of often decline in practice using more quick Annealing Strategy, such as geometry decline, straight line, in this way in practical application In, it can not just ensure to reach globally optimal solution with 1 probability.
Use simulated annealing method, FPGA (Field Programmable Gate Array) field programmable gate array Location problem can be described by following several respects:
Problem describes:Each logical block in subscriber's line circuit can indicate them in FPGA with coordinate (x, y) Specific location on (Field Programmable Gate Array) field programmable gate array.When initial, each logical block A position of FPGA (Field Programmable Gate Array) field programmable gate array can be randomly dispersed in On, it is legal which guarantee each position, with the progress of simulated annealing method, each logical block will finally obtain one A fixed position;
Mobile set:When initial layout, random exchange has been only included in this set.One random exchange be at first with The coordinate of two logical blocks of selection of machine, then exchanges the physical element on the two coordinates, can be on any one coordinate Sky, without harmful effect;
Cost function:Obtain good FPGA (Field Programmable Gate Array) field-programmable Subscriber's line circuit design in gate array, target is exactly the delay minimized in critical path, and actual delay is only after layout Continuous wiring just can know that therefore, the cost function of layout can predict that critical path is delayed after completing;
Annealing table:The setting of annealing table is related to specific application problem, for determining the decline strategy of temperature.Following table is More commonly used layout annealing table (Vaughn.Betz et al. propositions), the calculation formula of next temperature is Tnew=α Told, R in tableacceptIndicate the receptance solved under Current Temperatures;
Fraction of moves accepted(Raccept) α
Raccept>0.96 0.5
0.8<Raccept≤0.96 0.9
0.15<Raccept≤0.8 0.95
Raccept≤0.15 0.8
Traditional analog method for annealing is in FPGA (Field Programmable Gate Array) field programmable gate array It is very sensitive to parameter in layout application, and can not hover across energy barrier in locally optimal solution in cold stage.
Simulated tempering method (Simulated Tempering Algorithm), be initially by Charles.Geyer and What Elizabeth.Thompson et al. was proposed.In order to overcome the problems, such as that simulated annealing method is absorbed in local optimum, simulated tempering Temperature is regarded as a stochastic variable by method.During searching for solution, temperature, which can rise, to be declined, and search in this way Journey can constantly return to higher temperature, so as to jump out certain locally optimal solutions in solution space.This method is apparent Different from by the simulated annealing method that temperature control is strictly monotone decline, simulated tempering method has been successfully applied to The fields such as DNA sequence analysis, protein analysis.
In general, simulated tempering method can select the temperature t of a series of monotonic decreasing1,t2,…,tm, glass at each temperature The graceful distribution of Wurz is defined as follows,
hi(x)=αjexp{-Cost(x)/ti}
In temperature tiThe solution of lower generation is x, and cost function Cost, j=i ± 1, π (i) are to correct constant, q1,2=qm,m-1 =1, qi,i+1=qi,i-1=0.5.The formula for calculating probability r is as follows,
Finally with the probability of min (r, 1) from temperature tiIt is set as temperature tj
Simulated tempering method is applied to support FPGA (Field Programmable Gate Array) field-programmable The layout tool of the eda software of gate array exploitation.In layout process, it is assumed that Current Temperatures TK, rigid start-up cost function The value of Cost is 1, is T through excess temperatureKWhen n times search after, cost function Cost values are denoted as lastCost, next at this time There are three types of selections for temperature:It is tempered to a temperature TK-1, continue to keep Current Temperatures TK, drop to next temperature TK+1, at this moment with The value that machine generates variable Skip is K-1 or K+1, wherein the probability for generating K-1 is a, the probability for generating K+1 is (1-a).Meter The formula for calculating probability P is as follows,
The temperature value for being designated as Skip is finally jumped to down with the probability of min (1, P).By analysis it is found that this method be with Probability (1-a) jumps to next temperature, and a upper temperature is jumped to the probability of aP, and current temperature is kept with the probability of a (1-P) Degree.The principle of this method is, if cost function value Cost is reduced very much, to illustrate the room for promotion of placement quality under Current Temperatures It is also very big, it should to be tempered, with the reduction of temperature, tempering probability can also reduce, to finally converge to globally optimal solution.
In conclusion problem of the existing technology is:
Existing photocatalysis material of titanium dioxide preparation method is excessively complicated, and cost is higher, it is therefore desirable to a kind of at low cost, light A kind of preparation method of the efficient photocatalysis material of titanium dioxide of electrotransformation.
Preparation process existing for the preparation of integrated optical catalyst is cumbersome at present, carrier secondary pollution problems.
The present invention is applied to that FPGA (Field Programmable Gate Array) field programmable gate array is supported to open The layout tool of the eda software of hair.Aim to solve the problem that traditional analog method for annealing in FPGA (Field Programmable Gate Array) very sensitive to parameter present in the application of field programmable gate array layout, and can not cross over energy in cold stage Amount barrier and hover in the locally optimal solution the problem of.
Invention content
In view of the problems of the existing technology, the present invention provides a kind of catalysis material and preparation methods.
The invention is realized in this way a kind of preparation method of catalysis material, the preparation method of the catalysis material Including:
Nano TiO 2, azobenzene and solvent are added in beaker by step 1, abundant with the rotating speed of 300~400r/min Stirring and dissolving 20min;Obtain solution A;
Step 2, by silane coupling agent and bronsted acid catalyst with the rotating speed of 300~400r/min in another beaker It is sufficiently stirred dissolving 20min, is then poured the mixture into the beaker of step 1, reacts 3~6h at normal temperatures and pressures;It obtains molten Liquid B;
Step 3, by sheet C3N4Photochemical catalyst ultrasonic disperse forms the evenly dispersed of 2mg/ml~4mg/ml in water Liquid;Graphene oxide is dispersed in water, the homogeneous mixture solotion of 2mg/ml~7mg/ml is formed;By graphene oxide water solution It is slowly added into catalyst dispersion, lasting stirring is then ultrasonically treated, and forms catalyst-graphene oxide dispersion;It will Catalyst-graphene dispersing solution is chilled to complete deep colling under the conditions of -70 DEG C~-190 DEG C, and is gone using 12-36h freeze-dryings Moisture obtains photochemical catalyst C;
Step 4, to solution A, solution B, photochemical catalyst C in hydrazine hydrate, ammonium hydroxide, ethylenediamine the ultrasonic disperse in ultrasonic wave The product of bottom is finally filtered, anneals under 300 degrees Celsius~550 degrees celsius, obtain catalyst and graphite by 2h~4h The catalysis material of alkene load.
Further, the silane coupling agent is gamma-aminopropyl-triethoxy-silane, and the azobenzene is that 4- amino is even Pyridine, the bronsted acid catalyst are HCl;Solvent is ethyl alcohol.
Another object of the present invention is to provide a kind of catalysis materials by nano TiO 2, silane coupling agent, azobenzene, matter Sub- acid catalyst, solvent, C3N4Photochemical catalyst, graphene oxide composition;Nano TiO 2:Silane coupling agent:Azobenzene:Bronsted acid Catalyst:Solvent:C3N4Photochemical catalyst:The mass ratio of graphene oxide is 5~10:1~2:3~6:3~6:1~2:2~4: 2~4.
Another object of the present invention is to provide a kind of preparation systems of catalysis material to include:
Ultrasonic wave module, for generating ultrasonic wave;Including processing solution tank, excusing from death wave producer, conducting wire, excusing from death wave host, surpass Sonic generator is mounted in activation processing solution tank, and supersonic generator is connect by conducting wire with ultrasonic wave host;
Device control module, for by program setting, whenever having item number input, control ultrasonic wave host to receive letter Number, send out ultrasonic wave;
Annealing module, connect with device control module, anneals to catalysis material.
Further, the method for annealing for module of annealing includes:
The first step gives the net meter file and a structured file of a description field programmable gate array, uses simulation Method for annealing carries out initial layout, by each logical block CLB it is random be assigned to FPGA (Field Programmable Gate Array) on a coordinate position of field programmable gate array;
Second step, on the basis of initial layout, by carrying out NblocksThe exchange of secondary CLB, is calculated simulated annealing side The initial temperature of method, wherein NblocksIt is the number of CLB in circuit;
Third walks, and at a given temperature, judges whether temperature reaches the freezing point, if reached the freezing point, executes the 5th step;
4th step repeats third step until the probability for receiving new explanation reaches 44%, and recording current temperature is Temp44, and it is current_best to preserve current layout result, executes the 5th step;
Temperature setting is 0 by the 5th step, carries out local optimum search, and preserves current optimal layout result, and simulation is moved back Fiery layout method terminates;
6th step, according to the 5th step as a result, set the initial temperature of simulated tempering method to temp44, initial layout It is set as current_best;
7th step judges whether temperature reaches the freezing point at a given temperature, if reached the freezing point, executes the 9th step;
8th step repeats the 7th step until temperature reaches the freezing point, executes the 9th step;
Temperature setting is 0 by the 9th step, carries out local optimum search, and preserves current optimal layout result, is simulated back Fiery layout method terminates.
Further, in the 4th step, the process being laid out using simulated annealing method is shown by simulation result when new When the receptance of solution reaches 44%, annealing process terminates;Record Current Temperatures are temp44, and preserve current layout result For current_best;
Applied to support FPGA (Field Programmable Gate Array) field programmable gate array exploitation The layout tool of eda software, the 7th step the specific steps are:
Step 1, under Current Temperatures, according to TK< 0.005Cost/NnetsJudge whether to reach the freezing point, if not provided, Execute step 2, wherein TKFor Current Temperatures, Cost is the cost expenses of current arrangements, NnetsFor the gauze number in circuit;
Step 2 randomly chooses a CLB, another CLB or vacant position is randomly choosed in the range of restriction, so After swap, the knots modification Δ C for calculating current arrangements cost functions can receive this change if Δ C < 0, no Then with probability exp (- Δ C/TK) receive;
Step 3, repeats step 2 Num_Move times, and Num_Move is theoretically known as Markov chain length, Num_Move= 10·Nblocks 1.33
Step 4, in Current Temperatures TKNext temperature T is generated on the basis of spending lastCost with current arrangementsnew;This When there are three types of selection:It is tempered to a temperature Tprev, continue to keep Current Temperatures TK, drop to next temperature Tnext, wherein Tprev Saved, the T beforenextIt is determined by annealing table;The value for generating variable Skip at random at this time is K-1 or K+1, wherein raw It is a at the probability of K-1, the probability for generating K+1 is (1-a), and tempering probability a values are in [0,0.5];Calculate the formula of probability P such as Under,
The temperature value for being designated as Skip is finally jumped to down with the probability of min (1, P);Constant C and α in formula are to correct Value, determines in a particular application, is applied to support FPGA (Field Programmable Gate Array) field programmable gate In the layout tool of the eda software of array exploitation, constant C is set as the start temperature temp44, α of temperingKCalculation formula such as Under,
Wherein averageCost is the average value that all layouts spend Cost in iterative process.
Advantages of the present invention and good effect are:
The catalysis material and preparation method, which prepares simply, of low cost, and electricity conversion It is high.
The period that the present invention prepares material is short, 2~4 days primary freeze drying periods;
Stability of material prepared by the present invention is good, superior performance, and the catalyst and graphene oxide of use are all sheet materials Material, and be all easily dispersed in water, beat the binding ability for enhancing its load;
Photocatalysis performance of the present invention is high, since using graphene oxide and graphene, as carrier, carrier is conducive to light The separation of raw carrier, to greatly increase photocatalysis efficiency.
The problem of present invention solves preparation method existing for the preparation of current photochemical catalyst and loads, carrier secondary pollution. The present invention provides a kind of preparation methods of photocatalyst material.This method pollution is small, and appointed condition requirement is low, is suitable for big rule The industrial production of mould, and obtained material property is stablized.It is suitble to large-scale industrial production.
The present invention takes hybrid analog-digital simulation to move back by combining the advantage of traditional analog method for annealing and simulated tempering method respectively The method of fire and simulated tempering.Traditional analog method for annealing is used first, obtains the best solution that simulated annealing can be found Current_best, and the temperature temp44 when the receptance of solution is 44% is recorded, and establish from temp44 to freezing point temperature Suitable temperature gradient { t1,t2,…,tm, simulated tempering method is then started according to the temperature gradient, in this process If having encountered solution more better than current_best, just current_best, finally obtained current_ are replaced with the solution Best is the optimal solution needed.The present invention is applied to support the scenes FPGA (Field Programmable Gate Array) The layout tool of the eda software of programmable gate array exploitation, finally obtained layout result stability is good, while can improve circuit Quality.
The present invention ultrasonic energy compression with expansion because liquid coherence thrust, can effectively penetrate subtle gap and Aperture enhances the circulation that solution is configured in hole;The gap that liquid level and population can be reduced keeps molecule well dispersed, improves equal Even property;Ultrasonic wave energy generates micro- mixing power and temperature difference driven potential, helps to improve the Brownian movement of plastochondria, increases adhesive force.
Description of the drawings
Fig. 1 is the flow diagram of catalysis material preparation method provided in an embodiment of the present invention;
Fig. 2 is the scanning electron microscope (SEM) photograph of photocatalyst material provided in an embodiment of the present invention;
Fig. 3 is that photocatalyst material provided in an embodiment of the present invention schemes low concentration (400ppb) NO degradations;
Degradation figure of Fig. 4 photochemical catalysts provided in an embodiment of the present invention for MO dyestuffs;
Fig. 5 is absorption figure of the photochemical catalyst provided in an embodiment of the present invention for several organic matters.
Fig. 6 is ultrasonic wave module schematic diagram provided in an embodiment of the present invention.
In figure:1, processing solution tank;2, wave producer is had children outside the state plan;3, conducting wire;4, wave host is had children outside the state plan.
Specific implementation mode
In order to further understand the content, features and effects of the present invention, the following examples are hereby given, and coordinate attached drawing Detailed description are as follows.
As shown in Figure 1, the preparation method of catalysis material provided in an embodiment of the present invention, including:
S101:Nano TiO 2, azobenzene and solvent are added in beaker, fully stirred with the rotating speed of 300~400r/min Mix dissolving 20min;Obtain solution A;
S102:Silane coupling agent and bronsted acid catalyst are filled in another beaker with the rotating speed of 300~400r/min Divide stirring and dissolving 20min, then pour the mixture into the beaker of step 1, reacts 3~6h at normal temperatures and pressures;Obtain solution B;
S103:By sheet C3N4Photochemical catalyst ultrasonic disperse forms the uniform dispersion of 2mg/ml~4mg/ml in water; Graphene oxide is dispersed in water, the homogeneous mixture solotion of 2mg/ml~7mg/ml is formed;Graphene oxide water solution is delayed Slowly it is added in catalyst dispersion, lasting stirring is then ultrasonically treated, and forms catalyst-graphene oxide dispersion;It will urge Agent-graphene dispersing solution is chilled to complete deep colling under the conditions of -70 DEG C~-190 DEG C, and removes water using 12-36h freeze-dryings Point, obtain photochemical catalyst C;
S104:To solution A, solution B, photochemical catalyst C in hydrazine hydrate, ammonium hydroxide, ethylenediamine the ultrasonic disperse 2h in ultrasonic wave ~4h finally filters the product of bottom, is restored under reproducibility steam condition or in 300 degrees Celsius~550 degrees celsius Lower annealing, obtains catalyst and graphene-supported catalysis material.
Further, the silane coupling agent is gamma-aminopropyl-triethoxy-silane, and the azobenzene is that 4- amino is even Pyridine, the bronsted acid catalyst are HCl;Solvent is ethyl alcohol.
Catalysis material provided in an embodiment of the present invention, by nano TiO 2, silane coupling agent, azobenzene, Protic Acid Catalyzed Agent, solvent, C3N4Photochemical catalyst, graphene oxide composition;Nano TiO 2:Silane coupling agent:Azobenzene:Bronsted acid catalyst:It is molten Agent:C3N4Photochemical catalyst:The mass ratio of graphene oxide is 5~10:1~2:3~6:3~6:1~2:2~4:2~4.
With reference to concrete analysis, the invention will be further described.
Embodiment 1
Catalysis material provided in an embodiment of the present invention, by nano TiO 2, silane coupling agent, azobenzene, Protic Acid Catalyzed Agent, solvent, C3N4Photochemical catalyst, graphene oxide composition;Nano TiO 2:Silane coupling agent:Azobenzene:Bronsted acid catalyst:It is molten Agent:C3N4Photochemical catalyst:The mass ratio of graphene oxide is 5:1:3:3:1:2:2.
Embodiment 2
Catalysis material provided in an embodiment of the present invention, by nano TiO 2, silane coupling agent, azobenzene, Protic Acid Catalyzed Agent, solvent, C3N4Photochemical catalyst, graphene oxide composition;Nano TiO 2:Silane coupling agent:Azobenzene:Bronsted acid catalyst:It is molten Agent:C3N4Photochemical catalyst:The mass ratio of graphene oxide is 10:2:6:6:2:4:4.
Embodiment 3
Catalysis material provided in an embodiment of the present invention, by nano TiO 2, silane coupling agent, azobenzene, Protic Acid Catalyzed Agent, solvent, C3N4Photochemical catalyst, graphene oxide composition;Nano TiO 2:Silane coupling agent:Azobenzene:Bronsted acid catalyst:It is molten Agent:C3N4Photochemical catalyst:The mass ratio of graphene oxide is 7:1.5:6:4:1.5:3:3.
Fig. 2 is the scanning electron microscope (SEM) photograph of photocatalyst material provided in an embodiment of the present invention;
Fig. 3 is that photocatalyst material provided in an embodiment of the present invention schemes low concentration (400ppb) NO degradations;
Degradation figure of Fig. 4 photochemical catalysts provided in an embodiment of the present invention for MO dyestuffs;
Fig. 5 is absorption figure of the photochemical catalyst provided in an embodiment of the present invention for several organic matters.
Such as Fig. 6, the present invention provides a kind of preparation system of catalysis material and includes:
Ultrasonic wave module, for generating ultrasonic wave;Including processing solution tank 1, excusing from death wave producer 2, conducting wire 3, excusing from death wave host 4, supersonic generator is mounted in processing solution tank, and supersonic generator is connect by conducting wire with ultrasonic wave host;
Device control module, for by program setting, whenever having item number input, control ultrasonic wave host to receive letter Number, send out ultrasonic wave;
Annealing module, connect with device control module, anneals to catalysis material.
Annealing module method for annealing include:
The first step gives the net meter file and a structured file of a description field programmable gate array, uses simulation Method for annealing carries out initial layout, by each logical block CLB it is random be assigned to FPGA (Field Programmable Gate Array) on a coordinate position of field programmable gate array;
Second step, on the basis of initial layout, by carrying out NblocksThe exchange of secondary CLB, is calculated simulated annealing side The initial temperature of method, wherein NblocksIt is the number of CLB in circuit;
Third walks, and at a given temperature, judges whether temperature reaches the freezing point, if reached the freezing point, executes the 5th step;
4th step repeats third step until the probability for receiving new explanation reaches 44%, and recording current temperature is Temp44, and it is current_best to preserve current layout result, executes the 5th step;
Temperature setting is 0 by the 5th step, carries out local optimum search, and preserves current optimal layout result, and simulation is moved back Fiery layout method terminates;
6th step, according to the 5th step as a result, set the initial temperature of simulated tempering method to temp44, initial layout It is set as current_best;
7th step judges whether temperature reaches the freezing point at a given temperature, if reached the freezing point, executes the 9th step;
8th step repeats the 7th step until temperature reaches the freezing point, executes the 9th step;
Temperature setting is 0 by the 9th step, carries out local optimum search, and preserves current optimal layout result, is simulated back Fiery layout method terminates.
Further, in the 4th step, the process being laid out using simulated annealing method is shown by simulation result when new When the receptance of solution reaches 44%, annealing process terminates;Record Current Temperatures are temp44, and preserve current layout result For current_best;
Applied to support FPGA (Field Programmable Gate Array) field programmable gate array exploitation The layout tool of eda software, the 7th step the specific steps are:
Step 1, under Current Temperatures, according to TK< 0.005Cost/NnetsJudge whether to reach the freezing point, if not provided, Execute step 2, wherein TKFor Current Temperatures, Cost is the cost expenses of current arrangements, NnetsFor the gauze number in circuit;
Step 2 randomly chooses a CLB, another CLB or vacant position is randomly choosed in the range of restriction, so After swap, the knots modification Δ C for calculating current arrangements cost functions can receive this change if Δ C < 0, no Then with probability exp (- Δ C/TK) receive;
Step 3, repeats step 2 Num_Move times, and Num_Move is theoretically known as Markov chain length, Num_Move= 10·Nblocks 1.33
Step 4, in Current Temperatures TKNext temperature T is generated on the basis of spending lastCost with current arrangementsnew;This When there are three types of selection:It is tempered to a temperature Tprev, continue to keep Current Temperatures TK, drop to next temperature Tnext, wherein Tprev Saved, the T beforenextIt is determined by annealing table;The value for generating variable Skip at random at this time is K-1 or K+1, wherein raw It is a at the probability of K-1, the probability for generating K+1 is (1-a), and tempering probability a values are in [0,0.5];Calculate the formula of probability P such as Under,
The temperature value for being designated as Skip is finally jumped to down with the probability of min (1, P);Constant C and α in formula are to correct Value, determines in a particular application, is applied to support FPGA (Field Programmable Gate Array) field programmable gate In the layout tool of the eda software of array exploitation, constant C is set as the start temperature temp44, α of temperingKCalculation formula such as Under,
Wherein averageCost is the average value that all layouts spend Cost in iterative process.
With reference to concrete analysis, the invention will be further described.
The ultrasonic wave host of the present invention is connected to device control module by signal wire, by program setting, whenever there is material Number input when, ultrasonic wave host just will receive signal, begin to send out ultrasonic wave;Ultrasonic wave is a system as other sound waves The pressure spot of row, be it is a kind of compression and expand alternate wave, if acoustic energy is sufficiently strong, activating solution is pushed away in the expansion stage of wave It opens, thus generates bubble;And in the compression stage of wave, the moment implosion in a liquid of these bubbles, generate one it is very effective Catalysis material can be smashed rapidly rapidly to external radiation, make photocatalysis material by impact force in the moment impact wave of its explosion Material particle is maintained at minimum grain size, can effectively solve the compound easy glue of tradition standing and integrate puzzlement derived from big colloid, accelerate light The adsorption capacity of catalysis material particle;In addition the compression Yu expansion of ultrasonic energy can make liquid generate the thrust of coherence, make to match Subtle C can effectively be penetrated by setting solution3N4Photochemical catalyst, the gap of graphene oxide and aperture, the configuration for enhancing aperture are molten Liquid penetrability improves the uniformity of catalysis material, and it is broken to prevent hole
The above is only the preferred embodiments of the present invention, and is not intended to limit the present invention in any form, Every any simple modification made to the above embodiment according to the technical essence of the invention, equivalent variations and modification, belong to In the range of technical solution of the present invention.

Claims (6)

1. a kind of preparation method of catalysis material, which is characterized in that the preparation method of the catalysis material includes:
Nano TiO 2, azobenzene and solvent are added in beaker by step 1, are sufficiently stirred with the rotating speed of 300~400r/min Dissolve 20min;Obtain solution A;
Step 2 is abundant with the rotating speed of 300~400r/min in another beaker by silane coupling agent and bronsted acid catalyst Then stirring and dissolving 20min is poured the mixture into the beaker of step 1, react 3~6h at normal temperatures and pressures;Obtain solution B;
Step 3, by sheet C3N4Photochemical catalyst ultrasonic disperse forms the uniform dispersion of 2mg/ml~4mg/ml in water;It will Graphene oxide is dispersed in water, and forms the homogeneous mixture solotion of 2mg/ml~7mg/ml;Graphene oxide water solution is slow It is added in catalyst dispersion, lasting stirring is then ultrasonically treated, and forms catalyst-graphene oxide dispersion;It will catalysis Agent-graphene dispersing solution is chilled to complete deep colling under the conditions of -70 DEG C~-190 DEG C, and removes water using 12-36h freeze-dryings Point, obtain photochemical catalyst C;
Step 4, to solution A, solution B, photochemical catalyst C hydrazine hydrate, ammonium hydroxide, ethylenediamine in ultrasonic wave ultrasonic disperse 2h~ The product of bottom is finally filtered, is annealed under 300 degrees Celsius~550 degrees celsius by 4h, obtains catalyst and graphene is negative The catalysis material of load.
2. the preparation method of catalysis material as described in claim 1, which is characterized in that the silane coupling agent is γ-ammonia Propyl-triethoxysilicane, the azobenzene are 4- aminoazabenzols, and the bronsted acid catalyst is HCl;Solvent is second Alcohol.
3. catalysis material prepared by a kind of preparation method of catalysis material as described in claim 1, which is characterized in that described Catalysis material is by nano TiO 2, silane coupling agent, azobenzene, bronsted acid catalyst, solvent, C3N4Photochemical catalyst, graphite oxide Alkene forms;Nano TiO 2:Silane coupling agent:Azobenzene:Bronsted acid catalyst:Solvent:C3N4Photochemical catalyst:Graphene oxide Mass ratio is 5~10:1~2:3~6:3~6:1~2:2~4:2~4.
4. the preparation system of catalysis material prepared by a kind of preparation method of catalysis material as described in claim 1, special Sign is that the preparation system of the catalysis material includes:
Ultrasonic wave module, for generating ultrasonic wave;Including processing solution tank, excusing from death wave producer, conducting wire, excusing from death wave host, ultrasonic wave Generator is mounted in activation processing solution tank, and supersonic generator is connect by conducting wire with ultrasonic wave host;
Device control module, for by program setting, whenever having item number input, control ultrasonic wave host to receive signal, sends out Go out ultrasonic wave;
Annealing module, connect with device control module, anneals to catalysis material.
5. the preparation system of catalysis material as claimed in claim 4, which is characterized in that the method for annealing for module of annealing includes:
The first step gives the net meter file and a structured file of a description field programmable gate array, uses simulated annealing Method carries out initial layout, by each logical block CLB it is random be assigned to FPGA (Field Programmable Gate Array) on a coordinate position of field programmable gate array;
Second step, on the basis of initial layout, by carrying out NblocksThe exchange of secondary CLB, is calculated simulated annealing method Initial temperature, wherein NblocksIt is the number of CLB in circuit;
Third walks, and at a given temperature, judges whether temperature reaches the freezing point, if reached the freezing point, executes the 5th step;
4th step repeats third step until the probability for receiving new explanation reaches 44%, and it is temp44 to record current temperature, and And it is current_best to preserve current layout result, executes the 5th step;
Temperature setting is 0 by the 5th step, carries out local optimum search, and preserves current optimal layout result, simulated annealing cloth Office's method terminates;
6th step, according to the 5th step as a result, setting the initial temperature of simulated tempering method to temp44, initial layout setting For current_best;
7th step judges whether temperature reaches the freezing point at a given temperature, if reached the freezing point, executes the 9th step;
8th step repeats the 7th step until temperature reaches the freezing point, executes the 9th step;
Temperature setting is 0 by the 9th step, carries out local optimum search, and preserves current optimal layout result, simulated tempering cloth Office's method terminates.
6. the preparation system of catalysis material as claimed in claim 5, which is characterized in that in the 4th step, use simulated annealing The process that method is laid out shows that annealing process terminates when the receptance of new explanation reaches 44% by simulation result;Record Current Temperatures are temp44, and it is current_best to preserve current layout result;
EDA applied to support FPGA (Field Programmable Gate Array) field programmable gate array exploitation is soft The layout tool of part, the 7th step the specific steps are:
Step 1, under Current Temperatures, according to TK< 0.005Cost/NnetsJudge whether to reach the freezing point, if not provided, executing Step 2, wherein TKFor Current Temperatures, Cost is the cost expenses of current arrangements, NnetsFor the gauze number in circuit;
Step 2, randomly choose a CLB, another CLB or vacant position are randomly choosed in the range of restriction, then into Row exchanges, and calculates the knots modification Δ C of current arrangements cost functions, if Δ C < 0, can receive this change, otherwise with Probability exp (- Δ C/TK) receive;
Step 3, repeats step 2 Num_Move times, and Num_Move is theoretically known as Markov chain length, Num_Move=10 Nblocks 1.33
Step 4, in Current Temperatures TKNext temperature T is generated on the basis of spending lastCost with current arrangementsnew;Have at this time Three kinds of selections:It is tempered to a temperature Tprev, continue to keep Current Temperatures TK, drop to next temperature Tnext, wherein TprevAt it It is preceding saved, TnextIt is determined by annealing table;The value for generating variable Skip at random at this time is K-1 or K+1, wherein generating K- 1 probability is a, and the probability for generating K+1 is (1-a), and tempering probability a values are in [0,0.5];The formula for calculating probability P is as follows,
The temperature value for being designated as Skip is finally jumped to down with the probability of min (1, P);Constant C and α in formula are correction values, It is determined in concrete application, is applied to support FPGA (Field Programmable Gate Array) field programmable gate array In the layout tool of the eda software of exploitation, constant C is set as the start temperature temp44, α of temperingKCalculation formula it is as follows,
Wherein averageCost is the average value that all layouts spend Cost in iterative process.
CN201810328402.2A 2018-04-13 2018-04-13 A kind of catalysis material and preparation method Pending CN108745394A (en)

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