CN108646834A - A kind of low cost low-power consumption method of supplying power to for reducing numeric field and high-precision adc being interfered - Google Patents
A kind of low cost low-power consumption method of supplying power to for reducing numeric field and high-precision adc being interfered Download PDFInfo
- Publication number
- CN108646834A CN108646834A CN201810241294.5A CN201810241294A CN108646834A CN 108646834 A CN108646834 A CN 108646834A CN 201810241294 A CN201810241294 A CN 201810241294A CN 108646834 A CN108646834 A CN 108646834A
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- Prior art keywords
- ldo
- digital circuit
- power
- modules
- suspend mode
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D3/00—Indicating or recording apparatus with provision for the special purposes referred to in the subgroups
- G01D3/028—Indicating or recording apparatus with provision for the special purposes referred to in the subgroups mitigating undesired influences, e.g. temperature, pressure
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Electromagnetism (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- General Engineering & Computer Science (AREA)
- Power Sources (AREA)
Abstract
The invention discloses a kind of low cost low-power consumption method of supplying power to that reduction numeric field interferes high-precision adc, it is characterized in that this method is connected to LDO modules in digital circuit, when system needs to enter suspend mode, digital circuit is instructed by suspend mode and turns off LDO, and there is no power consumptions for LDO modules.The present invention is by LDO modules, and when system needs to enter suspend mode, digital circuit is instructed by suspend mode and turns off LDO, there is no power consumptions for LDO modules, the grid voltage VPS of its driving tube is also dragged down by dormancy instruction, to open driving tube, maintains the power supply to digital circuit.When system is restored to normal mode, digital circuit opens LDO by exiting suspend mode instruction, and VLDO voltages are stabilized, the interference of digital circuit will not be with power source change, ADC is read not with power source change, thus avoids the interference of digital circuit, while can also reduce the power consumption of LDO.
Description
Technical field
The invention belongs to technical field of integrated circuits, more particularly to reduce the supplier of electricity that numeric field interferes high-precision adc
Method.
Background technology
Using ADC one voltage signal of (analog digital convertor) circuit measuring and convert thereof into number
It is most common and basic one of the function of electronic field that signal, which is transmitted to CPU or MCU processing,.Printed circuit based on this framework
Panel products or chip distribution in multiple application fields, including：Sensor signal detection, commercial measurement, body electrical signals detection, electricity
Pond management, communication etc..
It, or can not in chip on printed circuit board since the effect of ADC is that analog voltage signal is converted into digital signal
There are high-precision analog circuit and digital circuits while avoiding.The usual amplitude of oscillation of analog signal in analog circuit is small, edge is slow,
Easily it is disturbed；The usual amplitude of oscillation of digital signal in digital circuit is big, edge is steep, healthy and strong, can inject high frequency to power and ground
Interference signal.If the layout of incompact processing analog circuit and digital circuit in printed circuit board or chip layout is asked
Topic, digital interference signal can influence the normal work of analog circuit, reduce its precision.This problem detects electricity in high-precision adc
Road is even more serious.
Reduce digital circuit the complete solution of analog circuit is needed to consider Multiple factors, such as widens digital circuit
To the signal etc. for avoiding edge excessively precipitous in the spacing of analog circuit, the protection ring for increasing analog circuit periphery, digital circuit.
As patent application 201310011831.4 discloses a kind of power supply monitoring system and method, the power supply monitoring system packet
It includes：LDO；For acquiring the electric current and the Acquisition Circuit for being converted to analog voltage signal that the LDO is exported；Connect with Acquisition Circuit
It connects, for the ADC to analog voltage signal be converted to digital voltage signal；It is connect with the ADC, for receiving ADC
The digital voltage signal received is compared by digits after conversion voltage signal with the predeterminated voltage threshold values that self EMS memory stores up,
And the control chip of LDO working conditions is controlled according to comparison result.Chip is controlled by power supply monitoring system provided by the present application
Can directly to use easy change predetermined voltage threshold in a manner of software programming, convenient for the adjustment to power supply monitoring system so that
The same power supply monitoring system is convenient for the different daughter boards of monitoring.
However, the patent application is will to control chip in power supply monitoring system by the digital voltage signal received and reserve
Threshold voltage compares, and the working condition of LDO is controlled according to comparison result, can not can be effectively reduced power consumption.
The existing schematic diagram that analog voltage signal is detected using ADC is as shown in Figure 1.Analog voltage signal is by adc circuit
It is converted into digital signal, digital signal is output to next stage system by digital circuit, such as CPU or MCU after processing.Show from this
It is intended to as can be seen that inevitably existing simultaneously analog signal and digital signal in system.For the detection electricity of high-precision adc
For road, it is necessary to the isolation of careful processing analog signal and digital signal, in other words analog circuit avoid by digital circuit
The problem of interference.
The signal of digital circuit is typically the rail-to-rail amplitude of oscillation, i.e. the full amplitude of oscillation from power supply to ground.When supply voltage becomes
When change, the digital signal amplitude of oscillation also changes therewith.As a result, when the non-constant pressure power supply units such as battery are as system power supply
When, with the decaying of battery capacity, voltage reduces, and digital interference signal also changes therewith, and the interference that ADC is subject to is different, turn
The digital signal changed, that is, the reading of ADC also will variation.This phenomenon in battery powered high-acruracy survey scene particularly
Significantly.
Fairly simple solution exactly increases regulator circuit in whole system or individually in digital circuit, such as
One LDO (Low dropout).This scheme can make the power supply of digital circuit not change, and solve ADC readings with power supply
The problem of variation.But in many application fields, it is desirable that the lower the power consumption of system in the dormant state the better, usually less than
1uA.Additional LDO circuit generally has the power consumption of tens uA, cannot meet the power consumption requirements of system.Power consumption can be selected extremely low
LDO solve the problems, such as this, but price will be very expensive.
In the high-precision adc detection field for small-signal, for example, transducing signal detection, body electrical signals detection, are surveyed
Accuracy of measurement is index of greatest concern.In modern society, everywhere may be used by the portable lithium battery power supply equipment of representative of mobile phone
See.Since the power supply volume of battery is limited, the service life is intended for single use increasingly in the battery for extending equipment using the measurement method of low-power consumption
It is concerned by people.So the precision and power problems of ADC detections are greatly paid close attention in battery supply set.
Invention content
Based on this, therefore the present invention primary mesh be to provide it is a kind of reduction numeric field to high-precision adc interfere it is low at
This low-power consumption method of supplying power to, this method are directed to the one side that digital circuit interferes analog circuit, i.e., since power supply becomes
ADC caused by change reads variation issue, particular for high-precision, the application scenarios of low-power consumption, can be effectively reduced power consumption, and
Cost of implementation is low.
Another mesh of the present invention it is to provide a kind of low cost low-power consumption that reduction numeric field interferes high-precision adc
Method of supplying power to, this method are realized simplicity, can be reduced at low cost by the power consumption control of the shutdown realization LDO modules to LDO
Numeric field interferes high-precision adc.
To achieve the above object, the technical scheme is that：
A kind of low cost low-power consumption method of supplying power to for reducing numeric field and high-precision adc being interfered, it is characterised in that this method
LDO modules are connected in digital circuit, LDO modules are connected to driving tube, and when system needs to enter suspend mode, digital circuit is logical
It crosses suspend mode instruction to turn off LDO, there is no power consumptions for LDO modules, but the grid voltage VPS of its driving tube is also referred to by suspend mode
Order drags down, and to open driving tube, keeps the power supply to digital circuit.The voltage of node VLDO was determined by the output of LDO originally
Fixed, after driving tube unlatching, VLDO is approximately equal to supply voltage.At this point, VLDO also will be with mains voltage variations, but system
In a dormant state, ADC detectable voltage signals are not needed, so the variation of VLDO does not interfere with ADC readings.When system is restored to
When normal mode, digital circuit opens LDO by exiting suspend mode instruction, and VLDO voltages are stabilized, and digital circuit is done
Disturbing will not read with power source change, ADC not with power source change.
Although at the system electrification moment, the state of digital circuit is indefinite.Digital circuit may just be sent out to LDO powering on the moment
Go out dormancy instruction, it is also possible to send out and exit dormancy instruction.But no matter which kind of situation, have power supply unit to digital circuit supply
Electricity makes it complete electrification reset, working condition is determined, without powering on the case where failure leads to logical miss.
Further, the LDO modules are connected to PMOS tube, and the poles G of the PMOS tube and LDO modules are connected to power supply together,
The poles D of PMOS tube are connected to LDO modules, and the poles S of PMOS tube are connected to ground capacity and digital circuit, and digital circuit passes through control pmos
The shutdown of LDO processed.
The present invention is by LDO modules, and when system needs to enter suspend mode, digital circuit is instructed by suspend mode will
LDO is turned off, and there is no power consumptions for LDO modules, but the grid voltage VPS of its driving tube is also dragged down by dormancy instruction, to drive
Dynamic pipe is opened.When system is restored to normal mode, digital circuit opens LDO, VLDO voltages by exiting suspend mode instruction
Stabilized, the interference of digital circuit will not be read with power source change, ADC not with power source change, thus avoid digital circuit
Interference, while can also reduce the power consumption of LDO.
From the design difficulty of LDO and at originally, system is not high to the power consumption requirements of LDO, is set according to common index
Meter chooses device, and design difficulty and cost will not be significantly increased.
Description of the drawings
Fig. 1 is the schematic diagram for the ADC detection analog voltage signals that the prior art is realized.
Fig. 2 is the circuit diagram of the implemented ADC detections analog voltage signal of the present invention.
Fig. 3 is the implemented node VLDO voltage oscillograms of the present invention.
Specific implementation mode
In order to make the purpose , technical scheme and advantage of the present invention be clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
The solution of the present invention is as shown in Figure 2.PMOS driving tubes in figure are practical to be under the jurisdiction of LDO circuit, for providing driving
Electric current.In order to clearly state principle, individually depicts PMOS driving tubes and mark the node voltage VPS of grid.
The thinking that the invention solves the problems, such as is still that digital electricity is avoided by providing the regulated power supply of LDO to digital circuit
Road generates analog circuit the interference with power source change.The present invention is connected to LDO modules in digital circuit, LDO modules are connected to drive
Dynamic pipe.Specifically, the LDO modules are connected to PMOS tube, and the poles G of the PMOS tube and LDO modules are connected to power supply together,
The poles D of PMOS tube are connected to LDO modules, and the poles S of PMOS tube are connected to ground capacity and digital circuit, and digital circuit passes through control pmos
The shutdown of LDO processed.
The innovative point of invention is that, when system needs to enter suspend mode, digital circuit is instructed by suspend mode will
LDO is turned off, and there is no power consumptions for LDO modules, but the grid voltage VPS of its driving tube is also dragged down by dormancy instruction, to drive
Dynamic pipe is opened.The voltage of node VLDO was determined by the output of LDO originally, and after driving tube unlatching, VLDO is approximately equal to power supply electricity
Pressure.At this point, VLDO also will be with mains voltage variations, but system is in a dormant state, does not need ADC detectable voltage signals,
So the variation of VLDO does not interfere with ADC readings.When system is restored to normal mode, digital circuit is by exiting suspend mode
LDO is opened in instruction, and VLDO voltages are stabilized, and the interference of digital circuit will not become with power source change, ADC readings with power supply
Change.The waveform of VLDO is as shown in Figure 3.
At the system electrification moment, the state of digital circuit is indefinite.Digital circuit may just be sent out not to LDO powering on the moment
It sleeps and instructs, it is also possible to send out and exit dormancy instruction.But no matter which kind of situation, there is power supply unit to make supplying digital circuits
It completes electrification reset, working condition is determined, without powering on the case where failure leads to logical miss.
From the design difficulty of LDO and at originally, system is not high to the power consumption requirements of LDO, is set according to common index
Meter chooses device, and design difficulty and cost will not be significantly increased.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
All any modification, equivalent and improvement etc., should all be included in the protection scope of the present invention made by within refreshing and principle.
Claims (2)
1. a kind of low cost low-power consumption method of supplying power to for reducing numeric field and interfering high-precision adc, it is characterised in that this method exists
LDO modules are connected in digital circuit, LDO modules are connected to driving tube, and when system needs to enter suspend mode, digital circuit passes through
Suspend mode instruction turns off LDO, and there is no power consumptions for LDO modules, but the grid voltage VPS of its driving tube is also by dormancy instruction
It drags down, to open driving tube.
2. reducing the low cost low-power consumption method of supplying power to that numeric field interferes high-precision adc as described in claim 1, feature
It is that the LDO modules are connected to PMOS tube, and the poles G of the PMOS tube and LDO modules are connected to power supply, the poles D of PMOS tube together
LDO modules are connected to, the poles S of PMOS tube are connected to ground capacity and digital circuit, and digital circuit controls the pass of LDO by PMOS tube
It is disconnected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810241294.5A CN108646834A (en) | 2018-03-22 | 2018-03-22 | A kind of low cost low-power consumption method of supplying power to for reducing numeric field and high-precision adc being interfered |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810241294.5A CN108646834A (en) | 2018-03-22 | 2018-03-22 | A kind of low cost low-power consumption method of supplying power to for reducing numeric field and high-precision adc being interfered |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108646834A true CN108646834A (en) | 2018-10-12 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201810241294.5A Pending CN108646834A (en) | 2018-03-22 | 2018-03-22 | A kind of low cost low-power consumption method of supplying power to for reducing numeric field and high-precision adc being interfered |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101013142A (en) * | 2006-12-29 | 2007-08-08 | 徐红启 | Portable universal digital storage oscillograph |
| CN103324268A (en) * | 2013-05-29 | 2013-09-25 | 东南大学 | Low-power design method for wireless sensor network core chip |
| US20140300337A1 (en) * | 2007-03-12 | 2014-10-09 | Luciano Processing L.L.C. | Intelligent voltage regulator |
| US9250638B1 (en) * | 2013-01-18 | 2016-02-02 | Linear Technology Corporation | Voltage regulator sleep control in dropout mode |
| CN107817064A (en) * | 2017-09-12 | 2018-03-20 | 芯海科技（深圳）股份有限公司 | A kind of low-power consumption sensor array processing circuit and control method |
-
2018
- 2018-03-22 CN CN201810241294.5A patent/CN108646834A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101013142A (en) * | 2006-12-29 | 2007-08-08 | 徐红启 | Portable universal digital storage oscillograph |
| US20140300337A1 (en) * | 2007-03-12 | 2014-10-09 | Luciano Processing L.L.C. | Intelligent voltage regulator |
| US9250638B1 (en) * | 2013-01-18 | 2016-02-02 | Linear Technology Corporation | Voltage regulator sleep control in dropout mode |
| CN103324268A (en) * | 2013-05-29 | 2013-09-25 | 东南大学 | Low-power design method for wireless sensor network core chip |
| CN107817064A (en) * | 2017-09-12 | 2018-03-20 | 芯海科技（深圳）股份有限公司 | A kind of low-power consumption sensor array processing circuit and control method |
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Application publication date: 20181012 |
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