CN108614669B - Key-data access method for solving hash collision and solid-state storage device - Google Patents

Key-data access method for solving hash collision and solid-state storage device Download PDF

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CN108614669B
CN108614669B CN201611142834.1A CN201611142834A CN108614669B CN 108614669 B CN108614669 B CN 108614669B CN 201611142834 A CN201611142834 A CN 201611142834A CN 108614669 B CN108614669 B CN 108614669B
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data
key value
value
host
physical address
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CN108614669A (en
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袁戎
陈亮
孙清涛
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Beijing Memblaze Technology Co Ltd
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Beijing Memblaze Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604—Improving or facilitating administration, e.g. storage management
    • G06F3/0607—Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

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  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
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  • Storage Device Security (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

The application provides a key-data access method for solving hash collision and a solid-state storage device. The disclosed method comprises: receiving a first Key (Key) Value and a first data (Value) from a host; performing hash operation on the first key value to obtain a first hash value; allocating a first physical address to the first hash value; and writing the first key value and the first data into a first data unit corresponding to the first physical address. The disclosed solid-state storage device includes an interface, a control unit for controlling data transmission between the interface, the NVM chip(s) and the DRAM, one or more NVM chips, and the DRAM, and performs the above-described method by executing a program. The application is applied to data access operation of the solid-state storage device.

Description

Key-data access method for solving hash collision and solid-state storage device
Technical Field
The present application relates to the field of storage technologies, and in particular, to a data access method for a solid-state storage device based on a KV model and a solid-state storage device.
Background
The NVM (Non-Volatile Memory) is used for realizing a Memory function and has a Non-Volatile characteristic. FIG. 1 is a block diagram of a solid-state storage device of the prior art. The solid state storage device 102 is coupled to a host for providing storage capability to the host. The host and the solid-state storage device 102 may be coupled by various methods, including but not limited to, connecting the host and the solid-state storage device 102 by, for example, SATA (Serial Advanced Technology Attachment), SCSI (Small Computer System Interface), SAS (Serial Attached SCSI), IDE (Integrated Drive Electronics), USB (Universal Serial Bus), PCIE (Peripheral Component Interconnect Express, PCIE, high-speed Peripheral Component Interconnect), NVMe (NVM Express, high-speed nonvolatile storage), ethernet, fiber channel, wireless communication network, etc. The host may be an information processing device, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, etc., capable of communicating with the storage device in the manner described above. The Memory device 102 includes an interface 103, a control section 104, one or more NVM chips 105, and a DRAM (Dynamic Random Access Memory) 110.
NAND flash Memory, phase change Memory, feRAM (Ferroelectric RAM), MRAM (magnetoresistive Memory), RRAM (Resistive Random Access Memory), etc. are common NVM.
The interface 103 may be adapted to exchange data with a host by means such as SATA, IDE, USB, PCIE, NVMe, SAS, ethernet, fibre channel, etc.
Control component 104 is used to control data transfers between interface 103, NVM chip 105, and firmware memory 110, as well as for memory management, host logical address to flash physical address mapping, erase leveling, bad block management, and the like. The control component 104 can be implemented in various manners of software, hardware, firmware, or a combination thereof, for example, the control component 104 can be in the form of an FPGA (Field-programmable gate array), an ASIC (Application-Specific Integrated Circuit), or a combination thereof; the control component 104 may also include a processor or controller in which software is executed to manipulate the hardware of the control component 104 to process IO (Input/Output) commands; the control component 104 may also be coupled to the DRAM 110 and may access data of the DRAM 110; FTL tables and/or cached IO command data may be stored in the DRAM.
The memory Target (Target) is one or more Logic UNit(s) (Logic UNit) that share a Chip Enable (CE) signal within the flash memory pellet 105 package. One or more dies (Die) may be included within the NAND flash memory package. Typically, a logic cell corresponds to a single die. The logical unit may include a plurality of planes (planes). Multiple planes within a logical unit may be accessed in parallel, while multiple logical units within a NAND flash memory chip may execute commands and report status independently of each other. In thathttp：//www.onfi.org/～/media/ONFI/specs/ONFI_3_2％20Gold.pdfIn the "Open NAND Flash Interface Specification (version 3.2)" obtained, the meaning about target (target), logical Unit (LUN), plane (Plane) is provided, and a command to operate the NVM chip is also provided.
Data is typically stored and read on a storage medium on a page-by-page basis. And data is erased in blocks. A block contains multiple pages. Pages on the storage medium (referred to as physical pages) have a fixed size, e.g., 17664 bytes. Physical pages may also have other sizes. The physical page may include a plurality of data frames (data frames) therein, the data frames having a specified size, e.g., 4096 or 4416 bytes.
In a solid-state storage device, mapping information from logical addresses to physical addresses is maintained using FTL (Flash Translation Layer). The logical addresses constitute the storage space of the solid-state storage device as perceived by upper-level software, such as an operating system. The physical address is an address for accessing a physical memory location of the solid-state memory device. Address mapping may also be implemented in the prior art using an intermediate address modality. For example, mapping the logical address to an intermediate address, which in turn is further mapped to a physical address.
A table structure in which mapping information from logical addresses to physical addresses is stored is called an FTL table. FTL tables are important metadata in solid state storage devices. Usually, the data item of the FTL table records the address mapping relationship in the unit of data page/data frame in the solid-state storage device.
The NVMe protocol (see "NVM Express review 1.2", 11/3/2014, which is incorporated by reference in its entirety in this specification) defines command and data structures for exchanging data between a Host (Host) and a Device (Device). Multiple queues are maintained in the host, each queue being populated with multiple commands. The host and the device exchange data based on the queue. The host computer fills the command C into the submission queue, the equipment acquires the command C from the submission queue, processes the command C according to the content of the command C, and fills the processing result into the completion queue. The host obtains the results of the processing of command C from the completion queue to know that the processing of command C is complete. Namespaces (NS) are also defined in the NVMe protocol. A namespace of size n is a set of logical blocks with logical block addresses from 0 to n-1. Namespaces can be uniquely identified by Namespace ID (NS ID). The namespace can be shared between hosts or NVMe controllers. The hosts can access different namespaces through a single NVMe controller. Different hosts may also access the same namespace through multiple NVMe controllers.
Disclosure of Invention
The application aims to provide a data access method and a solid-state storage device based on a KV model.
According to a first aspect of the present invention, there is provided a first KV model-based data access method according to the first aspect of the present invention, the method comprising: receiving a first Key (Key) Value and a first data (Value) from a host; performing hash operation on the first key value to obtain a first hash value; allocating a first physical address to the first hash value; and writing the first key value and the first data into a first data unit corresponding to the first physical address.
According to the first KV model-based data access method of the first aspect of the present invention, there is provided the second KV model-based data access method of the first aspect of the present invention, further comprising: and recording the first hash value and the first physical address allocated to the first hash value into a flash memory transfer layer table.
According to the first or second KV model-based data access method of the first aspect of the present invention, there is provided a third KV model-based data access method according to the first aspect of the present invention, further comprising: and writing a first key value and the starting address and/or the length of the first data in the first data unit.
According to a third data access method based on the KV model of the first aspect of the present invention, there is provided a fourth data access method based on the KV model of the first aspect of the present invention, wherein if the first data unit cannot accommodate the first key value and the first data, the first key value and the first data are written in the first data unit and one or more second data units that are consecutive to the first data unit in physical address.
According to the first or second data access method based on the KV model of the first aspect of the present invention, there is provided a fifth data access method based on the KV model of the first aspect of the present invention, wherein the number N of data units to be used is obtained according to the first key value and the length of the first data, where N is a positive integer greater than or equal to 1; and writing a first key value and first data in N data units which start at a first physical address and have continuous physical addresses, and starting addresses and/or lengths of the first key value and the first data in the N data units.
According to the KV model-based third to fifth data access methods of the first aspect of the present invention, there is provided the KV model-based sixth data access method of the first aspect of the present invention, when a sum of the length of the first key value and the first data is insufficient to fill the last data unit, the data is filled to fill the last data unit.
According to the first to sixth KV model-based data access methods of the first aspect of the present invention, there is provided a seventh KV model-based data access method according to the first aspect of the present invention, further comprising: receiving a first key value from a host; performing hash operation on the first key value to obtain a first hash value; acquiring a first physical address from a flash memory transfer layer table according to the first hash value; reading the starting address and/or the length of the first data from the first data unit corresponding to the first physical address; and obtaining the first data according to the initial address and the length of the first data.
According to a seventh KV model-based data access method of the first aspect of the present invention, there is provided an eighth KV model-based data access method of the first aspect of the present invention, further comprising: and obtaining a second key value from the first data unit, comparing the second key value with a first key value provided by a host, and reading out the first data when the first key value is the same as the second key value.
According to an eighth KV model-based data access method of the first aspect of the present invention, there is provided the ninth KV model-based data access method of the first aspect of the present invention, which indicates to the host that an error has occurred when the first key value is different from the second key value.
According to the second to sixth KV model-based data access methods of the first aspect of the present invention, there is provided the tenth KV model-based data access method according to the first aspect of the present invention, further comprising: receiving a first key value and second data from a host; performing hash operation on the first key value to obtain a first hash value; assigning a second physical address to the first hash value; writing the first key value and the second data into a third data unit corresponding to the second physical address; and updating the flash memory transfer layer table by using the first hash value and the third physical address allocated to the first hash value.
According to a second aspect of the present invention, there is provided a first solid-state storage device based on a KV model according to the second aspect of the present invention, the solid-state storage device comprising a data receiving module, a hash operation module, a physical address assignment module, and a data writing module, the data receiving module being configured to receive a first key value and first data from a host; the hash operation module is used for carrying out hash operation on the first key value to obtain a first hash value; the physical address allocation module is used for allocating a first physical address for the first hash value; and the data writing module is used for writing the first key value and the first data into a first data unit corresponding to the first physical address.
According to the first solid-state storage device based on the KV model in the second aspect of the present invention, the second solid-state storage device based on the KV model in the second aspect of the present invention is provided, further comprising a flash migration layer table updating module, configured to record the first hash value and the first physical address allocated thereto in a flash migration layer table.
According to the first or second solid-state storage device based on the KV model of the second aspect of the present invention, there is provided a third solid-state storage device according to the second aspect of the present invention, wherein the data writing module is further configured to write, in the first data unit, a first key value and a start address and/or a length of the first data in the first data unit.
According to a third solid-state storage device based on a KV model of the second aspect of the present invention, there is provided the fourth solid-state storage device according to the second aspect of the present invention, wherein the data writing module is further configured to write the first key value and the first data in the first data unit and one or more second data units that are consecutive to the first data unit in physical address, if the first data unit cannot accommodate the first key value and the first data.
According to the third or fourth solid-state storage device based on the KV model of the second aspect of the present invention, there is provided the fifth solid-state storage device according to the second aspect of the present invention, further comprising a length calculating unit, configured to obtain a number N of data units to be used according to the first key value and the length of the first data, where N is a positive integer greater than or equal to 1; and the data writing module is further used for writing a first key value and first data in N data units which start at a first physical address and have continuous physical addresses, and starting addresses and/or lengths of the first key value and the first data in the N data units.
According to the third to fifth solid-state storage devices based on KV model of the second aspect of the present invention, there is provided the sixth solid-state storage device according to the second aspect of the present invention, further comprising a data padding module for padding data to fill a last data unit when a sum of the first key value and a length of the first data is insufficient to fill the last data unit.
According to the first to sixth solid-state storage devices based on the KV model of the second aspect of the present invention, a seventh solid-state storage device according to the second aspect of the present invention is provided, further comprising a retrieving module and a data reading module, wherein the data receiving module is further configured to receive a first key value from a host; the hash operation module is also used for carrying out hash operation on the first key value to obtain a first hash value; the retrieval module is used for acquiring a first physical address from the flash memory transfer layer table according to the first hash value and sending the first physical address to the data reading module; the data reading module is used for reading out the starting address and/or the length of the first key value from the first data unit corresponding to the first physical address; and obtaining the first data according to the initial address and the length of the first data.
According to a seventh solid-state storage device based on the KV model of the second aspect of the present invention, there is provided an eighth solid-state storage device according to the second aspect of the present invention, further comprising a comparing module, configured to compare a second key value with a first key value provided by a host after the data reading module obtains the second key value from a first data unit; and responding to the read data signal, the data reading module is used for reading out first data when the first key value is the same as the second key value.
According to an eighth KV model-based solid-state storage device of the second aspect of the present invention, there is provided the ninth solid-state storage device of the second aspect of the present invention, wherein the comparing module is further configured to indicate to the host that an error occurs when the first key value is different from the second key value.
According to the second to sixth solid-state storage devices based on the KV model of the second aspect of the present invention, there is provided the tenth solid-state storage device according to the second aspect of the present invention, wherein the data receiving module is further configured to receive the first key value and the second data from the host; the hash operation module is also used for carrying out hash operation on the first key value to obtain a first hash value; the physical address distribution module is also used for distributing a second physical address for the first hash value, and the data writing module is also used for writing the first key value and the second data into a third data unit corresponding to the second physical address; and the flash memory transfer layer table updating module is also used for updating the flash memory transfer layer table by using the first hash value and the third physical address distributed to the first hash value.
According to a third aspect of the present invention, there is provided a solid-state storage device according to the third aspect of the present invention, the solid-state storage device comprising a host interface, an NVM chip, a control means for controlling data transfer between the interface, the NVM chip and the DRAM, and a DRAM, the control means executing the method according to the KV model-based first to tenth data access methods according to the first aspect of the present invention by executing a program.
According to a fourth aspect of the present invention, there is provided a solid-state storage device according to the fourth aspect of the present invention, comprising a host interface, an NVM chip, a control means for controlling data transmission between the host interface, the NVM chip and the DRAM, and a DRAM, the control means for receiving a first key value and first data from the host; performing hash operation on the first key value to obtain a first hash value; allocating a first physical address to the first hash value; and writing the first key value and the first data into a first data unit corresponding to the first physical address.
According to a fifth aspect of the present invention, there is provided a first KV model-based data access method according to the fifth aspect of the present invention, the method including: receiving a second Key (Key) Value and a second data (Value) from the host; performing hash operation on the second key value to obtain a second hash value; if a first hash value equal to the second hash value is recorded in the flash memory transfer layer table, acquiring a first physical address corresponding to the first hash value from the flash memory transfer layer table; assigning a second physical address to the second hash value; reading a first key value and first data from a first physical address; and writing the second key value and the second data, the first key value and the first data into a second data unit indicated by the second physical address.
According to the first KV model-based data access method of the fifth aspect of the present invention, there is provided the second KV model-based data access method of the fifth aspect of the present invention, further comprising updating the second hash value and the second physical address to the flash memory transfer layer table.
According to the first or second KV model-based data access method of the fifth aspect of the present invention, there is provided the third KV model-based data access method of the fifth aspect of the present invention, in which in the second data unit, the first key value and the start address and/or length of the first data in the second data unit, and the second key value and the start address and/or length of the second data in the second data unit are written.
According to the first to third data access methods based on the KV model of the fifth aspect of the present invention, there is provided a fourth data access method based on the KV model of the fifth aspect of the present invention, wherein if the second data unit cannot accommodate the first key value and the first data, the second key value and the second data, the first key value and the first data, the second key value and the second data are written in the second data unit and one or more third data units that are consecutive to the second data unit in physical address.
According to a fourth KV model-based data access method of the fifth aspect of the present invention, there is provided the fifth KV model-based data access method of the fifth aspect of the present invention, wherein the key value is written in the same data unit as the data, or written in a different data unit.
According to the first to fifth data access methods based on the KV model of the fifth aspect of the present invention, there is provided the sixth data access method based on the KV model of the fifth aspect of the present invention, further writing conflict information of the first key value and the second key value in a plurality of data units that start at the second physical address and are consecutive.
According to the first to sixth KV model-based data access methods of the fifth aspect of the present invention, there is provided a seventh KV model-based data access method according to the fifth aspect of the present invention, further comprising receiving a third key value from the host; performing hash operation on the third key value to obtain a third hash value; retrieving the flash memory transfer layer table; if a first hash value equal to the third hash value is recorded in the flash memory transfer layer table, acquiring a second physical address corresponding to the first hash value; acquiring a first key value and a second key value based on the second physical address, and comparing the first key value and the second key value with a third key value received by the host; if the second key value is equal to the third key value, second data is obtained; and sending the second data to the host.
According to a fifth KV model-based data access method of a fifth aspect of the present invention, there is provided an eighth KV model-based data access method of the fifth aspect of the present invention, in which the key value and the start address and/or length of the data in the same or different data units are written, respectively.
According to an eighth KV model-based data access method of the fifth aspect of the present invention, there is provided a ninth KV model-based data access method of the fifth aspect of the present invention, further comprising: receiving a third key value from the host; performing hash operation on the third key value to obtain a third hash value; retrieving the flash memory transfer layer table; if the first hash value equal to the third hash value is recorded in the flash memory transfer layer table; acquiring a second physical address corresponding to the first hash value; acquiring a first key value according to the second physical address, acquiring a second key value according to the second physical address and the lengths of the first key value and the first data if the first key value is not equal to the third key value, and acquiring second data corresponding to the second key value if the second key value is equal to the third key value; and sending the second data to the host.
According to a sixth aspect of the present invention, there is provided the first solid-state storage device based on the KV model according to the sixth aspect of the present invention, the solid-state storage device includes a data receiving module, a hash operation module, a retrieval module, a physical address allocation module, a data obtaining module, and a data writing module, wherein the data receiving module is configured to receive a second key value and second data from a host; the hash operation module is used for carrying out hash operation on the second key value to obtain a second hash value; the retrieval module is used for retrieving the flash memory transfer layer table and acquiring a first physical address corresponding to the first hash value from the flash memory transfer layer table; the physical address allocation module is used for allocating a second physical address for the second hash value; the data acquisition module is used for reading a first key value and first data from a first physical address; and the data writing module is used for writing the second key value, the second data, the first key value and the first data into a second data unit indicated by the second physical address.
According to the first solid-state storage device based on the KV model in the sixth aspect of the present invention, there is provided the second solid-state storage device according to the sixth aspect of the present invention, further comprising a flash migration layer table updating module for updating the second hash value and the second physical address to the flash migration layer table.
According to the first or second solid-state storage device based on the KV model of the sixth aspect of the present invention, there is provided the third solid-state storage device according to the sixth aspect of the present invention, wherein the data writing module is further configured to write, in the second data unit, the first key value and the start address and/or length of the first data in the second data unit, and the second key value and the start address and/or length of the second data in the second data unit.
According to the first to third solid-state storage devices based on the KV model of the sixth aspect of the present invention, there is provided the fourth solid-state storage device according to the sixth aspect of the present invention, wherein the data writing module is further configured to write the first key value and the first data, the second key value and the second data in the second data unit and one or more third data units that are consecutive to the second data unit in physical address, if the second data unit cannot accommodate the first key value and the first data, the second key value and the second data.
According to a fourth solid-state storage device based on the KV model of the sixth aspect of the present invention, there is provided the fifth solid-state storage device of the sixth aspect of the present invention, wherein the data writing module is further configured to write the key value and the data into the same data unit or different data units.
According to the first to fifth solid-state storage devices based on the KV model of the sixth aspect of the present invention, there is provided the sixth solid-state storage device according to the sixth aspect of the present invention, wherein the data writing module is further configured to write conflict information of the first key value and the second key value in a plurality of data units that start at the second physical address and are consecutive.
The second to sixth solid-state storage devices based on the KV model according to the sixth aspect of the present invention provide the seventh solid-state storage device according to the sixth aspect of the present invention, further comprising a comparing module, wherein the data receiving module is further configured to receive a third key value from the host; the hash operation module is also used for carrying out hash operation on the third key value to obtain a third hash value; the retrieval module is also used for retrieving the flash memory transfer layer table to obtain a second physical address corresponding to the first hash value; the comparison module is used for acquiring the first key value and the second key value based on the second physical address and comparing the first key value and the second key value with a third key value received by the host; the data reading module is further used for acquiring second data if the second key value is equal to the third key value; and sending the second data to the host.
According to a seventh solid-state storage device based on the KV model of the sixth aspect of the present invention, there is provided the eighth solid-state storage device of the sixth aspect of the present invention, wherein the data writing module is further configured to write the key value and the start address and/or length of the data in the same or different data units, respectively, in the same or different data units.
According to an eighth KV model-based solid-state storage device of the sixth aspect of the present invention, there is provided the ninth solid-state storage device of the sixth aspect of the present invention, wherein the data receiving module is further configured to receive a third key value from the host; the hash operation module is also used for carrying out hash operation on the third key value to obtain a third hash value; the retrieval module is also used for retrieving the flash memory transfer layer table and acquiring a second physical address corresponding to a first hash value equal to a third hash value; the comparison module is also used for acquiring a first key value according to the second physical address; if the first key value is not equal to the third key value, acquiring a second key value according to the second physical address and the lengths of the first key value and the first data; the data reading module is further used for acquiring second data corresponding to the second key value if the second key value is equal to the third key value; and sending the second data to the host.
According to a seventh aspect of the present invention, there is provided a solid-state storage device according to the seventh aspect of the present invention, comprising a host interface, an NVM chip, a control means for controlling data transfer between the host interface, the NVM chip and the DRAM, and a DRAM, the controller means executing the method according to the first to ninth KV model-based data access methods of the fifth aspect of the present invention by executing a program.
According to an eighth aspect of the present invention, there is provided a solid-state storage device according to the eighth aspect of the present invention, comprising a host interface, an NVM chip, a control means for controlling data transmission between the host interface, the NVM chip and a DRAM, the controller means for receiving a second key value and second data from the host; performing hash operation on the second key value to obtain a second hash value; if a first hash value equal to the second hash value is recorded in the flash memory transfer layer table, acquiring a first physical address corresponding to the first hash value from the flash memory transfer layer table; assigning a second physical address to the second hash value; reading a first key value and first data from a first physical address; and writing the second key value and the second data, the first key value and the first data into a second data unit indicated by the second physical address.
According to a ninth aspect of the present invention, there is provided a first KV model-based data access method according to the ninth aspect of the present invention, the method including: receiving a first Key (Key) Value and a first data (Value) from a host; obtaining a namespace corresponding to the first data; performing hash operation on the first key value to obtain a first hash value; allocating a first physical address to the first hash value; a specified number of data units is determined based on the namespace, and the first key value and the first data are written to the specified number of data units indicated by the first physical address.
According to a first KV model-based data access method of a ninth aspect of the present invention, there is provided the second KV model-based data access method of the ninth aspect of the present invention, wherein a namespace identifier corresponding to the first data is received from the host, and the namespace corresponding to the first data is obtained from the namespace identifier.
According to the first KV model-based data access method of the ninth aspect of the present invention, there is provided the third KV model-based data access method of the ninth aspect of the present invention, obtaining a namespace corresponding to the first data according to a length of the first data received from the host.
According to the third data access method based on the KV model in the ninth aspect of the present invention, there is provided the fourth data access method based on the KV model in the ninth aspect of the present invention, and the namespace corresponding to the first data is obtained according to the length range in which the length of the first data is located.
According to the first to fourth KV model-based data access methods of the ninth aspect of the present invention, there is provided the fifth KV model-based data access method of the ninth aspect of the present invention, wherein when the length of the first data is smaller than the size of the specified number of data units, the data is filled to fill the specified number of data units.
According to the first to fifth KV model-based data access methods of the ninth aspect of the present invention, there is provided the sixth KV model-based data access method of the ninth aspect of the present invention, recording the first hash value and the first physical address assigned to the first hash value to the flash transfer layer table.
According to the first to fifth KV model-based data access methods of the ninth aspect of the present invention, there is provided a seventh KV model-based data access method of the ninth aspect of the present invention, recording the first hash value and the first physical address assigned to the first hash value in the flash memory transfer layer table corresponding to the namespace corresponding to the first data, according to the namespace corresponding to the first data.
According to the first to seventh KV model-based data access methods of the ninth aspect of the present invention, there is provided an eighth KV model-based data access method according to the ninth aspect of the present invention, further comprising: receiving a second key value from the host; performing hash operation on the second key value to obtain a second hash value; inquiring a second hash value from the flash memory transfer layer table to obtain a second physical address allocated to the second hash value; and acquiring second data from the second physical address and sending the second data to the host.
According to an eighth KV model-based data access method of the ninth aspect of the present invention, there is provided the ninth KV model-based data access method of the ninth aspect of the present invention, wherein the flash migration layer table corresponding to the indicated namespace is accessed to obtain the second hash value corresponding to the second key value according to the indication of the namespace received from the host.
According to an eighth KV model-based data access method of the ninth aspect of the present invention, there is provided the tenth KV model-based data access method of the ninth aspect of the present invention, wherein the plurality of flash transfer layer tables corresponding to different namespaces are searched to obtain the second hash value corresponding to the second key value.
According to the first to tenth KV model-based data access methods of the ninth aspect of the present invention, there is provided the KV model-based eleventh data access method of the ninth aspect of the present invention, further comprising: writing the length of the first data into the data unit indicated by the first physical address.
According to an eleventh KV model-based data access method of the ninth aspect of the present invention, there is provided the twelfth KV model-based data access method of the ninth aspect of the present invention, further comprising: receiving a third key value from the host; performing hash operation on the third key value to obtain a third hash value; inquiring a third hash value from the flash memory transfer layer table to obtain a third physical address distributed to the third hash value; acquiring the length of the third data from the data unit indicated by the third physical address, and reading the third data according to the acquired length; and sending the third data to the host.
According to a tenth aspect of the present invention, there is provided the first solid-state storage device according to the tenth aspect of the present invention, comprising: the system comprises a data receiving module, a name space acquiring module, a hash operation module, a physical address distribution module and a data writing module, wherein the data receiving module is used for receiving a first key value and first data from a host; the name space acquisition module is used for acquiring a name space corresponding to the first data; the hash operation module is used for carrying out hash operation on the first key value to obtain a first hash value; the physical address allocation module is used for allocating a first physical address for the first hash value; and the data writing module is used for determining a specified number of data units based on the namespace and writing the first key value and the first data into the specified number of data units indicated by the first physical address.
According to the first solid-state storage device of the tenth aspect of the present invention, there is provided the second solid-state storage device of the tenth aspect of the present invention, wherein the namespace obtaining module is configured to receive a namespace identifier corresponding to the first data from the host, and obtain the namespace corresponding to the first data according to the namespace identifier.
According to the first solid-state storage device of the tenth aspect of the present invention, there is provided the third solid-state storage device of the tenth aspect of the present invention, wherein the namespace obtaining module is further configured to obtain a namespace corresponding to the first data according to a length of the first data received from the host.
According to the third solid-state storage device of the tenth aspect of the present invention, there is provided the fourth solid-state storage device of the tenth aspect of the present invention, wherein the namespace obtaining module is further configured to obtain the namespace corresponding to the first data according to a length range in which the length of the first data is located.
According to the first to fourth solid-state storage devices of the tenth aspect of the present invention, there is provided the fifth solid-state storage device of the tenth aspect of the present invention, further comprising a data padding module for padding data to fill in the specified number of data units when a length of the first data is smaller than a size of the specified number of data units.
According to the first to fifth solid-state storage devices of the tenth aspect of the present invention, there is provided the sixth solid-state storage device of the tenth aspect of the present invention, further comprising a flash migration layer table updating module configured to record the first hash value and the first physical address assigned to the first hash value in the flash migration layer table.
According to the first to sixth solid-state storage devices of the tenth aspect of the present invention, there is provided the seventh solid-state storage device of the tenth aspect of the present invention, the flash transfer layer table updating module is further configured to record the first hash value and the first physical address allocated to the first hash value in the flash transfer layer table corresponding to the namespace corresponding to the first data according to the namespace corresponding to the first data.
According to the first to seventh solid-state storage devices of the tenth aspect of the present invention, there is provided the eighth solid-state storage device of the tenth aspect of the present invention, further comprising a data reading module and a retrieving module, wherein the data receiving module is further configured to receive a second key value from the host; the hash operation module is also used for carrying out hash operation on the second key value to obtain a second hash value; the retrieval module is used for inquiring the second hash value from the flash memory transfer layer table to obtain a second physical address distributed to the second hash value; and the data reading module is used for acquiring second data from the second physical address and sending the second data to the host.
According to an eighth solid-state storage device of the tenth aspect of the present invention, there is provided the ninth solid-state storage device of the tenth aspect of the present invention, further comprising a hash value obtaining module, configured to, according to an indication of a namespace received from the host, access a flash migration layer table corresponding to the indicated namespace to obtain a second hash value corresponding to the second key value.
According to a ninth solid-state storage device of the tenth aspect of the present invention, there is provided the tenth solid-state storage device of the tenth aspect of the present invention, wherein the hash value obtaining module is further configured to search the plurality of flash transfer layer tables corresponding to different namespaces to obtain the second hash value corresponding to the second key value.
According to the first to tenth solid-state storage devices of the tenth aspect of the present invention, there is provided the eleventh solid-state storage device of the tenth aspect of the present invention, wherein the data writing module is further configured to write the length of the first data to the data unit indicated by the first physical address.
According to an eleventh solid-state storage device of the tenth aspect of the present invention, there is provided the twelfth solid-state storage device of the tenth aspect of the present invention, wherein the data receiving module is further configured to receive a third key value from the host; the hash operation module is also used for carrying out hash operation on the third key value to obtain a third hash value; the retrieval module is also used for inquiring the third hash value from the flash memory transfer layer table to obtain a third physical address distributed to the third hash value; the data acquisition module is further used for acquiring the length of the third data from the data unit indicated by the third physical address and reading the third data according to the acquired length; and sending the third data to the host.
According to an eleventh aspect of the present invention, there is provided a solid-state storage device according to the eleventh aspect of the present invention, including a host interface, an NVM chip, a control means for controlling data transfer between the host interface, the NVM chip and the DRAM, and a DRAM, the controller means executing the method according to the first to twelfth KV model-based data access methods according to the ninth aspect of the present invention by executing a program.
According to a twelfth aspect of the present invention, there is provided a solid-state storage device according to the twelfth aspect of the present invention, comprising a host interface, an NVM chip, a control means for controlling data transmission between the host interface, the NVM chip and a DRAM, the controller means for receiving a first key value and first data from the host; obtaining a namespace corresponding to the first data; performing hash operation on the first key value to obtain a first hash value; allocating a first physical address to the first hash value; a specified number of data units is determined based on the namespace, and a first key value and first data are written to the specified number of data units indicated by the first physical address.
According to a thirteenth aspect of the present invention, there is provided a first KV model-based data access method according to the thirteenth aspect of the present invention, the method including: receiving a first key value from a host, and carrying out hash operation on the first key value to obtain a first hash value; inquiring a first hash value from the flash memory transfer layer table to obtain a first physical address distributed to the first hash value; and acquiring first data from the first physical address and sending the first data to the host.
According to the first data access method based on the KV model of the thirteenth aspect of the present invention, the second data access method based on the KV model of the thirteenth aspect of the present invention is proposed, wherein according to the indication of the namespace received from the host, the flash transfer layer table corresponding to the indicated namespace is accessed to obtain the first hash value corresponding to the first key value.
According to the first data access method based on the KV model of the thirteenth aspect of the present invention, there is provided a third data access method based on the KV model of the thirteenth aspect of the present invention, wherein a plurality of flash transfer layer tables corresponding to different namespaces are searched to obtain a first hash value corresponding to a first key value.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of a solid-state memory device in the prior art;
FIG. 2 is a diagram illustrating the structure of an FTL table according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of data organization of an NVM according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of data organization of an NVM according to yet another embodiment of the present invention;
FIG. 5 is a schematic diagram of data organization of an NVM according to yet another embodiment of the present invention;
fig. 6 is a schematic structural diagram of an FTL table according to yet another embodiment of the present invention;
FIG. 7 is a schematic diagram of data organization of an NVM according to yet another embodiment of the present invention;
FIG. 8 is a schematic diagram of data organization of an NVM according to yet another embodiment of the present invention;
fig. 9 is a schematic structural diagram of an FTL table according to yet another embodiment of the present invention;
FIG. 10 is a schematic diagram of data organization of an NVM according to yet another embodiment of the present invention;
fig. 11 is a schematic structural diagram of an FTL table according to yet another embodiment of the present invention;
FIG. 12 is a schematic diagram of data organization of an NVM according to yet another embodiment of the present invention;
FIG. 13 is a schematic diagram of data organization of an NVM according to yet another embodiment of the present invention;
fig. 14 is a schematic structural diagram of an FTL table according to yet another embodiment of the present invention;
FIG. 15 is a schematic diagram of data organization of an NVM according to yet another embodiment of the present invention;
fig. 16 is a schematic structural diagram of an FTL table according to yet another embodiment of the present invention;
FIG. 17 is a block diagram of a solid state storage device having multiple namespaces according to an embodiment of the present invention;
fig. 18 is a schematic structural diagram of an FTL table according to yet another embodiment of the present invention;
fig. 19 is a schematic diagram illustrating the structure of an FTL table according to yet another embodiment of the present invention; and
fig. 20 is a schematic structural diagram of an FTL table according to yet another embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In a solid-state storage device supporting a Key-Value (Key-data, also referred to simply as "KV") storage model, to perform a write operation, a host provides the solid-state storage device with a Key (Key) and data (Value) to write data to the solid-state storage device, and uses the Key as an index of the written data. To perform a read operation, the host provides a key to the solid-state storage device, which finds data based on the key and provides the data to the host. Thus in a KV storage system, the key is the index used to access the data, and the data (Value) is the data being accessed. In general, the length of the key and the data is not fixed. And optionally, the length of the keys and/or data may have a specified range in order to reduce complexity.
Fig. 2 is a schematic structural diagram of an FTL table according to an embodiment of the present invention. The FTL table shown in fig. 2 provides a mapping from the hash value derived from the key to a Physical Address (e.g., PPA, physical Page Address). For example, the mapping relationship between the hash value obtained by the key and the physical address is recorded in the FTL table. And, alternatively, the physical address recorded in the FTL table may be the start address of the Data frame (Data frame) inside the physical page in addition to the physical page address. A data frame is a unit of data having a fixed size, and a physical page may include 1 or more data frames.
In one embodiment according to the invention, the keys provided by the host are of variable length, as are the data. The hash operation is performed on the keys with different lengths to obtain a hash value with a fixed length (for example, 4 bytes/8 bytes) as an index of the FTL table. And querying the FTL table by using the hash value as an index to obtain a corresponding physical address. The FTL table can be implemented by various data structures such as an array, a linked list, a tree, etc.
Example one
FIG. 3 illustrates the data organization of an NVM of an embodiment of the present invention. In fig. 3, a physical page (or data frame) of the NVM having a physical address PPA is shown, where the PPA indicates a physical page (or data frame) address of the NVM, and a Key and a data Value are recorded in the physical page (or data frame) indicated by the physical address PPA, where the Key and the data Value are provided when the host writes data. A Header data Header indicating the start address and/or length of the Key and/or the data Value is also recorded in the physical page (or data frame) indicated by the physical address PPA. For example, the Header data Header records the length of the Key and the length of the Value (while the length of the Header part is a fixed Value), and the start address of the Key and the start address of the Value can be calculated from the physical address indicated by the PPA and the length of the Header part. In one example, the Header of the Header data records the length of the Key, and the start address of the data Value can be calculated according to the physical address indicated by the PPA and the length of the Header part, and the length of the Key. And in yet another example, the start address of the Key is fixed, and the Header data Header records the start address of the data Value.
Since the Key and the data Value are indefinite in length, in some cases the sum of the lengths of the Header data Header, the Key, and the data Value is not enough to fill a physical page (or data frame) of the NVM, data (dummy) is filled to fill the physical page (or data frame).
Example two
FIG. 4 illustrates data organization of an NVM according to yet another embodiment of the present invention. Fig. 4 shows physical pages (or data frames) with physical addresses PPA and PPA +1, where PPA indicates the physical page (or data frame) address of the NVM, PPA +1 indicates the physical page (or data frame) address consecutive to PPA at the physical address, and Key and data Value are provided when the host writes data. A portion of the Key and the host-supplied data Value is recorded in the physical page (or data frame) indicated by PPA, and the remaining portion of the host-supplied data Value is recorded in the physical page (or data frame) indicated by PPA + 1. Header data Header indicating the start address and/or length of the Key and the data Value in the physical page (or data frame) indicated by PPA and PPA +1 is also recorded in the physical page (or data frame) indicated by PPA and PPA + 1. Optionally, the number of occupied physical pages (or data frames) is also recorded in the Header data Header (in fig. 4, the number is 2).
In the embodiment according to fig. 4, the length of the data Value written by the host into the NVM exceeds 1 PPA indicated data unit size, that is, the data unit indicated by PPA cannot accommodate the data Value, and two or more data units with the starting address of the physical address indicated by PPA and consecutive physical addresses (referring to fig. 4, two consecutive data units indicated by PPA and PPA + 1) are used to store the Key provided by the host and the data Value, wherein the data units correspond to the physical page (or data frame) indicated by PPA. Further, a Header data Header is stored in two or more data units indicated by the PPA, and is used for indicating the starting address and/or the length of the Key and the data Value. Alternatively, still referring to fig. 4, when the Header data Header and the Key and data Value provided by the host have a length insufficient to fill the data unit indicated by PPA +1, the data (Dummy) is filled to fill the data unit indicated by PPA + 1.
In yet another embodiment according to the present invention, the host writes data to the NVM. The host issues a command to the NVM to write data. The NVM receives a command from the host to write data, indicating the data Value to be written and the Key1 used to index the data Value1. In response to receiving the command for writing data, the NVM performs hash operation on the Key1 to obtain a hash value H1. And the NVM allocates a physical address PPA1 to the hash value H1, and records the hash value H1 and the physical address PPA1 allocated to the hash value H1 into the FTL table. Next, the NVM writes the data Value to the data cell indicated by PPA1.
Optionally, the NVM further determines the number n of data units to be used according to the length of the Key1 and the data value. And writing the Key1 and the data Value1 in n data units (PPA 1, PPA1+ 2.) which are continuous from the PPA1 according to the number n of the data units, and a Header data, wherein the Header data is used for indicating the starting address and/or the length of the Key1 and the data Value1 in the n data units (PPA 1, PPA1+ 2.) to be used.
In yet another embodiment according to the present invention, the host reads data from the NVM. The host issues a command to the NVM to read data. The NVM receives a command for reading data from the host, wherein the command indicates an index Key Key1 corresponding to target data Value1 to be read. In response to receiving the data reading command, the NVM performs hash operation on the Key1 to obtain a hash value H1. Next, the NVM queries the FTL table according to the hash value H1 to obtain the physical address PPA1 allocated to the hash value H1. And reading Value1 from the data unit corresponding to the physical address PPA1 by the NVM and providing the Value1 to the host. Alternatively, the NVM reads the Header data Header from the data cell indicated by the physical address PPA1, and obtains the storage address of the data value from the Header data Header. And the NVM reads the data Valuel from the memory address of the data Valuel and provides the data Valuel to the host.
Optionally, the NVM also obtains the storage address and length of the Key1 from the head data Header and reads the Key1, and compares whether the Key1 is the same as Key1 provided by the host. If the Key1 read from the Header data Header is the same as Key1 provided by the host, the storage address of the data Value1 is continuously acquired and the data Value1 is read, and the data Value1 is provided to the host.
In another embodiment according to the present invention, the host updates data to the NVM. The host issues a command to the NVM to update the data. The NVM receives a command to update data from the host, where the command indicates a Value2 of the data to be updated and a Key1 for indexing the Value2, where the Value1 of the data indexed by Key1 has been stored in the NVM, and the Value1 of the data is stored in a physical address PPA1 corresponding to the Key1. In response to receiving the command for updating data, the NVM performs hash operation on the Key1 to obtain a hash value H1. And the NVM assigns a physical address PPA2 for the hash value H1. The NVM also searches the record positions of the hash value H1 and the physical address PPA1 from the FTL table, updates the FTL table according to the newly allocated physical address PPA2, and updates PPA1 with the physical address PPA2.
Optionally, the NVM further determines the number n of data units to be used according to the lengths of the Key1 and the data Value2. And recording the Key1 and the data Value2 in n data units (PPA 2, PPA2+1, PPA2+ 2.) which are started from the physical address PPA2 and are continuous according to the data unit number n, and recording a head data Header, wherein the head data Header is used for recording the starting address and/or the length of the Key1 and the data Value2 in the n data units (PPA 2, PPA2+1, PPA2+ 2.).
EXAMPLE three (Hash conflict resolution)
Hash collisions may occur when a key is hashed. The hash collision refers to different key values sent by the host, and the same hash value can be obtained through hash operation. In embodiments according to the invention, two or more sets of keys having the same hash value are stored with the data when resolving hash conflicts.
FIG. 5 illustrates the data organization of NVM in the presence of a hash collision according to an embodiment of the present invention. The physical pages (or data frames) having physical addresses of PPA and PPA +1 are shown in fig. 5, where PPA indicates the physical page (or data frame) address of NVM and PPA +1 indicates the physical page (or data frame) address consecutive to PPA at the physical address. The Key1 and the data Value supplied from the host are recorded in the physical page (or data frame) indicated by PPA, and the Key2 and the data Value2 supplied from the host are recorded in the physical page (or data frame) indicated by PPA + 1. A Header indicating the start address and/or length of the Key1, the data Value1, the Key2, and the data Value2 is also stored in the physical page (or data frame) indicated by the PPA and PPA + 1. Although it is shown in fig. 5 that the Header data Header is stored in both the physical page (or data frame) indicated by PPA1 and the physical page (or data frame) indicated by PPA +1, this is not essential. Alternatively, even if there is a hash collision, the Header data Header is stored only in the physical page (or data frame) indicated by the PPA. In each physical page (or data frame), a (same) Header data Header is stored for improving reliability, and when one or more Header data headers fail, the location where each Key and data Value are stored can be identified from the other Header data headers.
Although in fig. 5, the Key1 and the data Value1 are located in the physical page (or data frame) indicated by PPA, and the Key2 and the data Value2 are located in the physical page (or data frame) indicated by PPA +1, it is still not necessary. The physical pages (or data frames) indicated by PPA and PPA +1 provide a continuous storage space, in which multiple sets of Key keys and data values can be stored continuously (for example, multiple Key keys and data values can also appear in the same physical page (or data frame)), and the start addresses and/or lengths of the Key keys and data values are recorded in the Header.
The following describes a process of handling hash collisions according to an embodiment of the present invention.
EXAMPLE four (Hash Conflict resolution)
Fig. 6 is an FTL table according to still another embodiment of the present invention. Referring to fig. 6, the host has written Key1 and data Value1 into the NVM, the Key1 is used to index the data Value1, the hash result of the Key1 is hash Value H1, and the hash Value H1 and the physical address PPA1 assigned to the hash Value H1 are recorded in the FTL table. And referring to FIG. 7, the Key Key1 and the data Value1 are stored using two data elements indicated by consecutive physical addresses PPA1 and PPA + 1.
In the fourth embodiment according to the present application, the host distinguishes between a command to update data and a command to write data. The command to update data is used to index an existing Key to a new data Value, and the command to write data is used to write a data Value corresponding to the new Key index. Thus, when a command for writing data is processed, the index of the Key in the command is not recorded in the FTL table.
By way of example, the host updates data to NVM to update Key1 to Value2 for the index data. The host issues a command to the NVM to update the data. The NVM receives a command to update data from the host, in which the Value2 of the data to be updated and the Key1 for indexing the Value2 of the data are indicated. In response to receiving the command for updating data, the NVM performs hash operation on the Key1 to obtain a hash value H1. The NVM then obtains the physical address PPA1 corresponding to the hash value H1 by querying the FTL table (see fig 6),
since a command to update data is received, the NVM assigns a new physical address PPA2 to the hash value H1. Then, referring to fig. 8, the nvm writes the Key1 and the data Value2 into the physical page (or data frame) indicated by PPA2, and records the start addresses and/or lengths of the Key1 and the data Value2 in the Header of the Header data. And recording the physical address corresponding to the hash value H1 in the FTL table as PPA2 (see fig. 9).
Next, the host writes the data to the NVM. The host issues a command to the NVM to write data. The NVM receives a write data command from the host indicating the write data Value3 and the Key3 for indexing the data Value3. In response to receiving the command for writing data, the NVM performs hash operation on the Key3 to obtain a hash value H1. The NVM then queries the FTL table, and finds that the hash value H1 and the physical address PPA2 assigned to the hash value H1 are recorded in the FTL table (see fig. 9), so as to find that the Key3 has a hash collision with the Key1 (having the same hash value H1).
In response to the Key3 having a hash collision with the Key1, the NVM assigns a new physical address PPA3 to the hash value H1 in the FTL table. The NVM then reads key Keyl and data Value2 from physical address PPA2 (see FIG. 8). And referring to fig. 10, the nvm writes Key1, value2, key3 and Value3 in a consecutive plurality of data units starting at the assigned new physical address PPA3 (shown in fig. 10 as data units indicated by PPA3 and PPA3+ 1). Optionally, the NVM also records the existence of hash collision, and the starting address and/or length of Key1, value2, key3, and Value3 in the Header of one or more of the write data units. And recording the physical address corresponding to the hash value H1 as PPA3 in the FTL table.
As another example, the host next issues a command to read data to the NVM. The NVM receives a data reading command from the host, where the data reading command indicates an index Key3 corresponding to target data Value3 to be read. In response to receiving the data reading command, the NVM performs hash operation on the Key3 to obtain a hash value H1. Then the NVM finds the physical address corresponding to the hash value H1 to be PPA3 by querying the FTL table.
In response to finding the physical address PPA3, the NVM acquires the Header data Header from the data unit indicated by the physical address PPA3, and then acquires the storage address of the Key from the Header and acquires the Key1. When the Key Keyl is compared with the Key3 acquired from the data read command and the Key1 read from the physical address PPA3 is found to be not equal to the Key3 to be read by the host, the hash collision is present. And continuously acquiring the storage address of the next key from the Header and acquiring the key3. Since the acquired Key3 is equal to the Key3 to be read by the host, the data Value3 corresponding to the Key3 is read out and supplied to the host.
Example five (resolution of Hash conflicts)
In embodiment five according to the present application, the host does not distinguish between commands to update data and commands to write data. Thus, when processing a command to write data, if the hash value of the key in the command is present in the FTL table, it indicates either that the host wishes to update the data or that the key has a hash collision with the key already present in the FTL table. To identify whether data is to be updated or written indexed by a new key, the stored key needs to be read from the NVM. If the key provided by the host is the same as the key read from the NVM, indicating that the host wishes to update the data; if the key provided by the host is different from the key read from the NVM, it indicates that the host wishes to write data indexed by the new key.
Fig. 11 is a table of FTLs according to a fifth embodiment of the present invention. Referring to fig. 11, the host has written Key4 and Value4 into the NVM, key4 is used to index data Value4, the hash result of Key4 is H4, and the hash Value H4 and the physical address PPA4 assigned to the hash Value H4 are recorded in the FTL table. And referring to fig. 12, key4 and Value4 are stored using two data units indicated by physical address PPA4 and consecutive PPA4+ 1.
By way of example, the host writes data to the NVM. The host issues a command to the NVM to write data. The NVM receives a write data command from the host, in which the write data Value5 and the Key5 for indexing the data Value5 are indicated. In response to receiving the command for writing data, the NVM performs hash operation on the Key5 to obtain a hash value H4. The NVM then looks up the FTL table with the hash value H4 recorded and the physical address PPA4 assigned to the hash value H4 (see fig. 11). This fashion cannot determine whether the host wishes to update the data indexed by Key5 to Value5 or whether it wishes to write new data Value5 indexed by Key5.
For the purpose of determining the host, the NVM acquires the Header data Header from the data unit indicated by the physical address PPA4, then acquires the storage address of the Key from the Header and acquires the Key4. Compares the Key4 with the Key5 acquired from the command to write data received from the host, finds that the Key4 read from the physical address PPA4 is not equal to the Key5 of the host, it indicates that the host does not wish to update the data indexed by Key5 (because Key5 is not present in NVM), but wishes to write the new data Value5 indexed by Key5. It will be appreciated that if multiple sets of keys/data are stored at physical address PPA4 (or consecutive physical addresses from which PPA4 begins), it is necessary to read each stored Key and compare the read Key with Key5 in the write command provided by the host. If there is no Key stored in the physical address PPA4 (or consecutive physical addresses from which PPA4 starts) that is identical to the Key5 of the write command provided by the host, it indicates that the host wishes to write the new data Value5 indexed by the Key 5; if the same Key as the Key5 of the write command supplied from the host is stored in the physical address PPA4 (or a plurality of physical addresses consecutive from the beginning of PPA 4), it indicates that the host wishes to update the data indexed by the Key5.
With continued reference to fig. 12, the Key read from the physical address PPA4 is Key4, different from the Key5 provided by the host, thereby determining that the host wishes to write the new data Value5 indexed by the Key5. In response, the Key and data are read from the physical address PPA4, the read Key and data are combined (e.g., appended) with the Key5 and data Value5 to be written by the host, and the combined result is written to the data unit indicated by the newly assigned physical address.
For example, NVM assigns a new physical address PPA5 for hash value H4. The NVM then reads the Key Key4 and the data Value4 from the physical addresses PPA4 and PPA4+1 (see FIG. 12). And with reference to fig. 13, the nvm writes the Key4 and the Key Value4 in two consecutive data units (PPA 5 and PPA5+ 1) beginning at the assigned new physical address PPA 5; and writing the Key5 and the data Value5 in a third consecutive data unit (PPA 5+ 2). Optionally, the NVM also records the starting addresses and/or lengths of the Key4, the data Value4, the Key5 and the data Value5 in the Header data Header. And recording the physical address corresponding to the hash value H4 in the FTL table as PPA5 (see fig. 14). It is understood that the hash values of the Key4 and the Key5 are both H4. Still understandably, when the Key4 and the data Value4 are read from the physical addresses PPA4 and PPA4+1 (see fig. 12), if the padding data (Dummy) is included therein, the Dummy data may be deleted and the Key5 and the data Value5 may be added after the data Value4. And if the size of the padding data stored in the physical addresses PPA4 and PPA4+1 can accommodate the Key5 and the data Value5, the Key4 and the Key Value4, and the Key5 and the data Value5 can be written in two consecutive data units (PPA 5 and PPA5+ 1) from the beginning of the assigned new physical address PPA5.
As another example, the host next issues a command to read data to the NVM. The NVM receives a data reading command from the host, where the data reading command indicates an index Key5 corresponding to the target data Value5 to be read. In response to receiving the command to read data, the NVM performs hash operation on the Key5 to obtain a hash value H4. The NVM then finds the physical address PPA5 corresponding to the hash value H4 by querying the FTL table (see fig. 14).
In response to finding the physical address PPA5, the NVM acquires the Header data Header from the data unit indicated by the physical address PPA5, then acquires the storage address of the Key from the Header and acquires the Key4. And comparing the Key4 with the Key5 acquired from the data reading command, finding that the Key4 read from the physical address PPA5 is not equal to the Key5 to be read by the host, indicating that hash collision exists, and continuously acquiring the storage address of the next Key from the Header and acquiring the Key5. Since the acquired Key5 is equal to the Key5 to be read by the host, the data Value5 corresponding to the Key5 is read out and supplied to the host.
Alternatively, in response to that the Key4 read from the physical address PPA5 is not equal to the Key5 to be read by the host, that is, indicating that there is a hash collision, the lengths of the Key4 and the data Value4 are continuously obtained from the Header, and it is determined that the Key4 and the data Value4 occupy 2 data units according to the lengths of the Key4 and the data Value4 (see fig. 13). Next, the storage address of the Key5 is acquired from the third consecutive data unit (PPA 5+ 2) starting from the PPA5 and the Key5 is acquired. Since the acquired Key5 is equal to the Key5 to be read by the host, the data Value5 corresponding to the Key5 is read out and supplied to the host.
In another example, still referring to fig. 11 and 12, the host has written Key4 and Value4 into the NVM, the Key4 is used to index the data Value4, the hash result of Key4 is H4, the hash Value H4 and the physical address PPA4 assigned to the hash Value H4 are recorded in the FTL table. And storing Key4 and Value4 using two data units indicated by physical address PPA4 and consecutive PPA4+ 1.
The host writes data to the NVM. The host issues a command to the NVM to write data. The NVM receives a write data command from the host, in which a write data Value5 and a Key4 for indexing the data Value5 are indicated. In response to receiving the command for writing data, the NVM performs hash operation on the Key4 to obtain a hash value H4. The NVM then looks up the FTL table with the hash value H4 recorded and the physical address PPA4 assigned to the hash value H4 (see fig. 11). This fashion cannot determine whether the host wishes to update the data indexed by Key4 to Value5 or write new data Value5 indexed by Key4.
For the purpose of determining the host, the NVM acquires the Header data Header from the data unit indicated by the physical address PPA4 (see fig. 12), then acquires the storage address of the Key from the Header and acquires the Key4. Compares the Key4 with the Key4 acquired from the command to write data received from the host, finds that the Key4 read out from the physical address PPA4 is equal to the Key4 supplied from the host, it indicates that the host wishes to update the data indexed by Key4 (because Key4 exists in NVM).
In response, the NVM assigns a new physical address PPA51 for the hash value H4. Then, the NVM writes the Key4 and the data Value5 to the physical page (or data frame) indicated by the physical address PPA51 (see fig. 15). And updating the FTL table, and recording the physical address corresponding to the hash value H4 in the FTL table as PPA51 (see fig. 16).
Example six
In the foregoing embodiments, the solid state storage device is capable of supporting keys and/or data of any length. In yet another embodiment according to the present application, the solid-state storage device supports keys and/or data of a limited variety of lengths. For example, there are 2 (512 bytes/4 KB) or 4 (512 bytes/1 KB/4KB/16 KB) data lengths supported. And the keys supported by the solid-state storage device are limited in length, e.g., less than 1KB, or have a limited variety of lengths.
FIG. 17 shows a block diagram of a solid state storage device with multiple namespaces (Name spaces) in accordance with an embodiment of the present invention. The different namespaces (NS 1/NS2/NS3/NS 4) shown in FIG. 17 are used to carry IO commands with keys and/or data of different lengths. In one embodiment according to the present invention, the host sends data of different lengths to the corresponding namespaces through IO commands. For example, the host sends an IO command with a data length of no more than 512 bytes to namespace NS1, an IO command with a data length between 512 bytes and 1KB to namespace NS2, an IO command with a data length between 1KB and 4KB to namespace NS3, and an IO command with a data length between 4KB and 16KB to namespace NS4. Optionally, in one example, the host indicates the command space using a private command. In yet another example, the host describes the namespace in a manner that conforms to NVMe protocol commands.
Optionally, the solid-state storage device further determines a length of data to be accessed according to the indication of the IO command to the namespace. For example, the host indicates namespace NS1, meaning that the data to be accessed is no more than 512 bytes in length; the host indicates a namespace NS2 identifying that the length of data to be accessed is between 512 bytes and 1KB. And the solid-state storage device performs hash operation on the key to obtain a hash value (for example, H6) with a fixed length, which is used as an index of the FTL table.
With continued reference to fig. 17, the data unit size indicated by a physical address in the ftl table is related to the command space to which the logical address corresponding to the physical address belongs. For example, an IO command issued by the host indicates the namespace NS1, if the IO command is a read command, the corresponding physical address is obtained from the FTL table according to the logical address of the IO command, and 512 bytes of data are obtained from the obtained physical address as a response to the IO command. Similarly, if the IO command indicates namespace NS2, 1KB byte of data is retrieved from the physical address retrieved via the FTL table as a response to the IO command.
It is understood that, in the embodiment according to the present invention, the length of the data to be accessed is obtained according to the namespace indicated by the IO command, and the physical address corresponding to the logical address of the IO command is obtained from the FTL table. The order of acquiring the data length and the physical address may be changed, or may be performed simultaneously.
In one embodiment according to the invention, a host writes data to a solid-state storage device. The host issues a command to write data to the solid-state storage device. The solid-state storage device receives a command to write data, in which the data Value6 and the Key6 for indexing the data Value6 are indicated, from the host, and the namespace NS1 is also indicated in the command to write data (see fig. 17).
In response to receiving the command to write data, the solid-state storage device determines from namespace NS1 that data Value6 is not greater than 512 bytes in length. Next, the solid-state storage device hashes the Key6 to obtain a hash value H6, assigns a physical address PPA6 to the hash value H6, and records the hash value H6 and the physical address PPA6 assigned to H6 in the FTL table (see fig. 18). And the solid-state storage device writes the data Value6 to the data unit indicated by the physical address PPA 6. Alternatively, if the length of the data Value6 is less than 512 bytes, the solid-state storage device fills the data unit of the write data Value6 with data to make up for 512 bytes.
In yet another example, the host continues to write data to the solid-state storage device next. The host issues a command to write data to the solid-state storage device. The solid-state storage device receives a command to write data, in which data Value7 and Key7 for indexing the data Value7 are indicated, from the host, and also a namespace NS2 (see fig. 15) is indicated in the command to write data.
In response to receiving the command to write data, the solid-state storage device determines from namespace NS2 that Value7 is not greater than 1 kbyte in length. The solid-state storage device performs hash operation on the Key7 to obtain a hash value H7, assigns a physical address PPA7 to the hash value H7, and records the hash value H7 and the physical address PPA7 assigned to the hash value H7 in the FTL table (see fig. 18). And the solid-state storage device writes the data Value7 to the data unit indicated by the physical address PPA 7. Alternatively, if the length of the data Value7 is less than 1KB, the solid-state storage device fills the data unit for writing Value7 with data to complement 1KB.
Optionally, the storage medium of the solid-state storage device also records the Key6 and the Key7 in association with the physical addresses PPA6 and PPA7, and records the lengths of the data Value6 and the data Value 7.
Those skilled in the art will appreciate that when a hash collision (with respect to a key) occurs, the scheme provided in accordance with embodiment three, embodiment four, and/or embodiment five of the present application may be employed to resolve the hash collision.
In yet another embodiment according to the present invention, the host reads data from the solid state storage device. The host issues a command to the solid-state storage device to read data. The solid-state storage device receives a command to read data from the host, where a Key8 for indexing the Value8 of the target data to be read is indicated in the command to read data, and a namespace NS3 is also indicated in the command to read data (see fig. 17).
In response to receiving a command to read data, the solid-state storage device determines from namespace NS3 that data Value8 is not greater than 4KB in length. Next, the solid-state storage device performs hash operation on the Key8 to obtain a hash value H8, and queries the FTL table (see fig. 18) to obtain a physical address PPA8 corresponding to the hash value H8. The solid-state storage device reads data of a length of 4KB from the data unit indicated by the physical address PPA8 and provides it to the host.
Optionally, the solid-state storage device further obtains the length of Value8 from the data read from the data unit indicated by the physical address PPA8, and provides the Value8 of the specified length to the host.
In yet another example, the host next reads data from the solid-state storage device. The host issues a command to the solid-state storage device to read data. The solid-state storage device receives a command to read data from the host, where a Key9 for indexing the target data Value9 to be read is indicated in the command to read data, and a namespace NS4 is also indicated in the command to read data (see fig. 17).
In response to receiving a command to read data, the solid-state storage device determines from namespace NS4 that data Value9 is not greater than 16KB in length. Next, the solid-state storage device performs a hash operation on the Key9 to obtain a hash value H9, and queries the FTL table to obtain a physical address PPA9 corresponding to the hash value H9 (see fig. 18). The solid-state storage device then accesses the data unit indicated by physical address PPA 9. Since one physical address PPA in the FTL table indicates, for example, a storage space of 4416 bytes at maximum, the solid-state storage device reads 16KB data from a plurality of data units (PPA 9/PPA9+1/PPA9+2/PPA9+ 3) whose physical addresses indicated by the PPA9 are consecutive, and provides the data to the host.
Optionally, the solid-state storage device further obtains the length of the data Value9 from data read from a plurality of data units of which physical addresses indicated by the PPA9 are consecutive, and provides the data Value9 of the specified length to the host.
Optionally, in accordance with another embodiment of the present invention, the host does not indicate a namespace in the IO commands provided to the solid state storage device. While solid state storage identifies namespaces in other ways. For example, the host indicates the length of the data in the IO command, the solid-state storage device processes the IO command with the data length of 0-512 bytes according to the IO command accessing the namespace NS1, and processes the IO command with the data length of 512-1024 bytes according to the IO command accessing the namespace NS 2. As another example, the host indicates the NVMe controller in an IO command provided to the solid-state storage device, and the solid-state storage device obtains the namespace for access according to the corresponding relationship between the NVMe controller and the namespace.
EXAMPLE seven
In embodiment seven according to the present application, the host indicates the key and data in the IO command. Optionally, the host also indicates the length of the data in the IO command.
According to the seventh embodiment of the present application, the solid-state storage device classifies the IO commands according to data length. For example, for IO commands with data length between 0-512 bytes, the solid-state storage device fills the data to make up the length of the data to 512 bytes; for IO commands with data length between 512 bytes and 1K bytes, the solid-state storage device is filled with data to complement the data length to 1K bytes; for IO commands with data length between 1K-4K bytes, the solid-state storage device fills data to complement the data length to 4K bytes; for IO commands with data length between 4K-16K bytes, the solid state storage device fills in data to make up the data length to 16K bytes.
Alternatively, the solid-state storage device may provide a plurality of FTL tables corresponding to each type of data length, such that a mapping relationship of the hash value of the IO command of one type of data length to the physical address PPA is recorded in each FTL table.
For example, in the FTL table shown in fig. 19, each record has a data length of 1K-4 kbytes, and in the FTL table shown in fig. 20, each record has a data length of 4K-16 kbytes. The FTL table shown in fig. 19 and the FTL table shown in fig. 20 are provided in the solid state storage device at the same time.
By way of example, a host writes data to a solid-state storage device. The host sends a write data command to the solid-state storage device, where the write data command indicates a data Value10 and a Key10 for indexing the data Value10, where the length of the data Value10 is 1K-4 kbytes. The solid-state storage device receives a write data command from a host. In response to receiving the write data command, the solid-state storage device hashes the Key10 to obtain a hash value H10, assigns a physical address PPA10 to the H10, and records a mapping relationship between the hash value H10 and the physical address PPA10 in the FTL table 1 (4K) (see fig. 19). And the solid-state storage device writes the data Value10 to the data unit indicated by the physical address PPA 10.
As yet another example, a host reads data to a solid-state storage device. The host sends a data reading command to the solid-state storage device, where the data reading command indicates a Key11 used to index a target data Value11 to be read, and the length of the target data Value11 to be read is 4K-16 kbytes. In response to receiving the data reading command, the solid-state storage device performs hash operation on the Key11 to obtain a hash value H11. And the solid-state storage device finds the hash value H11 and its corresponding physical address PPA11 from the FTL table (16K) (see fig. 20). And the solid-state storage device acquires 16 kbytes of data from the consecutive physical addresses starting from the physical address PPA11 and provides the data to the host. Alternatively, the solid-state storage device obtains the length of the target data Value11 to be read from a plurality of data units of which physical addresses are consecutive starting from the physical address PPA11, and provides the data Value11 of the specified length to the host.
As still another example, the host sends a read data command to the solid-state storage device, where the Key11 for indexing the target data Value11 to be read is indicated in the read data command, but the length of the data Value11 is not prompted. In response to receiving the read data command, the solid-state storage device searches all FTL tables and finds the hash value H11 and its corresponding physical address PPA11 from the FTL table (16K) (see fig. 20). And the solid-state storage device obtains the 16 kbytes of data from the data unit(s) indicated by the physical address PPA11 and provides the data to the host.
Those skilled in the art will appreciate that when a hash collision (with respect to a key) occurs, the scheme provided in accordance with embodiment three, embodiment four, and/or embodiment five of the present application may be employed to resolve the hash collision.
Example nine
According to the ninth embodiment of the invention, the solid-state storage device supporting the KV storage model allows the host to access the solid-state storage device through a Get/Put command.
By way of example, a host reads data from a solid-state storage device. The host sends a "Get" command to the solid-state storage device, and the Key12 for indexing the Value12 of the target data to be read is indicated by a parameter "Key" in the "Get" command. The solid state storage device receives a "Get" command from the host.
In response to receiving the "Get (Key)" command, the solid-state storage device performs hash operation on the Key12 to obtain a hash value H12. Next, the solid-state storage device searches the FTL table according to the hash value H12, and finds the physical address PPA12 corresponding to the hash value H12 from the FTL table. And the solid-state storage device obtains the destination data Value12 from the data unit indicated by the physical address PPA12 and provides the destination data Value to the host. Optionally, the host further specifies a namespace corresponding to the target data Value12 to be read in the sent "Get (Key)" command.
As yet another example, a host writes data to a solid-state storage device. The host sends a "Put" command to the solid-state storage device, where the "Put" command indicates, by using the parameters "Key" and "Value", the data Value13 and the Key13 for indexing the data Value13. The solid-state storage device receives a "Put" command from the host.
In response to receiving the "Put" command, the solid-state storage device performs a hash operation on the Key13 to obtain a hash Value H13, allocates a physical address PPA13 to the hash Value H13, and records a mapping relationship between the hash Value H13 and the physical address PPA13 allocated thereto in the FTL table. And the solid-state storage device writes the data Value13 to the data unit indicated by the physical address PPA 13. Optionally, the host further specifies a namespace corresponding to the data Value13 in the sent "Put" command.
As another example, the host sends a command to the solid-state storage device to carry Get/Put in NVMe protocol, and specifies data to be accessed through PRP (Physical Region Page) entries or SG lists (Scatter Gather List).
In addition, FTL tables according to embodiments of the present invention can be stored in DRAM of a solid state memory device (e.g., see fig. 1, DRAM 110). Wherein the control component 104 accesses the DRAM 110 to maintain the FTL tables. The control section 104 controls execution of the aforementioned flow according to the embodiment of the present application. Optionally, the control unit 104 comprises a CPU, and software is executed in the CPU to manipulate hardware of the control unit 104 to perform the aforementioned flow.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (9)

1. A data access method based on a KV model is characterized by comprising the following steps:
receiving a second key value and second data from the host;
performing hash operation on the second key value to obtain a second hash value;
if a first hash value equal to the second hash value is recorded in the flash memory transfer layer table, acquiring a first physical address corresponding to the first hash value from the flash memory transfer layer table;
assigning a second physical address to the second hash value;
reading a first key value and first data from a first physical address;
comparing the first key value with a second key value in a write command provided by the host, and if the first key value is not equal to the second key value provided by the host and indicates that a hash conflict exists, writing the second key value, the second data, the first key value and the first data into a second data unit of the NVM indicated by the second physical address; if the first key value is equal to a second key value provided by the host, indicating that the host wishes to update the data indexed by the second key value;
updating the second hash value and the second physical address to a flash memory transfer layer table;
the flash memory transfer layer table records a first hash value and a first physical address allocated by the first hash value;
wherein two or more sets of keys having the same hash value are stored with the data.
2. The KV model-based data access method of claim 1, wherein if the second data unit cannot accommodate the first key value and the first data, the second key value and the second data, the first key value and the first data, the second key value and the second data are written in the second data unit and one or more third data units that are consecutive in physical address to the second data unit.
3. The KV model-based data access method of claim 2, wherein the key value is written to a same data unit as the data or to a different data unit.
4. The KV model-based data access method of any of claims 1-3, further comprising:
receiving a third key value from the host;
performing hash operation on the third key value to obtain a third hash value;
retrieving the flash memory transfer layer table;
if a first hash value equal to the third hash value is recorded in the flash memory transfer layer table, acquiring a second physical address corresponding to the first hash value;
acquiring a first key value and a second key value based on the second physical address, and comparing the first key value and the second key value with a third key value received by the host; and
if the second key value is equal to the third key value, second data is obtained; and
the second data is sent to the host.
5. The KV model-based data access method of claim 3, wherein in the same or different data units, the key value and a start address and/or length of the data in the same or different data units are written, respectively.
6. The KV model-based data access method of claim 5, further comprising:
receiving a third key value from the host;
performing hash operation on the third key value to obtain a third hash value;
retrieving the flash memory transfer layer table;
if the first hash value equal to the third hash value is recorded in the flash memory transfer layer table; acquiring a second physical address corresponding to the first hash value;
obtaining a first key value according to the second physical address, if the first key value is not equal to the third key value,
acquiring a second key value according to the second physical address and the lengths of the first key value and the first data, and acquiring second data corresponding to the second key value if the second key value is equal to the third key value; and
the second data is sent to the host.
7. The solid-state storage device based on the KV model is characterized by comprising a data receiving module, a Hash operation module, a retrieval module, a physical address distribution module, a data acquisition module and a data writing module, wherein,
the data receiving module is used for receiving a second key value and second data from the host;
the hash operation module is used for carrying out hash operation on the second key value to obtain a second hash value;
the retrieval module is used for retrieving the flash memory transfer layer table and acquiring a first physical address corresponding to the first hash value from the flash memory transfer layer table;
the physical address allocation module is used for allocating a second physical address for the second hash value;
the data acquisition module is used for reading a first key value and first data from a first physical address;
the data comparison module is used for comparing the first key value with a second key value in a write command provided by a host;
if the first key value is not equal to the second key value provided by the host, which indicates that the hash collision exists, the data writing module is used for writing the second key value, the second data, the first key value and the first data into a second data unit of the NVM indicated by the second physical address; if the first key value is equal to a second key value provided by the host, indicating that the host wishes to update the data indexed by the second key value;
the data updating module is used for updating the second hash value and the second physical address to the flash memory transfer layer table;
the flash memory transfer layer table records a first hash value and a first physical address allocated by the first hash value;
wherein two or more sets of keys having the same hash value are stored with the data.
8. A solid-state storage device comprising a host interface, an NVM chip, a control means for controlling data transmission between the host interface, the NVM chip and a DRAM, wherein the control means performs the KV model-based data access method according to one of claims 1, 2, 3, 5, and 6 by executing a program.
9. A solid-state storage device comprising a host interface, an NVM chip, a control unit, and a DRAM, the control unit being for controlling data transfer between the host interface, the NVM chip, and the DRAM, wherein the control unit is for,
receiving a second key value and second data from the host;
performing hash operation on the second key value to obtain a second hash value;
if a first hash value equal to the second hash value is recorded in the flash memory transfer layer table, acquiring a first physical address corresponding to the first hash value from the flash memory transfer layer table;
assigning a second physical address to the second hash value;
reading a first key value and first data from a first physical address;
comparing the first key value with a second key value in a write command provided by the host, and if the first key value is not equal to the second key value provided by the host and indicates that a hash conflict exists, writing the second key value, the second data, the first key value and the first data into a second data unit of the NVM indicated by the second physical address; if the first key value is equal to a second key value provided by the host, indicating that the host wishes to update the data indexed by the second key value;
updating the second hash value and the second physical address to a flash memory transfer layer table;
the flash memory transfer layer table records a first hash value and a first physical address allocated by the first hash value;
wherein two or more sets of keys having the same hash value are stored with the data.
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