CN108614502A - A method of the high-speed pulse output duty ratio adjust automatically based on CPLD - Google Patents
A method of the high-speed pulse output duty ratio adjust automatically based on CPLD Download PDFInfo
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- CN108614502A CN108614502A CN201810659531.XA CN201810659531A CN108614502A CN 108614502 A CN108614502 A CN 108614502A CN 201810659531 A CN201810659531 A CN 201810659531A CN 108614502 A CN108614502 A CN 108614502A
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- speed pulse
- ebrsram
- pulse output
- blocks
- output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25257—Microcontroller
Abstract
The method for the high-speed pulse output duty ratio adjust automatically based on CPLD that the invention discloses a kind of, required frequency values and dutyfactor value are inputted into MCU, MCU is again by data transfer to high-speed pulse output EBRSRAM blocks, high-speed pulse output EBRSRAM blocks continue data transfer to metal-oxide-semiconductor output module, specified numerical value is pressed for metal-oxide-semiconductor to work, when metal-oxide-semiconductor works, can output services real-time by metal-oxide-semiconductor output module when frequency values and dutyfactor value, and it is transferred to high-speed pulse output feedback EBRSRAM blocks, high-speed pulse output feeds back EBRSRAM blocks, high-speed pulse output feeds back EBRSRAM blocks by data feedback to frequency and duty ratio state machine, it is related to technical field of automation in industry.The method of the high-speed pulse output duty ratio adjust automatically based on CPLD, it can timely interruption of work, and be adjusted in time, it solves the problems, such as the junction capacity due to metal-oxide-semiconductor, the duty ratio of the high-speed pulse output of final output is caused the problem of relatively large deviation occur with preset value.
Description
Technical field
The present invention relates to technical field of automation in industry, specially a kind of high-speed pulse output duty ratio based on CPLD is certainly
The method of dynamic adjustment.
Background technology
PLC（Programmable logic controller (PLC)）It is that kind is electric exclusively for the digital operation applied and designed in industrial settings
Subsystem.It uses a kind of programmable memory, inside it storage execute logical operation, sequential control, timing, counting and
The instruction of the operations such as arithmetical operation controls various types of mechanical equipments or life by digital or analog input and output
Production process.It is widely used in various automation control areas, one of major function of PLC is to realize different frequency and duty ratio
High-speed pulse output.
To realize the high-speed pulse output of PLC, is realized too much using CPLD at present, multiple outputs are set inside CPLD
Pulse frequency and duty cycle register, the duty ratio of the high-speed pulse frequency of output is all to go directly to control according to preset value output
Metal-oxide-semiconductor output processed, due to the junction capacity problem of metal-oxide-semiconductor, causes the duty ratio of the high-speed pulse output of final output with preset value
There is larger deviation, while a large amount of CPLD look-up tables resource can be consumed provided with more register mode, in CPLD
Under resource limited circumstances, this mode has very big defective.
Invention content
（One）The technical issues of solution
In view of the deficiencies of the prior art, the high-speed pulse output duty ratio adjust automatically based on CPLD that the present invention provides a kind of
Method solves the problems, such as the junction capacity due to metal-oxide-semiconductor, and the duty ratio of the high-speed pulse output of final output is caused to go out with preset value
The problem of showing larger deviation, while being provided with more register mode, a large amount of CPLD look-up tables resources can be consumed.
（Two）Technical solution
In order to achieve the above object, the present invention is achieved by the following technical programs：A kind of high-speed pulse output based on CPLD
The method of duty ratio adjust automatically, specifically comprises the following steps：
Step 1: inputting required frequency values and dutyfactor value into MCU, MCU is again by data transfer to high-speed pulse output
EBRSRAM blocks, high-speed pulse output EBRSRAM blocks continue data transfer to metal-oxide-semiconductor output module, so that metal-oxide-semiconductor is by specified
Numerical value works.
Step 2: metal-oxide-semiconductor work when, can output services real-time by metal-oxide-semiconductor output module when frequency values and duty ratio
Value, and high-speed pulse output feedback EBRSRAM blocks are transferred to, high-speed pulse output feeds back EBRSRAM blocks, and high-speed pulse output is anti-
EBRSRAM blocks are presented by data feedback to frequency and duty ratio state machine, with the mark come from the transmission of high-speed pulse output EBRSRAM blocks
Quasi- value is compared, if the numerical value of comparison is different, can be controlled interrupt module and be sent out interrupt signal to MCU, metal-oxide-semiconductor is made to interrupt work
Make, is then adjusted again to metal-oxide-semiconductor output module input standard value.
A method of the high-speed pulse output duty ratio adjust automatically based on CPLD, including metal-oxide-semiconductor output module and
CPLD, the CPLD include that high-speed pulse output EBRSRAM blocks, frequency and duty ratio comparison state machine, high-speed pulse output are anti-
Present EBRSRAM blocks and interrupt module.
Preferably, the high rapid pulse punching output EBRSRAM blocks include output frequency register, duty cycle register.
Preferably, the high rapid pulse punching output feedback EBRSRAM blocks include feedback frequency register, duty cycle register.
Preferably, the high-speed pulse output EBRSRAM blocks and high-speed pulse output feed back each frequency band of EBRSRAM blocks
All include frequency register and duty cycle register.
Preferably, the MCU is PLC microcontrollers, and the high rapid pulse punching output EBRSRAM blocks and the punching output of high rapid pulse are anti-
Feedback EBRSRAM blocks can be divided into frequency from minimum value to maximum value N sections by PLC microcontrollers input value.
（Three）Advantageous effect
The method for the high-speed pulse output duty ratio adjust automatically based on CPLD that the present invention provides a kind of.Have following beneficial to effect
Fruit：
（1）, should high-speed pulse output duty ratio adjust automatically based on CPLD method, it is defeated in real time by metal-oxide-semiconductor output module
Go out the frequency values and dutyfactor value when work, and is transferred to high-speed pulse output feedback EBRSRAM blocks, high-speed pulse output feedback
EBRSRAM blocks, high-speed pulse output feed back EBRSRAM blocks by data feedback to frequency and duty ratio state machine, and from high rapid pulse
The standard value that punching output EBRSRAM blocks transmission comes is compared, if the numerical value of comparison is different, can be controlled during interrupt module sends out
Break signal makes metal-oxide-semiconductor interruption of work to MCU, is then adjusted again to metal-oxide-semiconductor output module input standard value, passes through frequency
The cooperation of rate and duty ratio state machine and interrupt module, can timely interruption of work, and be adjusted, solved due to MOS in time
The junction capacity problem of pipe, causes the duty ratio of the high-speed pulse output of final output the problem of relatively large deviation occur with preset value.
（2）, should high-speed pulse output duty ratio adjust automatically based on CPLD method, high rapid pulse punching output EBRSRAM
Block includes output frequency register, duty cycle register, and high rapid pulse punching output feedback EBRSRAM blocks include feedback frequency deposit
Device, duty cycle register, high-speed pulse output EBRSRAM blocks and high-speed pulse output feed back each frequency band of EBRSRAM blocks
Include frequency register and duty cycle register, EBRSRAM is fed back in high rapid pulse punching output EBRSRAM blocks and the punching output of high rapid pulse
Block can be divided into N sections by the frequency of the microcontroller input value of PLC from minimum value to maximum value, defeated by being rushed in high rapid pulse
Go out to feed back setting frequency register and duty cycle register inside EBRSRAM blocks and high-speed pulse output feedback EBRSRAM blocks
Little module, unified management solve and more register mode is directly arranged can consume a large amount of CPLD look-up tables resource
Problem.
Description of the drawings
Fig. 1 is the structural principle block diagram of present invention part；
Fig. 2 is the whole structural principle block diagram of the present invention.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation describes, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
- 2 are please referred to Fig.1, the embodiment of the present invention provides a kind of technical solution：A kind of high-speed pulse output based on CPLD accounts for
Sky specifically comprises the following steps than the method for adjust automatically：
Step 1: inputting required frequency values and dutyfactor value into MCU, MCU is again by data transfer to high-speed pulse output
EBRSRAM blocks, high-speed pulse output EBRSRAM blocks continue data transfer to metal-oxide-semiconductor output module, so that metal-oxide-semiconductor is by specified
Numerical value works.
Step 2: metal-oxide-semiconductor work when, can output services real-time by metal-oxide-semiconductor output module when frequency values and duty ratio
Value, and high-speed pulse output feedback EBRSRAM blocks are transferred to, high-speed pulse output feeds back EBRSRAM blocks, and high-speed pulse output is anti-
EBRSRAM blocks are presented by data feedback to frequency and duty ratio state machine, with the mark come from the transmission of high-speed pulse output EBRSRAM blocks
Quasi- value is compared, if the numerical value of comparison is different, can be controlled interrupt module and be sent out interrupt signal to MCU, metal-oxide-semiconductor is made to interrupt work
Make, is then adjusted again to metal-oxide-semiconductor output module input standard value.
A method of the high-speed pulse output duty ratio adjust automatically based on CPLD, including metal-oxide-semiconductor output module and
CPLD, the CPLD include that high-speed pulse output EBRSRAM blocks, frequency and duty ratio comparison state machine, high-speed pulse output are anti-
Present EBRSRAM blocks and interrupt module.
Preferably, the high rapid pulse punching output EBRSRAM blocks include output frequency register, duty cycle register.
Preferably, the high rapid pulse punching output feedback EBRSRAM blocks include feedback frequency register, duty cycle register.
Preferably, the high-speed pulse output EBRSRAM blocks and high-speed pulse output feed back each frequency band of EBRSRAM blocks
All include frequency register and duty cycle register.
Preferably, the MCU is PLC microcontrollers, and the high rapid pulse punching output EBRSRAM blocks and the punching output of high rapid pulse are anti-
Feedback EBRSRAM blocks can be divided into frequency from minimum value to maximum value N sections by PLC microcontrollers input value.
It should be noted that herein, relational terms such as first and second and the like are used merely to a reality
Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation
In any actual relationship or order or sequence.Moreover, the terms "include", "comprise" or its any other variant are intended to
Non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those
Element, but also include other elements that are not explicitly listed, or further include for this process, method, article or equipment
Intrinsic element.
It although an embodiment of the present invention has been shown and described, for the ordinary skill in the art, can be with
Understanding without departing from the principles and spirit of the present invention can carry out these embodiments a variety of variations, modification, replace
And modification, the scope of the present invention is defined by the appended.
Claims (6)
1. a kind of method of the high-speed pulse output duty ratio adjust automatically based on CPLD, which is characterized in that specifically include as follows
Step：
Step 1: inputting required frequency values and dutyfactor value into MCU, MCU is again by data transfer to high-speed pulse output
EBRSRAM blocks, high-speed pulse output EBRSRAM blocks continue data transfer to metal-oxide-semiconductor output module, so that metal-oxide-semiconductor is by specified
Numerical value works;
Step 2: metal-oxide-semiconductor work when, can output services real-time by metal-oxide-semiconductor output module when frequency values and dutyfactor value, and
High-speed pulse output feedback EBRSRAM blocks are transferred to, high-speed pulse output feeds back EBRSRAM blocks, high-speed pulse output feedback
EBRSRAM blocks are by data feedback to frequency and duty ratio state machine, with the standard come from the transmission of high-speed pulse output EBRSRAM blocks
Value is compared, if the numerical value of comparison is different, can be controlled interrupt module and be sent out interrupt signal to MCU, metal-oxide-semiconductor is made to interrupt work
Make, is then adjusted again to metal-oxide-semiconductor output module input standard value.
2. a kind of method of high-speed pulse output duty ratio adjust automatically based on CPLD according to claim 1, including
Metal-oxide-semiconductor output module and CPLD, it is characterised in that：The CPLD includes high-speed pulse output EBRSRAM blocks, frequency and duty ratio
Comparison state machine, high-speed pulse output feedback EBRSRAM blocks and interrupt module.
3. a kind of method of high-speed pulse output duty ratio adjust automatically based on CPLD according to claim 1, special
Sign is：The high rapid pulse punching output EBRSRAM blocks include output frequency register, duty cycle register.
4. a kind of method of high-speed pulse output duty ratio adjust automatically based on CPLD according to claim 1, special
Sign is：The high rapid pulse punching output feedback EBRSRAM blocks include feedback frequency register, duty cycle register.
5. a kind of method of high-speed pulse output duty ratio adjust automatically based on CPLD according to claim 1, special
Sign is：The high-speed pulse output EBRSRAM blocks and the high-speed pulse output feedback each frequency band of EBRSRAM blocks include
Frequency register and duty cycle register.
6. a kind of method of high-speed pulse output duty ratio adjust automatically based on CPLD according to claim 1, special
Sign is：The MCU is the microcontroller of PLC, the high rapid pulse punching output EBRSRAM blocks and high rapid pulse punching output feedback
EBRSRAM blocks can be divided into N sections by the frequency of the microcontroller input value of PLC from minimum value to maximum value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810659531.XA CN108614502A (en) | 2018-06-25 | 2018-06-25 | A method of the high-speed pulse output duty ratio adjust automatically based on CPLD |
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| CN201810659531.XA CN108614502A (en) | 2018-06-25 | 2018-06-25 | A method of the high-speed pulse output duty ratio adjust automatically based on CPLD |
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| CN108614502A true CN108614502A (en) | 2018-10-02 |
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| CN201810659531.XA Pending CN108614502A (en) | 2018-06-25 | 2018-06-25 | A method of the high-speed pulse output duty ratio adjust automatically based on CPLD |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104731153A (en) * | 2015-01-27 | 2015-06-24 | 北京利德曼生化股份有限公司 | Closed-loop regulation drive circuit for high-power semiconductor chilling plate |
| CN106526503A (en) * | 2016-12-23 | 2017-03-22 | 北京九方宏信交通装备有限公司 | Inverter power supply main control board fault detection device in rail transit and detection method thereof |
| CN108459554A (en) * | 2018-03-21 | 2018-08-28 | 桂林市华茂欧特科技有限公司 | A method of the high-speed pulse output duty ratio adjust automatically based on CPLD |
-
2018
- 2018-06-25 CN CN201810659531.XA patent/CN108614502A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104731153A (en) * | 2015-01-27 | 2015-06-24 | 北京利德曼生化股份有限公司 | Closed-loop regulation drive circuit for high-power semiconductor chilling plate |
| CN106526503A (en) * | 2016-12-23 | 2017-03-22 | 北京九方宏信交通装备有限公司 | Inverter power supply main control board fault detection device in rail transit and detection method thereof |
| CN108459554A (en) * | 2018-03-21 | 2018-08-28 | 桂林市华茂欧特科技有限公司 | A method of the high-speed pulse output duty ratio adjust automatically based on CPLD |
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Application publication date: 20181002 |
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