CN108595183B

CN108595183B - code splicing and debugging method and device, computer readable storage medium and terminal

Info

Publication number: CN108595183B
Application number: CN201810356542.0A
Authority: CN
Inventors: 赖锦锋
Original assignee: Beijing Microlive Vision Technology Co Ltd
Current assignee: Beijing Microlive Vision Technology Co Ltd
Priority date: 2018-04-19
Filing date: 2018-04-19
Publication date: 2019-12-06
Anticipated expiration: 2038-04-19
Also published as: CN108595183A

Abstract

the invention discloses a code splicing method, a code debugging method, a code splicing device, a code debugging device, a code splicing hardware device, a code debugging hardware device, a computer readable storage medium, a code splicing terminal and a code debugging terminal. The code splicing method mainly comprises the following steps: acquiring a plurality of codes to be spliced; obtaining a common variable among a plurality of codes to be spliced; combining codes except for common variables among a plurality of codes to be spliced to obtain a combined result; and splicing the common variables and the merging results among the multiple codes to be spliced according to a first preset rule. By the embodiment, the technical problem of low debugging efficiency of the graphics processor caused by separately defining the vertex, the fragment shader and the like in the prior art is solved, code redundancy is eliminated, errors caused by code handwriting and code copying and jumping times among multiple codes can be avoided, and the code maintenance cost and the code reading difficulty are reduced.

Description

code splicing and debugging method and device, computer readable storage medium and terminal

Technical Field

the present invention relates to the field of computer technologies, and in particular, to a method and an apparatus for splicing and debugging codes, a computer-readable storage medium, and a terminal.

Background

currently, before debugging code applied to a graphics processor using a graphics rendering library, vertex, fragment shader (also called fragment shader), and other code are generally defined separately.

In a specific application, there are usually differences in definition styles of codes defining vertices, fragment shaders, etc., and such differences may cause a problem of mismatch between the vertices, the fragment shaders, etc., which may further cause situations such as compilation errors, link failures, etc. in a subsequent processing process (e.g., a debugging process), and finally cause a very low debugging efficiency of the graphics processor.

therefore, the prior art has the defect of low debugging efficiency of the graphics processor due to the fact that the vertex, the fragment shader and the like are separately defined.

Disclosure of Invention

the invention provides a code splicing method to solve the technical problem of improving the debugging efficiency of a graphic processor. In addition, a code debugging method, a code splicing device, a code debugging device, a code splicing hardware device, a code debugging hardware device, a computer readable storage medium, a code splicing terminal and a code debugging terminal are also provided.

In order to achieve the above object, according to a first aspect of the present invention, the following technical solutions are provided:

A method of code splicing, comprising:

Acquiring a plurality of codes to be spliced;

obtaining a common variable among the multiple codes to be spliced;

combining codes except for the common variable among the multiple codes to be spliced to obtain a combined result;

and splicing the common variables among the multiple codes to be spliced and the merging result according to a first preset rule.

Preferably, after the step of obtaining a plurality of codes to be spliced, the method further comprises:

and compiling each code to be spliced respectively.

preferably, after the step of compiling the codes to be spliced respectively, the method further includes:

and formatting each compiled code to be spliced according to a second preset rule.

Preferably, the step of merging codes except for the common variable among the multiple codes to be spliced to obtain a merged result includes:

identifying character strings which accord with a first preset character format in the multiple codes to be spliced;

Respectively matching character strings which accord with the first preset character format in the multiple codes to be spliced with preset character strings;

and determining a combined result based on the matching result.

preferably, the step of determining a merged result based on the matching result includes:

if the matching is successful, the following steps are executed:

extracting variable character strings in the multiple codes to be spliced; the variable character string is a character string which is positioned behind the character string conforming to the first preset character format in the plurality of codes to be spliced;

Carrying out duplication removal processing on the variable character strings in the multiple codes to be spliced;

determining the result after the duplication removal as a first combination result;

If the matching fails, the following steps are executed:

extracting character strings which accord with a second preset character format and character strings behind the character strings from the multiple codes to be spliced;

According to a third preset rule, determining the character string which is extracted from the multiple codes to be spliced and accords with a second preset character format and the character strings behind the character string as a second merging result;

And determining the first combination result and the second combination result as combination results based on the execution results of successful matching and failed matching.

Preferably, the step of identifying the character string in the plurality of codes to be spliced, which conforms to the first predetermined character format, specifically includes:

Detecting whether any character string in the multiple codes to be spliced is ended by a space character and/or ended by a carriage return character;

If yes, determining any character string as the character string conforming to the first preset format.

In order to achieve the above object, according to a second aspect of the present invention, the following technical solutions are further provided:

A method of code debugging, comprising:

acquiring a splicing code obtained by the code splicing method according to the first aspect of the present invention;

Acquiring an auxiliary debugging code;

Combining the splicing code and the auxiliary debugging code according to a fourth preset rule;

the combined code is executed.

In order to achieve the above object, according to a third aspect of the present invention, the following technical solutions are further provided:

a code splicing apparatus comprising:

the first acquisition module is used for acquiring a plurality of codes to be spliced;

the second acquisition module is used for acquiring a common variable among the multiple codes to be spliced;

the merging module is used for merging codes except for the common variable among the multiple codes to be spliced to obtain a merging result;

And the splicing module is used for splicing the common variables among the multiple codes to be spliced and the merging result according to a first preset rule.

preferably, the apparatus further comprises:

and the compiling module is used for compiling the codes to be spliced respectively.

Preferably, the apparatus further comprises:

And the formatting module is used for formatting each compiled code to be spliced according to a second preset rule.

preferably, the merging module specifically includes:

The identification unit is used for identifying character strings which accord with a first preset character format in the plurality of codes to be spliced;

The matching unit is used for respectively matching the character strings which accord with the first preset character format in the plurality of codes to be spliced with preset character strings;

And the determining unit is used for determining a merging result based on the matching result.

preferably, the determining unit specifically includes a first determining subunit, a second determining subunit, and a merging subunit; wherein:

The first determining subunit, if the matching is successful, is configured to:

Determining the result after the duplication removal as a first combination result; and the number of the first and second groups,

The second determining subunit, in case of a failure to match, is configured to:

The merging subunit is configured to determine, as a merging result, the first merging result and the second merging result based on the execution results of the matching success and the matching failure.

Preferably, the identification unit specifically includes:

the detection subunit is used for detecting whether any character string in the multiple codes to be spliced ends with a space character and/or ends with a carriage return character;

And the determining subunit is used for determining any character string as the character string conforming to the first predetermined format if the detection result is yes.

In order to achieve the above object, according to a fourth aspect of the present invention, the following technical solutions are further provided:

a code debugging apparatus comprising:

A third obtaining module, configured to obtain the splicing code obtained by the apparatus according to the third aspect of the present invention;

The fourth acquisition module is used for acquiring the auxiliary debugging code;

The combination module is used for combining the splicing code and the auxiliary debugging code according to a fourth preset rule;

and the execution module is used for executing the combined code.

in order to achieve the above object, according to a fifth aspect of the present invention, the following technical solutions are further provided:

A code stitching hardware device, comprising:

A memory for storing non-transitory computer readable instructions; and

a processor for executing the computer readable instructions, so that the processor when executing implements the code splicing method according to the first aspect of the present invention.

in order to achieve the above object, according to a sixth aspect of the present invention, the following technical solutions are further provided:

a code debugging hardware apparatus, comprising:

a memory for storing non-transitory computer readable instructions; and

a processor for executing the computer readable instructions, so that the processor implements the code debugging method according to the second aspect of the present invention when executing the computer readable instructions.

In order to achieve the above object, according to a seventh aspect of the present invention, the following technical solutions are further provided:

a computer readable storage medium storing non-transitory computer readable instructions which, when executed by a computer, cause the computer to perform a code splicing method according to the first aspect of the invention.

In order to achieve the above object, according to an eighth aspect of the present invention, the following technical solutions are further provided:

a computer readable storage medium storing non-transitory computer readable instructions which, when executed by a computer, cause the computer to perform a code debugging method according to the second aspect of the present invention.

In order to achieve the above object, according to a ninth aspect of the present invention, the following technical solutions are further provided:

A code splicing terminal comprises a code splicing device according to the third aspect of the present invention.

in order to achieve the above object, according to a tenth aspect of the present invention, the following technical solutions are further provided:

A code debugging terminal comprises a code debugging device according to the fourth aspect of the present invention.

the embodiment of the invention provides a code splicing method, a code debugging method, a code splicing device, a code debugging device, a code splicing hardware device, a code debugging hardware device, a computer readable storage medium, a code splicing terminal and a code debugging terminal. The code splicing method mainly comprises the following steps: acquiring a plurality of codes to be spliced; obtaining a common variable among a plurality of codes to be spliced; combining codes except for common variables among a plurality of codes to be spliced to obtain a combined result; and splicing the common variables and the merging results among the multiple codes to be spliced according to a first preset rule.

by adopting the technical scheme, the multiple codes to be spliced are spliced together according to the preset rules to form one code, so that all functions of the multiple codes to be spliced can be realized, the situations of compiling errors, link failures and the like caused by factors such as style difference among the multiple codes to be spliced are avoided, the defect of error hidden danger caused by separately defining vertexes, fragment shaders and the like applied to codes of the graphic processor in the prior art is overcome, code redundancy is eliminated, errors easily caused by handwriting codes and copying codes can be avoided, the jumping times among the multiple codes are avoided, the technical problem of low debugging efficiency of the graphic processor caused by separately defining vertexes, fragment shaders and the like in the prior art is solved, and the code maintenance cost and the code reading difficulty are reduced.

The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented in accordance with the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more clearly understandable, the following preferred embodiments are described in detail with reference to the accompanying drawings.

drawings

FIG. 1 is a flow diagram illustrating a code splicing method according to an embodiment of the present invention;

FIG. 2 is a flowchart illustrating merging of codes other than variables common among multiple pieces of code to be spliced according to an embodiment of the present invention;

FIG. 3 is a flowchart illustrating a code debugging method according to an embodiment of the present invention;

FIG. 4 is a schematic structural diagram of a code splicing apparatus according to an embodiment of the present invention;

FIG. 5 is a block diagram of a merge module according to an embodiment of the invention;

FIG. 6 is a diagram illustrating a code debugging apparatus according to an embodiment of the present invention;

FIG. 7 is a schematic structural diagram of a code splicing hardware device according to an embodiment of the present invention;

FIG. 8 is a diagram illustrating the structure of a code debugging hardware device according to an embodiment of the present invention;

FIG. 9 is a schematic structural diagram of a computer-readable storage medium according to one embodiment of the present invention;

FIG. 10 is a schematic structural diagram of a computer-readable storage medium according to another embodiment of the present invention;

Fig. 11 is a schematic structural diagram of a code splicing terminal according to an embodiment of the present invention;

fig. 12 is a schematic structural diagram of a code debugging terminal according to an embodiment of the present invention.

Detailed Description

The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

it is noted that various aspects of the embodiments are described below within the scope of the appended claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the disclosure, one skilled in the art should appreciate that one aspect described herein may be implemented independently of any other aspects and that two or more of these aspects may be combined in various ways. For example, an apparatus may be implemented and/or a method practiced using any number of the aspects set forth herein. Additionally, such an apparatus may be implemented and/or such a method may be practiced using other structure and/or functionality in addition to one or more of the aspects set forth herein.

it should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than the number, shape and size of the components in practical implementation, and the type, quantity and proportion of the components in practical implementation can be changed freely, and the layout of the components can be more complicated.

in addition, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the aspects may be practiced without these specific details.

In order to solve the technical problem that the debugging efficiency of a graphics processor is low due to the fact that a vertex, a fragment shader and the like are separately defined in the prior art, the embodiment of the invention provides a code splicing method. Fig. 1 exemplarily shows a flow diagram of a code splicing method. As shown in fig. 1, the code splicing method mainly includes steps S11 to S14. Wherein:

Step S11: and acquiring a plurality of codes to be spliced.

The multiple pieces of code to be spliced may be, for example, vertex shader source code, fragment (or fragment) shader source code, geometry shader source code, or the like, but the present invention is by no means limited thereto.

Step S12: and acquiring a common variable among the multiple codes to be spliced.

the common variables among the multiple pieces of codes to be spliced include but are not limited to common input variables, common output variables and the like among the multiple pieces of codes to be spliced.

Step S13: and combining codes except the common variable among the multiple codes to be spliced to obtain a combined result.

step S14: and splicing the common variables among the multiple codes to be spliced and the merging result according to a first preset rule.

the first predetermined rule may be, for example, a shader rule or other syntax rule that can be applied to the graphics processor.

In an optional embodiment, after step S11, the code splicing method may further include:

and compiling each code to be spliced respectively.

in this embodiment, by compiling a plurality of codes to be spliced, it can be ensured that each code to be spliced is an effective code executable by the graphics processor.

In an optional embodiment, on the basis of the foregoing embodiment, after the compiling step, the code splicing method may further include:

The second predetermined rule may be determined in consideration of factors that are prone to errors due to handwritten codes, copy codes, and the like.

in practical applications, the formatting may specifically include: deleting spaces, adding separators, etc., according to a predetermined syntax rule (e.g., a shader syntax rule).

in this embodiment, the compiled multiple codes to be spliced are formatted respectively according to the second predetermined rule, so that situations such as compiling errors caused by format differences among the codes to be spliced can be avoided.

In an optional embodiment, step S13 may specifically include:

step S1301: identifying character strings which accord with a first preset character format in a plurality of codes to be spliced;

Step S1302: respectively matching character strings which accord with a first preset character format in a plurality of codes to be spliced with preset character strings;

step S1303: and determining a combined result based on the matching result.

in an alternative embodiment, based on the above embodiment, step S1303 may further include step Sa1 to step Sa 3. Wherein:

Step Sa 1: if the matching is successful, the following steps are executed:

Step Sa 11: extracting variable character strings in the multiple codes to be spliced; the variable character string is a character string which is positioned behind the character string conforming to the first preset character format in the plurality of codes to be spliced;

Step Sa 12: carrying out duplication removal processing on the variable character strings in the multiple codes to be spliced;

step Sa 13: determining the result after the duplication removal as a first combination result; step Sa 2: if the matching fails, the following steps are executed:

step Sa 21: extracting character strings which accord with a second preset character format and character strings behind the character strings from the multiple codes to be spliced;

Step Sa 22: according to a third preset rule, determining the character string which is extracted from the multiple codes to be spliced and accords with a second preset character format and the character strings behind the character string as a second merging result;

step Sa 3: and determining the first combination result and the second combination result as combination results based on the execution results of successful matching and failed matching.

In the following, step S13 is described in detail in a preferred embodiment, and as shown in fig. 2, step S13 may mainly include: step S1304 to step S1311. Wherein:

Step S1304: and identifying character strings which accord with a first preset character format in the plurality of codes to be spliced.

specifically, a character string conforming to the first predetermined character format may be determined by:

step Sb 1: detecting whether any character string in the plurality of codes to be spliced is ended by a space character and/or ended by a carriage return character; if yes, go to step Sb 2; otherwise, go to step Sb 3;

step Sb 2: determining any character string as a character string conforming to a first predetermined format;

Step Sb 3: determining that the any one of the character strings is not a character string conforming to the first predetermined format.

step S1305: respectively matching character strings which accord with the first preset character format in the plurality of codes to be spliced with preset character strings; if the matching is successful, executing step S1306; otherwise, step S1307 is executed.

wherein the predetermined character string may be a keyword or the like. For example, the predetermined string is a keyword string such as unifonm, varying, or the like, used to transfer data from the vertex application to the fragment application.

In this step, matching between the character string conforming to the predetermined character format and the predetermined character string can be realized by scanning the plurality of codes to be spliced line by line and column by column.

step 1306: extracting variable character strings in the multiple codes to be spliced; the variable character string is a character string behind the character string conforming to the first preset character format in the plurality of codes to be spliced.

Step S1307: and carrying out duplicate removal processing on the variable character strings in the multiple codes to be spliced.

The deduplication processing refers to removing variable character strings with the same name.

Step S1308: and determining the result after the duplication removal as a first combination result.

Step S1309: a character string conforming to the second predetermined character format and character strings thereafter are extracted from the plurality of codes to be spliced, and step S1310 is performed.

The character string conforming to the second predetermined character format may be, for example, a character string such as attribute.

Step 1310: and according to a third preset rule, determining the character string which is extracted from the multiple codes to be spliced and accords with a second preset character format and the character strings behind the character string as a second merging result.

Wherein the third predetermined rule may be for indicating: and (4) the character string extracted from the plurality of codes to be spliced and the position rule of the character string after the character string in the codes to be debugged. For example, a character string defining a vertex may be arranged first, and then a character string defining a fragment may be arranged, so that the character strings defining a vertex and the character strings defining a fragment may be arranged in a piece of code.

In the step, a second merging result is obtained by using a third preset rule, so that the positions of the extracted character strings in the codes to be spliced can be changed.

Step S111: and determining the first combination result and the second combination result as combination results.

in this embodiment, by adopting steps S1309 to S1311, frequent jumps of method steps in the execution process of the code splicing method can be avoided.

therefore, the technical scheme provided by the embodiment accords with the hardware pipeline arrangement of the graphics processor, improves the debugging efficiency of spliced codes, improves the code reading efficiency and further improves the debugging efficiency of the graphics processor.

in order to solve the technical problem of low debugging efficiency of the graphics processor caused by separately defining the vertex, the fragment shader and the like in the prior art, on the basis of the code splicing method embodiment, the embodiment of the invention also provides a code debugging method. Fig. 3 exemplarily shows a flow diagram of a code debugging method. The method is applied to a graphics processor, and as shown in fig. 3, the method mainly includes:

step S21, acquiring a splicing code;

Step S22: acquiring an auxiliary debugging code;

step S23: combining the splicing code and the auxiliary debugging code according to a fourth preset rule;

step S24: the combined code is executed.

the splicing code can be obtained by the code splicing method embodiment.

because the code applied to the graphic processor can not display what the variable defined in the code is when debugging; thus, the present embodiment enables debugging of code by assisting debugging code (e.g., code for assigning values to defined variables).

according to the embodiment, the obtained splicing code and the auxiliary debugging code are combined together according to the preset rule, so that not only can all functions of a plurality of codes to be spliced be realized, but also the conditions of compiling errors, link failures and the like caused by factors such as style differences among the plurality of codes to be spliced are avoided, and the technical effect of improving the debugging efficiency of the graphic processor is realized.

in the above, although the steps in the code splicing method embodiment and the code debugging embodiment are described in the above sequence, it should be clear to those skilled in the art that the steps in the embodiment of the present invention are not necessarily performed in the above sequence, and may also be performed in other sequences such as reverse, parallel, and cross, and further, on the basis of the above steps, those skilled in the art may also add other steps, and these obvious modifications or equivalent alternatives should also be included in the protection scope of the present invention, and are not described herein again.

For convenience of description, only the relevant parts of the embodiments of the present invention are shown, and details of the specific technology are not disclosed, please refer to the embodiments of the present invention.

in order to solve the technical problem that the debugging efficiency of a graphics processor is low due to the fact that a vertex, a fragment shader and the like are separately defined in the prior art, the embodiment of the invention provides a code splicing device. Fig. 4 exemplarily shows a structural diagram of the code splicing apparatus. As shown in fig. 4, the apparatus mainly includes: a first acquisition module 41, a second acquisition module 42, a merging module 43 and a stitching module 44. The first obtaining module 41 is configured to obtain multiple codes to be spliced. The second obtaining module 42 is configured to obtain a variable common among the multiple pieces of code to be spliced. The merging module 43 is configured to merge codes except for the common variable among the multiple codes to be spliced, so as to obtain a merged result. The splicing module 44 is configured to splice common variables and merging results among the multiple codes to be spliced according to a first predetermined rule.

In this embodiment, the multiple pieces of code to be spliced may be vertex shader source code, fragment (or fragment) shader source code, geometric shader source code, or the like, for example, but the present invention is by no means limited thereto.

the common variables among the multiple pieces of codes to be spliced include, but are not limited to, common input variables, common output variables and the like among the multiple pieces of codes to be spliced.

By adopting the above technical solution, the first obtaining module 41 and the second obtaining module 42 are utilized to obtain multiple codes to be spliced and common variables thereof; then, the merging module 43 and the splicing module 44 splice together the multiple codes to be spliced together according to the predetermined rule to form one code, thereby realizing all functions of the multiple codes to be spliced, avoiding the situations of compiling errors, link failures and the like caused by factors such as style differences among the multiple codes to be spliced, overcoming the defect of error hidden danger caused by separately defining vertexes, fragment shaders and the like applied to the codes of the graphic processor in the prior art, eliminating code redundancy, avoiding errors easily caused by handwriting codes and copying codes, avoiding the jumping times among the multiple codes, solving the technical problem of low debugging efficiency of the graphic processor caused by separately defining vertexes, fragment shaders and the like in the prior art, and reducing code maintenance cost and code reading difficulty.

In an optional embodiment, the code splicing apparatus further includes:

In the embodiment, the compiling module compiles the plurality of codes to be spliced, so that each code to be spliced is an effective code which can be executed by the graphics processor.

in an optional embodiment, the code splicing apparatus further includes:

in this embodiment, the formatting module is used to format the compiled multiple codes to be spliced respectively according to the second predetermined rule, so as to avoid situations such as compiling errors caused by format differences among the codes to be spliced.

in an alternative embodiment, as shown in fig. 5, the merging module 43 specifically includes: an identification unit 431, a matching unit 432 and a determination unit 433. The identifying unit 431 is configured to identify a character string in accordance with a first predetermined character format in the plurality of codes to be spliced. The matching unit 432 is configured to match a character string in accordance with a first predetermined character format in the plurality of codes to be spliced with a predetermined character string. The determining unit 433 is configured to determine a merging result based on the matching result.

in an optional embodiment, the determining unit 433 specifically includes a first determining subunit, a second determining subunit, and a merging subunit; wherein the first determining subunit, if the matching is successful, is configured to: extracting variable character strings in a plurality of codes to be spliced; the variable character string is a character string which is positioned behind a character string conforming to a first preset character format in the plurality of codes to be spliced; carrying out duplication removal processing on variable character strings in a plurality of codes to be spliced; and determining the result after the duplication removal as a first combination result. The second determining subunit, in case of a failure to match, is configured to: extracting character strings which accord with a second preset character format and character strings behind the character strings from the plurality of codes to be spliced; and according to a third preset rule, determining the character strings which are extracted from the multiple codes to be spliced and conform to a second preset character format and the character strings behind the character strings as a second merging result. The merging subunit is configured to determine, as a merging result, the first merging result and the second merging result based on the execution results of the matching success and the matching failure.

In the present embodiment, the predetermined character string may be a keyword or the like. For example, the predetermined string is a keyword string such as unifonm, varying, or the like, used to transfer data from the vertex application to the fragment application. The character string conforming to the second predetermined character format may be, for example, a character string such as an attribute. The third predetermined rule may be for indicating: and (4) the character string extracted from the plurality of codes to be spliced and the position rule of the character string after the character string in the codes to be debugged. For example, a character string defining a vertex may be arranged first, and then a character string defining a fragment may be arranged, so that the character strings defining a vertex and the character strings defining a fragment may be arranged in a piece of code.

In an optional embodiment, the identifying unit 431 specifically includes:

the detection subunit is used for detecting whether any character string in the plurality of codes to be spliced ends with a space character and/or ends with a carriage return character;

and the determining subunit is used for determining any character string as a character string conforming to the first predetermined format under the condition that the detection result is yes.

Therefore, in the technical scheme provided by this embodiment, the codes are merged by the identifying unit 431, the matching unit 432 and the determining unit 433, which conforms to the hardware pipeline arrangement of the graphics processor, so that the debugging efficiency of the spliced codes is improved, the code reading efficiency is also improved, and the debugging efficiency of the graphics processor is further improved.

in order to solve the technical problem of low debugging efficiency of the graphics processor caused by separately defining the vertex, the fragment shader and the like in the prior art, on the basis of the code splicing device embodiment, the embodiment of the invention also provides a code debugging device. Fig. 6 exemplarily shows a structural diagram of the code debugging apparatus. As shown in fig. 6, the code debugging apparatus mainly includes: a third acquisition module 61, a fourth acquisition module 62, a combination module 63 and an execution module 64. The third obtaining module 61 is configured to obtain the splicing code obtained by the code splicing apparatus. The fourth obtaining module 62 is used for obtaining the auxiliary debugging code. The combining module 63 is configured to combine the splicing code with the auxiliary debugging code according to a fourth predetermined rule. The execution module 64 is used to execute the combined code.

because the code applied to the graphic processor can not display what the variable defined in the code is when debugging; therefore, the present embodiment obtains auxiliary debugging code (e.g., code for giving values of defined variables) by means of the fourth obtaining module 62 to implement debugging of the code.

in this embodiment, the obtained splicing code is combined with the auxiliary debugging code according to the predetermined rule through the third obtaining module 61, the fourth obtaining module 62, the combining module 63 and the executing module 64, so that not only can all functions of multiple codes to be spliced be realized, but also compiling errors, link failures and other conditions caused by factors such as style differences among multiple codes to be spliced are avoided, and the technical effect of improving the debugging efficiency of the graphics processor is realized.

fig. 7 is a hardware block diagram illustrating a code splicing hardware apparatus according to an embodiment of the present disclosure. As shown in fig. 7, a code stitching hardware arrangement 70 according to an embodiment of the present disclosure includes a memory 71 and a processor 72.

the memory 71 is used to store non-transitory computer readable instructions. In particular, memory 71 may include one or more computer program products that may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory. The volatile memory may include, for example, Random Access Memory (RAM), cache memory (cache), and/or the like. The non-volatile memory may include, for example, Read Only Memory (ROM), hard disk, flash memory, etc.

The processor 72 may be a Central Processing Unit (CPU) or other form of processing unit having data processing capabilities and/or instruction execution capabilities, and may control other components in the code stitching hardware device 70 to perform desired functions. In one embodiment of the present disclosure, the processor 72 is configured to execute the computer readable instructions stored in the memory 71, so that the code splicing hardware device 70 performs all or part of the aforementioned steps of the code splicing method according to the embodiments of the present disclosure.

Those skilled in the art should understand that, in order to solve the technical problem of how to obtain a good user experience, the present embodiment may also include well-known structures such as a communication bus, an interface, and the like, and these well-known structures should also be included in the protection scope of the present invention.

For the detailed description of the present embodiment, reference may be made to the corresponding descriptions in the foregoing embodiments, which are not repeated herein.

by adopting the above technical solution, when the processor 72 executes the non-transitory computer readable instructions stored in the memory 71, multiple codes to be spliced are spliced together according to the predetermined rule to form one code, so as to realize all functions of the multiple codes to be spliced, avoid situations of compiling errors, link failures, and the like caused by factors such as style differences among the multiple codes to be spliced, overcome the defect of error hidden danger caused by separately defining codes applied to the graphics processor such as a vertex and a fragment shader in the prior art, eliminate code redundancy, avoid errors easily caused by handwriting codes and copying codes, avoid jump times among the multiple codes, and solve the technical problem of low debugging efficiency of the graphics processor caused by separately defining the vertex and the fragment shader in the prior art, and the code maintenance cost and the code reading difficulty are also reduced.

Fig. 8 is a hardware block diagram illustrating a code debugging hardware apparatus according to an embodiment of the present disclosure. As shown in fig. 8, a code debugging hardware apparatus 80 according to an embodiment of the present disclosure includes a memory 81 and a processor 82.

The memory 81 is used to store non-transitory computer readable instructions. In particular, memory 81 may include one or more computer program products that may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory. The volatile memory may include, for example, Random Access Memory (RAM), cache memory (cache), and/or the like. The non-volatile memory may include, for example, Read Only Memory (ROM), hard disk, flash memory, etc.

the processor 82 may be a Central Processing Unit (CPU) or other form of processing unit having data processing capabilities and/or instruction execution capabilities, and may control other components in the code debugging hardware device 80 to perform desired functions. In one embodiment of the present disclosure, the processor 82 is configured to execute the computer readable instructions stored in the memory 81, so that the code debugging hardware device 80 performs all or part of the steps of the code debugging method of the embodiments of the present disclosure.

in this embodiment, when the processor 82 executes the non-transitory computer readable instructions stored in the memory 81, the obtained splicing code and the auxiliary debugging code are combined together according to the predetermined rule, so that not only can all functions of multiple pieces of codes to be spliced be realized, but also the situations of compiling errors, link failures and the like caused by factors such as style differences among the multiple pieces of codes to be spliced are avoided, and the technical effect of improving the debugging efficiency of the graphics processor is realized.

Fig. 9 is a schematic diagram illustrating a computer-readable storage medium according to an embodiment of the present disclosure. As shown in fig. 9, a computer-readable storage medium 90 according to an embodiment of the disclosure has non-transitory computer-readable instructions 91 stored thereon. The non-transitory computer readable instructions 91, when executed by a processor, perform all or a portion of the steps of the code stitching method of the embodiments of the present disclosure as previously described.

the computer-readable storage medium 91 includes, but is not limited to: optical storage media (e.g., CD-ROMs and DVDs), magneto-optical storage media (e.g., MOs), magnetic storage media (e.g., magnetic tapes or removable disks), media with built-in rewritable non-volatile memory (e.g., memory cards), and media with built-in ROMs (e.g., ROM cartridges).

when the non-transitory computer readable instructions 91 are executed by a processor, the embodiment splices together multiple pieces of code to be spliced according to a predetermined rule to form a piece of code, thereby realizing all functions of a plurality of codes to be spliced, avoiding the conditions of compiling error, link failure and the like caused by factors such as style difference among the plurality of codes to be spliced, the method overcomes the defect of error hidden danger caused by separately defining the codes of the vertex, the fragment shader and the like applied to the graphics processor in the prior art, eliminates code redundancy, also can avoid errors easily caused by handwriting codes and copying codes, also avoids the jump times among a plurality of codes, solves the technical problem of low debugging efficiency of the graphics processor caused by separately defining the vertex, the fragment shader and the like in the prior art, and also reduces the code maintenance cost and the code reading difficulty.

fig. 10 is a schematic diagram illustrating a computer-readable storage medium according to an embodiment of the present disclosure. As shown in fig. 10, a computer-readable storage medium 100, having non-transitory computer-readable instructions 101 stored thereon, in accordance with an embodiment of the present disclosure. The non-transitory computer readable instructions 91, when executed by a processor, perform all or a portion of the steps of the code debugging method of the embodiments of the present disclosure described previously.

The computer-readable storage medium 101 includes, but is not limited to: optical storage media (e.g., CD-ROMs and DVDs), magneto-optical storage media (e.g., MOs), magnetic storage media (e.g., magnetic tapes or removable disks), media with built-in rewritable non-volatile memory (e.g., memory cards), and media with built-in ROMs (e.g., ROM cartridges).

when the non-transitory computer readable instruction 91 of this embodiment is executed by a processor, the obtained splicing code and the auxiliary debugging code are combined together according to a predetermined rule, so that not only can all functions of multiple codes to be spliced be realized, but also the situations of compiling errors, link failures and the like caused by factors such as style differences among the multiple codes to be spliced are avoided, and the technical effect of improving the debugging efficiency of the graphics processor is realized.

Fig. 11 is a diagram illustrating a hardware structure of a terminal according to an embodiment of the present disclosure. As shown in fig. 11, the code splicing terminal 110 includes the above-described code splicing apparatus embodiment.

The terminal may be implemented in various forms, and the terminal in the present disclosure may include, but is not limited to, mobile terminal devices such as a mobile phone, a smart phone, a notebook computer, a digital broadcast receiver, a PDA (personal digital assistant), a PAD (tablet computer), a PMP (portable multimedia player), a navigation device, a vehicle-mounted terminal device, a vehicle-mounted display terminal, a vehicle-mounted electronic rear view mirror, etc., and fixed terminal devices such as a digital TV, a desktop computer, etc.

the terminal may also include other components as equivalent alternative embodiments. As shown in fig. 11, the code splicing terminal 110 may include a power supply unit 111, a wireless communication unit 112, an a/V (audio/video) input unit 113, a user input unit 114, a sensing unit 115, an interface unit 116, a controller 117, an output unit 118, a memory 119, and the like. Fig. 11 shows a terminal having various components, but it is to be understood that not all of the shown components are required to be implemented, and that more or fewer components may alternatively be implemented.

the wireless communication unit 112 allows, among other things, radio communication between the terminal 110 and a wireless communication system or network. The a/V input unit 113 is for receiving an audio or video signal. The user input unit 114 may generate key input data to control various operations of the terminal device according to a command input by a user. The sensing unit 115 detects a current state of the terminal 110, a position of the terminal 110, presence or absence of a touch input of the terminal 110 by a user, an orientation of the terminal 110, acceleration or deceleration movement and direction of the terminal 110, and the like, and generates a command or signal for controlling an operation of the terminal 110. The interface unit 116 serves as an interface through which at least one external device is connected to the terminal 110. The output unit 118 is configured to provide output signals in a visual, audio, and/or tactile manner. The memory 119 may store software programs or the like for processing and controlling operations performed by the controller 117, or may temporarily store data that has been output or is to be output. The memory 119 may include at least one type of storage medium. Also, the terminal 110 may cooperate with a network storage device that performs a storage function of the memory 119 through a network connection. The controller 117 generally controls the overall operation of the terminal device. In addition, the controller 117 may include a multimedia module for reproducing or playing back multimedia data. The controller 117 may perform a pattern recognition process to recognize a handwriting input or a picture drawing input performed on the touch screen as a character or an image. The power supply unit 111 receives external power or internal power and supplies appropriate power required to operate the respective elements and components under the control of the controller 117.

Various embodiments of the code splicing method presented in the present disclosure may be implemented using a computer-readable medium, such as computer software, hardware, or any combination thereof. For a hardware implementation, various embodiments of the code splicing method proposed by the present disclosure may be implemented by using at least one of an Application Specific Integrated Circuit (ASIC), a Digital Signal Processor (DSP), a Digital Signal Processing Device (DSPD), a Programmable Logic Device (PLD), a Field Programmable Gate Array (FPGA), a processor, a controller, a microcontroller, a microprocessor, an electronic unit designed to perform the functions described herein, and in some cases, various embodiments of the code splicing method proposed by the present disclosure may be implemented in the controller 117. For software implementation, various embodiments of the code splicing method proposed by the present disclosure may be implemented with a separate software module that allows at least one function or operation to be performed. The software codes may be implemented by software applications (or programs) written in any suitable programming language, which may be stored in the memory 119 and executed by the controller 117.

The code splicing terminal 110 provided in this embodiment splices a plurality of codes to be spliced together according to a predetermined rule to form one code, thereby implementing all functions of the plurality of codes to be spliced, avoiding situations of compiling errors, link failures and the like caused by factors such as style differences among the plurality of codes to be spliced, overcoming the defect of error hidden danger caused by separately defining vertices, fragment shaders and the like applied to the codes of the graphics processor in the prior art, eliminating code redundancy, avoiding errors easily caused by handwriting codes and copying codes, avoiding the number of jumps among the plurality of codes, solving the technical problem of low debugging efficiency of the graphics processor caused by separately defining vertices, fragment shaders and the like in the prior art, and reducing code maintenance cost and code reading difficulty.

Fig. 12 is a diagram illustrating a hardware structure of a terminal according to an embodiment of the present disclosure. As shown in fig. 12, the code debugging terminal 120 includes the code debugging apparatus embodiment described above.

the terminal may also include other components as equivalent alternative embodiments. As shown in fig. 12, the code debugging terminal 120 may include a power supply unit 121, a wireless communication unit 122, an a/V (audio/video) input unit 123, a user input unit 124, a sensing unit 125, an interface unit 126, a controller 127, an output unit 128, a memory 129, and the like. Fig. 12 shows a terminal having various components, but it is to be understood that not all of the shown components are required to be implemented, and that more or fewer components may alternatively be implemented.

the wireless communication unit 122 allows, among other things, radio communication between the terminal 120 and a wireless communication system or network. The a/V input unit 123 is used to receive audio or video signals. The user input unit 124 may generate key input data to control various operations of the terminal device according to a command input by a user. The sensing unit 125 detects a current state of the terminal 120, a position of the terminal 120, presence or absence of a touch input of the terminal 120 by a user, an orientation of the terminal 120, acceleration or deceleration movement and direction of the terminal 120, and the like, and generates a command or signal for controlling an operation of the terminal 120. The interface unit 126 serves as an interface through which at least one external device is connected to the terminal 120. The output unit 128 is configured to provide output signals in a visual, audio, and/or tactile manner. The memory 129 may store software programs or the like for processing and controlling operations performed by the controller 127, or may temporarily store data that has been output or is to be output. Memory 129 may include at least one type of storage medium. Also, the terminal 120 may cooperate with a network storage device that performs a storage function of the memory 129 through a network connection. The controller 127 generally controls the overall operation of the terminal device. In addition, the controller 127 may include a multimedia module for reproducing or playing back multimedia data. The controller 127 may perform a pattern recognition process to recognize a handwriting input or a picture drawing input performed on the touch screen as a character or an image. The power supply unit 121 receives external power or internal power and supplies appropriate power required to operate the respective elements and components under the control of the controller 127.

Various embodiments of the code debugging method presented in this disclosure may be implemented using a computer-readable medium, such as computer software, hardware, or any combination thereof. For a hardware implementation, various embodiments of the code debugging method proposed by the present disclosure may be implemented by using at least one of an Application Specific Integrated Circuit (ASIC), a Digital Signal Processor (DSP), a Digital Signal Processing Device (DSPD), a Programmable Logic Device (PLD), a Field Programmable Gate Array (FPGA), a processor, a controller, a microcontroller, a microprocessor, an electronic unit designed to perform the functions described herein, and in some cases, various embodiments of the code debugging method proposed by the present disclosure may be implemented in the controller 127. For software implementation, various embodiments of the code debugging method proposed by the present disclosure may be implemented with a separate software module that allows at least one function or operation to be performed. The software codes may be implemented by software applications (or programs) written in any suitable programming language, which may be stored in memory 129 and executed by controller 127.

The code debugging terminal provided by the embodiment combines the obtained splicing code with the auxiliary debugging code according to the preset rule, not only can realize all functions of a plurality of codes to be spliced, but also avoids the conditions of compiling errors, link failures and the like caused by factors such as style differences among the plurality of codes to be spliced, and the like, and realizes the technical effect of improving the debugging efficiency of the graphic processor.

The foregoing describes the general principles of the present disclosure in conjunction with specific embodiments, however, it is noted that the advantages, effects, etc. mentioned in the present disclosure are merely examples and are not limiting, and they should not be considered essential to the various embodiments of the present disclosure. Furthermore, the foregoing disclosure of specific details is for the purpose of illustration and description and is not intended to be limiting, since the disclosure is not intended to be limited to the specific details so described.

the block diagrams of devices, apparatuses, systems referred to in this disclosure are only given as illustrative examples and are not intended to require or imply that the connections, arrangements, configurations, etc. must be made in the manner shown in the block diagrams. These devices, apparatuses, devices, systems may be connected, arranged, configured in any manner, as will be appreciated by those skilled in the art. Words such as "including," "comprising," "having," and the like are open-ended words that mean "including, but not limited to," and are used interchangeably therewith. The words "or" and "as used herein mean, and are used interchangeably with, the word" and/or, "unless the context clearly dictates otherwise. The word "such as" is used herein to mean, and is used interchangeably with, the phrase "such as but not limited to".

also, as used herein, "or" as used in a list of items beginning with "at least one" indicates a separate list, such that, for example, a list of "A, B or at least one of C" means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the word "exemplary" does not mean that the described example is preferred or better than other examples.

it is also noted that in the systems and methods of the present disclosure, components or steps may be decomposed and/or re-combined. These decompositions and/or recombinations are to be considered equivalents of the present disclosure.

Various changes, substitutions and alterations to the techniques described herein may be made without departing from the techniques of the teachings as defined by the appended claims. Moreover, the scope of the claims of the present disclosure is not limited to the particular aspects of the process, machine, manufacture, composition of matter, means, methods and acts described above. Processes, machines, manufacture, compositions of matter, means, methods, or acts, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding aspects described herein may be utilized. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or acts.

the previous description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects without departing from the scope of the disclosure. Thus, the present disclosure is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

The foregoing description has been presented for purposes of illustration and description. Furthermore, this description is not intended to limit embodiments of the disclosure to the form disclosed herein. While a number of example aspects and embodiments have been discussed above, those of skill in the art will recognize certain variations, modifications, alterations, additions and sub-combinations thereof.

Claims

1. A method for code splicing, comprising:

Acquiring a plurality of codes to be spliced;

obtaining a common variable among the multiple codes to be spliced;

Splicing the common variables among the multiple codes to be spliced and the merging result according to a first preset rule;

The step of combining codes except for the common variable among the multiple codes to be spliced to obtain a combined result specifically comprises the following steps:

If the matching is successful, the following steps are executed:

Determining the result after the duplication removal as a first combination result; if the matching fails, the following steps are executed:

And determining the first combination result and the second combination result as the combination result based on the execution results of the matching success and the matching failure.

2. the method of claim 1, wherein after the step of obtaining a plurality of codes to be spliced, the method further comprises:

And compiling each code to be spliced respectively.

3. the method according to claim 2, wherein after the step of compiling the respective pieces of code to be spliced, the method further comprises:

4. the method according to claim 1, wherein the step of identifying the character strings in the plurality of codes to be spliced that conform to the first predetermined character format specifically comprises:

5. a method for debugging code, comprising:

obtaining a mosaic code obtained by the method of any one of claims 1-4;

acquiring an auxiliary debugging code;

The combined code is executed.

6. A code splicing apparatus, comprising:

the splicing module is used for splicing the common variables among the multiple codes to be spliced and the merging result according to a first preset rule;

Wherein, the merging module specifically comprises:

a determination unit configured to determine a merging result based on the matching result;

the determining unit specifically comprises a first determining subunit, a second determining subunit and a merging subunit;

the first determining subunit, if the matching is successful, is configured to:

7. the apparatus of claim 6, further comprising:

8. The apparatus of claim 7, further comprising:

9. The apparatus according to claim 6, wherein the identification unit specifically comprises:

10. a code debugging apparatus, comprising:

a third obtaining module, configured to obtain the splicing code obtained by any one of the apparatuses in claims 6 to 9;

and the execution module is used for executing the combined code.

11. A code stitching hardware device, comprising:

a memory for storing non-transitory computer readable instructions; and

A processor for executing the computer readable instructions such that the processor when executing implements the code splicing method of any one of claims 1-4.

12. A code debugging hardware apparatus, comprising:

A memory for storing non-transitory computer readable instructions; and

a processor for executing the computer readable instructions such that the processor when executing implements the code debugging method of claim 5.

13. A computer-readable storage medium storing non-transitory computer-readable instructions that, when executed by a computer, cause the computer to perform the code splicing method of any one of claims 1-4.

14. A computer-readable storage medium storing non-transitory computer-readable instructions that, when executed by a computer, cause the computer to perform the code debugging method of claim 5.

15. A code splicing terminal comprising a code splicing apparatus according to claims 6-9.

16. A code debugging terminal comprising a code debugging apparatus according to claim 10.