CN108565843B - Bus voltage detection and protection module, switching power supply control unit and switching power supply circuit - Google Patents
Bus voltage detection and protection module, switching power supply control unit and switching power supply circuit Download PDFInfo
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- CN108565843B CN108565843B CN201810506579.7A CN201810506579A CN108565843B CN 108565843 B CN108565843 B CN 108565843B CN 201810506579 A CN201810506579 A CN 201810506579A CN 108565843 B CN108565843 B CN 108565843B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/22—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for distribution gear, e.g. bus-bar systems; for switching devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/1213—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for DC-DC converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/125—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for rectifiers
Abstract
The invention provides a bus voltage detection and protection module, a switching power supply control unit and a switching power supply circuit, wherein the switching power supply control unit comprises a switching power supply 'on' signal generation module, a switching power supply 'off' signal generation module, a switching latch U125, a driving module, a bus voltage sampling and holding module, the bus voltage detection and protection module and an OR gate U124; and the detection and protection control of the bus voltage are realized through the comparison of the sampled bus voltage and the reference voltage. Before a power tube switch is started after power on, a circuit automatically detects whether overvoltage or undervoltage occurs in bus voltage, and a bus voltage protection mechanism before switching is realized; after the power tube enters a normal switch, the overvoltage and undervoltage reference voltage range is automatically widened, and a bus voltage protection hysteresis function is realized; the circuit judges overvoltage and undervoltage protection through bus peak voltage sampling and detection, and realizes accurate detection and protection under different bus ripple voltages.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a switching power supply circuit.
Background
With the high-speed development of the technology of the Internet of things and the integrated circuit, the performance of the terminal products of the Internet of things such as mobile phones, routers and the like is rapidly improved, the value is higher and higher, and the requirements on the performance, the price, the reliability, the on-line qualification rate and the like of the switch power supply products such as the chargers, the adapters and the like matched with the terminal products are also continuously improved.
In order to meet the global use of electronic devices, it is necessary to require that switching power supply devices such as chargers, adapters, etc. meet the power supply standards of various countries. As is well known, the power supply standards of various countries in the world are quite different, some countries adopt 110V ac power supply, some countries adopt 220V ac power supply, some countries adopt other voltages such as 120V and the like, the frequencies of the ac power supply are different, the stability difference of the network voltage is quite large, and the instantaneous network voltage of some countries can exceed 300V. In addition, under the requirement of continuously improving the cost performance of the switching power supply product, the design margin of the product is continuously reduced, and the problem of reliability in touch is easily solved.
Correspondingly, the function of increasing the overvoltage and undervoltage protection of the bus voltage of the switch power supply product is put forward in the market. Early detection and protection of the bus voltage of the switching power supply are realized through a peripheral circuit, so that the system cost of the product is high and the volume is large. After that, a switching power supply chip integrating the detection and protection of the bus voltage of the switching power supply appears in the market, but three typical problems generally exist, namely, the voltage detection precision is not high, particularly, the voltage deviation is very large along with the change of the size of a load; secondly, judging the overvoltage and undervoltage state of the bus voltage after the switching action occurs, which has reliability risk; thirdly, the protection mechanism is imperfect, such as a fault latch function, a hysteresis recovery function and the like after protection.
Disclosure of Invention
The invention aims to overcome the defects in the prior art, provides a circuit for detecting and protecting the bus voltage of a switching power supply, and solves the problems that the bus voltage detection precision is not high, and particularly the detection voltage can change along with the change of the load current; the problem of judging the bus voltage after the switching action occurs is solved, and a bus voltage protection mechanism before the switching action occurs is realized; the protection mechanisms such as a fault latch function, a hysteresis recovery function and the like are solved and perfected. The technical scheme adopted by the invention is as follows:
a bus voltage detection and protection module, comprising: the first signal selector U201, the second signal selector U202, the first comparator U203, the second comparator U204, the overvoltage and undervoltage control logic unit U205, the D flip-flops U231 and U206, the OR gate U232, the oscillator U207, the first delay module U208 and the second delay module U209;
the low level selection signal input end of the first signal selector U201 is connected with the reference signal V211, and the high level selection signal input end of the first signal selector U201 is connected with the reference signal V212; the signal selection end of the first signal selector U201 is connected with the output end of the second delay module U209; the output end of the first signal selector U201 is connected with the non-inverting input end of the first comparator U203;
the inverting input end of the first comparator U203 is connected with a busbar voltage division signal VBUS_DIV, and the output signal of the first comparator U203 is a UVP signal which is used as one of input signals of the overvoltage and undervoltage control logic unit U205;
the low level selection signal input of the second signal selector U202 is connected to the reference signal V214, and the high level selection signal input of the second signal selector U202 is connected to the reference signal V215; the signal selection end of the second signal selector U202 is connected with the output end of the second delay module U209; the output end of the second signal selector U202 is connected with the inverting input end of the second comparator U204;
the non-inverting input end of the second comparator U204 is connected with a busbar voltage division signal VBUS_DIV, and the output signal of the second comparator U204 is an OVP signal and is used as the other input signal of the overvoltage and undervoltage control logic unit U205;
the input end of the oscillator U207 is connected with a power-on enabling signal EN, and the output end of the oscillator U207 outputs a clock signal CLK to the overvoltage and undervoltage control logic unit U205;
the input end of the first delay module U208 is connected with a power-on enabling signal EN, the output end of the first delay module U208 is connected with the input end of the second delay module U209, the reset end of the D trigger U206 and the clock signal end of the D trigger U231;
one output end of the overvoltage and undervoltage control logic unit U205 is connected with the D end of the D trigger U231 and outputs a signal OU_signal; the reset end of the D trigger U231 is connected with a power-on enabling signal EN;
the other output end of the overvoltage and undervoltage control logic unit U205 is connected with the clock signal end of the D trigger U206 and outputs a signal OU_CLK; the D terminal of the D trigger U206 is connected with a high level;
the output end of the D trigger U231 and the output end of the D trigger U206 are respectively connected with two input ends of the OR gate U232; the output of OR gate U232 is used as the output of the bus voltage detection and protection module.
Specifically, the overvoltage and undervoltage control logic unit U205 includes: a NOT gate U407, a first counter U401, a rising edge detection module U402, a latch U403, an OR gate U410, and a second counter U411;
the output end of the first comparator U203 is connected with one input end of the OR gate U410;
the output end of the second comparator U204 is connected with the reset end of the first counter U401 through the NOT gate U407 and is directly connected with the set end of the latch U403;
the output end of the oscillator U207 is respectively connected to the clock signal end of the first counter U401 and the clock signal end of the second counter U411;
the output end of the first counter U401 is connected with the input end of the rising edge detection module U402; the output end of the rising edge detection module U402 is connected to the reset end of the latch U403; the output Q of latch U403 is coupled to the other input of or gate U410; the output end of the OR gate U410 is connected with the reset end of the second counter U411 and is used as one output end of the overvoltage and undervoltage control logic unit U205 to be connected with the D end of the D trigger U231; the output end of the second counter U411 is used as the other output end of the overvoltage/undervoltage control logic unit U205, and is connected to the clock signal end of the D flip-flop U206.
A switching power supply control unit comprises a switching power supply 'on' signal generation module, a switching power supply 'off' signal generation module, a switching latch U125, a driving module, a bus voltage sampling and holding module, the bus voltage detection and protection module and an OR gate U124;
the input end of the bus voltage sampling and holding module is used for connecting a bus voltage sampling divided signal VBUS_IN, the output end of the bus voltage sampling and holding module is connected with the bus voltage detection and protection module, and the bus voltage divided signal VBUS_DIV is output to the bus voltage detection and protection module; the output end of the bus voltage detection and protection module is connected with one end of the OR gate U124;
the input end of the switching power supply 'on' signal generating module is used for being connected with the auxiliary winding voltage division feedback signal FB of the transformer, and the output end of the switching power supply 'on' signal generating module is connected with the setting end of the switching latch U125;
the input end of the switching power supply off signal generating module is used for being connected with a sampling signal CS at the positive end of the primary current sampling resistor, and the output end of the switching power supply off signal generating module is connected with the other end of the OR gate U124;
the output end of the OR gate U124 is connected with the reset end of the Guan Suocun U125;
the Q end of the switch latch U125 is connected with the input end of the driving module, and the output end of the driving module is used for being connected with the switch control end of the power tube Q131.
A switching power supply circuit, comprising: the power supply comprises an input rectifying and filtering circuit, the switching power supply control unit, a transformer T106, an output rectifying and filtering circuit, an RCD absorption circuit, a power tube Q131, a primary current sampling resistor Rcs, bus voltage detection resistors R103 and R104 and an auxiliary winding voltage division feedback circuit;
the positive output end of the input rectifying and filtering circuit is connected with the primary winding synonym end of the transformer T106, and the negative output end of the input rectifying and filtering circuit is connected with the primary ground;
the series bus voltage detection resistors R103 and R104 are connected between the positive output end of the input rectifying and filtering circuit and the primary side ground, a bus voltage sampling voltage division signal VBUS_IN is obtained from the connection point of the series resistors R103 and R104, and the series bus voltage detection resistors R103 and R104 are connected to the input end of the bus voltage sampling and holding module;
the RCD absorption circuit is connected with two ends of a primary winding of the transformer T106;
the primary winding of the transformer T106 is connected with the current input end of the power tube Q131 in the same name, the current output end of the power tube Q131 is connected with one end of the primary current sampling resistor Rcs, and the other end of the primary current sampling resistor Rcs is connected with the primary ground;
the secondary winding of the transformer T106 is connected with an output rectifying and filtering circuit, and the DC voltage is output through the output rectifying and filtering circuit;
the two ends of the auxiliary winding of the transformer T106 are connected with an auxiliary winding voltage division feedback circuit; the auxiliary winding voltage division feedback circuit comprises two resistors R112 and R113 which are connected in series, an auxiliary winding voltage division feedback signal FB is obtained from the connection point of the two resistors R112 and R113 which are connected in series, and the auxiliary winding voltage division feedback signal FB is connected to the input end of the switching power supply 'on' signal generating module.
The invention has the advantages that: the invention realizes overvoltage and undervoltage protection by sampling and detecting the bus peak voltage, and solves the problem of low detection precision caused by ripple difference of the bus voltage under different output load conditions.
Drawings
Fig. 1 is a schematic circuit diagram of the present invention for detecting and protecting the bus voltage of a switching power supply.
Fig. 2 is a schematic diagram of a bus voltage detection and protection module according to the present invention.
Fig. 3 is a timing diagram of the bus voltage detection and protection function of the present invention.
FIG. 4 is a schematic diagram of an over-voltage and under-voltage control logic unit according to the present invention.
Detailed Description
The invention will be further described with reference to the following specific drawings and examples.
As shown in fig. 1, the present invention proposes a switching power supply control unit 120, whose key core is a bus voltage detection and protection module 122 contained inside;
as shown in fig. 2, the bus voltage detection and protection module 122 includes: the first signal selector U201, the second signal selector U202, the first comparator U203, the second comparator U204, the overvoltage and undervoltage control logic unit U205, the D flip-flops U231 and U206, the OR gate U232, the oscillator U207, the first delay module U208 and the second delay module U209;
the low level selection signal input end of the first signal selector U201 is connected with the reference signal V211, and the high level selection signal input end of the first signal selector U201 is connected with the reference signal V212; the signal selection end of the first signal selector U201 is connected with the output end of the second delay module U209; the output end of the first signal selector U201 is connected with the non-inverting input end of the first comparator U203;
the inverting input end of the first comparator U203 is connected with a busbar voltage division signal VBUS_DIV, and the output signal of the first comparator U203 is a UVP signal which is used as one of input signals of the overvoltage and undervoltage control logic unit U205;
the low level selection signal input of the second signal selector U202 is connected to the reference signal V214, and the high level selection signal input of the second signal selector U202 is connected to the reference signal V215; the signal selection end of the second signal selector U202 is connected with the output end of the second delay module U209; the output end of the second signal selector U202 is connected with the inverting input end of the second comparator U204;
the non-inverting input end of the second comparator U204 is connected with a busbar voltage division signal VBUS_DIV, and the output signal of the second comparator U204 is an OVP signal and is used as the other input signal of the overvoltage and undervoltage control logic unit U205;
the input end of the oscillator U207 is connected with a power-on enabling signal EN, and the output end of the oscillator U207 outputs a clock signal CLK to the overvoltage and undervoltage control logic unit U205;
the input end of the first delay module U208 is connected with a power-on enabling signal EN, the output end of the first delay module U208 is connected with the input end of the second delay module U209, the reset end of the D trigger U206 and the clock signal end of the D trigger U231;
one output end of the overvoltage and undervoltage control logic unit U205 is connected with the D end of the D trigger U231 and outputs a signal OU_signal; the reset end of the D trigger U231 is connected with a power-on enabling signal EN;
the other output end of the overvoltage and undervoltage control logic unit U205 is connected with the clock signal end of the D trigger U206 and outputs a signal OU_CLK; the D terminal of the D trigger U206 is connected with a high level;
the output end of the D trigger U231 and the output end of the D trigger U206 are respectively connected with two input ends of the OR gate U232; the output end of the or gate U232 is used as the output end of the bus voltage detection and protection module 122;
as shown in fig. 4, the overvoltage/undervoltage control logic unit U205 includes: a NOT gate U407, a first counter U401, a rising edge detection module U402, a latch U403, an OR gate U410, and a second counter U411;
the output end of the first comparator U203 is connected with one input end of the OR gate U410;
the output end of the second comparator U204 is connected with the reset end of the first counter U401 through the NOT gate U407 and is directly connected with the set end of the latch U403;
the output end of the oscillator U207 is respectively connected to the clock signal end of the first counter U401 and the clock signal end of the second counter U411;
the output end of the first counter U401 is connected with the input end of the rising edge detection module U402; the output end of the rising edge detection module U402 is connected to the reset end of the latch U403; the output Q of latch U403 is coupled to the other input of or gate U410; the output end of the OR gate U410 is connected with the reset end of the second counter U411 and is used as one output end of the overvoltage and undervoltage control logic unit U205 to be connected with the D end of the D trigger U231; the output end of the second counter U411 is used as the other output end of the overvoltage and undervoltage control logic unit U205 and is connected with the clock signal end of the D trigger U206;
the switching power supply control unit 120, as shown in fig. 1, includes a switching power supply "on" signal generating module 121, a switching power supply "off" signal generating module 123, a switching latch U125, a driving module 126, a bus voltage sample-and-hold module 127, a bus voltage detecting and protecting module 122, and an or gate U124;
the input end of the bus voltage sampling and holding module 127 is used for connecting the bus voltage sampling voltage division signal VBUS_IN, the output end of the bus voltage sampling and holding module 127 is connected with the bus voltage detection and protection module 122, and the bus voltage division signal VBUS_DIV is output to the bus voltage detection and protection module 122; the output end of the bus voltage detection and protection module 122 is connected with one end of an OR gate U124;
the input end of the switching power supply 'on' signal generation module 121 is used for being connected with the auxiliary winding voltage division feedback signal FB, and the output end of the switching power supply 'on' signal generation module 121 is connected with the setting end of the switching latch U125;
the input end of the switching power supply off signal generating module 123 is used for being connected with a sampling signal CS at the positive end of the primary current sampling resistor, and the output end of the switching power supply off signal generating module 123 is connected with the other end of the OR gate U124;
the output end of the OR gate U124 is connected with the reset end of the Guan Suocun U125;
the Q end of the switch latch U125 is connected with the input end of the driving module 126, and the output end of the driving module 126 is used for being connected with the switch control end of the power tube Q131;
a circuit for switching power supply bus voltage detection and protection, as shown in fig. 1, comprising: the power supply circuit comprises an input rectifying and filtering circuit, a switching power supply control unit 120, a transformer T106, an output rectifying and filtering circuit 107, an RCD absorption circuit 109, a power tube Q131, a primary current sampling resistor Rcs, bus voltage detection resistors R103 and R104 and an auxiliary winding voltage division feedback circuit 108;
the positive output end of the input rectifying and filtering circuit is connected with the primary winding synonym end of the transformer T106, and the negative output end of the input rectifying and filtering circuit is connected with the primary ground; the input rectifying and filtering circuit mainly comprises a rectifying bridge D101 and a filtering capacitor C102 in FIG. 1;
the series bus voltage detection resistors R103 and R104 are connected between the positive output end of the input rectifying and filtering circuit and the primary side ground, a bus voltage sampling voltage division signal VBUS_IN is obtained from the connection point of the series resistors R103 and R104, and the series bus voltage detection resistors R103 and R104 are connected to the input end of the bus voltage sampling and holding module 127;
the RCD absorption circuit 109 is connected with two ends of the primary winding of the transformer T106;
the primary winding of the transformer T106 is connected with the current input end of the power tube Q131 in the same name, the current output end of the power tube Q131 is connected with one end of the primary current sampling resistor Rcs, and is connected with the input end of the switching power supply off signal generating module 123, and the other end of the primary current sampling resistor Rcs is connected with the primary ground;
the secondary winding of the transformer T106 is connected with an output rectifying and filtering circuit 107, and the DC voltage is output through the output rectifying and filtering circuit; the output rectifying and filtering circuit 107 includes the diode D102, the filter capacitor C110, and the resistor R111 of fig. 1; this part is a mature circuit and will not be described in detail;
the two ends of the auxiliary winding of the transformer T106 are connected with an auxiliary winding voltage division feedback circuit 108; the auxiliary winding voltage division feedback circuit 108 comprises two resistors R112 and R113 which are connected in series, an auxiliary winding voltage division feedback signal FB is obtained from the connection point of the two resistors R112 and R113 which are connected in series, and the auxiliary winding voltage division feedback signal FB is connected to the input end of the switching power supply 'on' signal generation module 121;
the working principle of the invention is described below;
the switching power supply control unit 120 is the core of the present invention; the power tube Q131 can adopt an NMOS tube, the drain electrode and the source electrode of the NMOS tube are respectively used as a current input end and a current output end, and the grid electrode of the NMOS tube is used as a switch control end; NPN triode can also be used;
referring to fig. 1, the application principle of the circuit for detecting and protecting the bus voltage of the switching power supply is that an auxiliary winding voltage division feedback signal FB is connected to the input end of a switching power supply ON signal generation module 121, the switching power supply ON signal generation module 121 calculates the switching frequency according to the level of the auxiliary winding voltage division feedback signal FB and outputs an ON signal to control the conduction of a power tube Q131, when the output signal of the switching power supply ON signal generation module 121 is changed from low to high, a switching latch U125 is triggered, an output signal ON is high, and the ON high state is kept until the ON Guan Suocun device U125 is reset, and after the output signal ON of the switching latch 125 is amplified by a signal of a driving module 126, the conduction of the power tube Q131 is driven.
Similarly, the turn-off of the driving power transistor Q131 controls the reset of the on-off Guan Suocun unit U125, and the reset signal of the on-off Guan Suocun unit U125 is a combined signal including the output signal of the switching power supply "off" signal generating module 123 and the output signal of the bus voltage detecting and protecting module 122.
The output signal of the switch power supply off signal generating module 123 is controlled by the voltage drop of the primary current sampling resistor Rcs, after the power tube Q131 is turned on, the primary current is increased, the voltage drop of the primary current sampling resistor Rcs is also increased, when the voltage drop of the Rcs reaches the preset reference value, the output signal of the switch power supply off signal generating module 123 is changed from low to high, and the on Guan Suocun device U125 is reset; the switching power off signal generating module 123 outputs a reset signal cycle by cycle.
The bus voltage detecting and protecting module 122 compares the bus voltage dividing signal vbus_div with the reference signal, when the bus voltage dividing signal vbus_div falls within the window range of the reference signal, the bus voltage detecting and protecting module 122 outputs a low level signal, and the low level signal does not control the turn-off of the power tube Q131; when the divided bus voltage division signal vbus_div falls outside the reference signal window range, the bus voltage detection and protection module 122 outputs a high level, and the high level signal immediately controls the turn-off of the power transistor Q131. Further, the reset of the switch trigger U125 has a higher priority than the set (i.e. when the reset terminal and the set terminal are at the same time, the reset is performed), and after the bus voltage detection and protection module 122 outputs the high level, the power transistor Q131 is turned on and is not triggered any more.
The function of the bus voltage detection and protection module 122 is seen in FIG. 2; after the power-on is started, the enable signal EN is changed from low to high, the oscillator U207 starts to work, and a clock signal is output for timing of bus voltage protection detection. The first delay module U208 delays the input enable signal EN by 2mS, that is, after the enable signal EN changes from low to high by 2mS, the output signal dly1 of the first delay module U208 changes from low to high; the second delay module U209 delays the input signal dly1 by 100 μs, that is, after the signal dly changes from low to high by 100 μs, the output signal dly2 of the second delay module U209 changes from low to high. The delay time of the first delay module U208 is usually 1ms to 20ms, in this example, 2ms; the delay time length of the second delay module U209 is not particularly limited, and may be, for example, from several tens of μs to several ms.
Signals V211, V212, V213, V214 are all internal reference signals; the reference signals V211 and V212 are used as bus voltage undervoltage judgment references, wherein the reference signal V211 is higher than the reference signal V212; the reference signals V213 and V214 are used as bus voltage overvoltage judging references, wherein the reference signal V215 is higher than the reference signal V214; the reference signal V214 is higher than V211; as shown in fig. 3; the output signal dly2 of the second delay module U209 is used as a selection signal; when the selection signal dly2 is at a low level, the first signal selector U201 selects the reference signal V211, and the second signal selector U202 selects the reference signal V214; when the selection signal dly2 is at a high level, the first signal selector U201 selects the reference signal V212, and the second signal selector U202 selects the reference signal V215; thus, after the select signal dly24 goes from low to high, the reference window for over-voltage under-voltage protection increases in response.
The first comparator U203 is configured to detect a bus voltage under-voltage, where a non-inverting input of the first comparator U203 is connected to an output terminal of the first signal selector U201, and an inverting input of the first comparator is connected to the bus voltage division signal vbus_div, and when the output signal of the first comparator U203 changes from low to high, the first comparator U represents the bus voltage under-voltage.
Similarly, the second comparator U204 is used for detecting the overvoltage of the bus voltage, the non-inverting input of the second comparator U204 is connected with the divided bus voltage signal vbus_div, the inverting input of the second comparator U204 is connected with the output end of the second signal selector U202, and when the output signal of the second comparator U204 changes from low to high, the overvoltage of the bus voltage is indicated.
The outputs of the comparators U203 and U204 are respectively connected to the overvoltage and undervoltage control logic unit U205, when any one of the outputs of the comparators U203 and U204 is in a high level, the output signal OU_signal of the overvoltage and undervoltage control logic unit U205 is changed from low to high, meanwhile, the overvoltage and undervoltage control logic unit U205 counts the duration of the high level of the signal OU_signal, and when the high level of the signal OU_signal continuously exceeds the preset time duration, the output signal OU_CLK of the overvoltage and undervoltage control logic unit U205 is changed from low to high; in the timing process of the preset time duration, if the signal OU_signal has a low level, the timing is cleared, and the timing is restarted after the signal OU_signal has a high level; the duration of the preset time is greater than 1 power frequency period, and 120mS is selected in this example.
D trigger U231 latches the bus voltage overvoltage and undervoltage detection signal when power is on; the D end of the D trigger U231 is connected to the output signal ou_signal of the overvoltage/undervoltage control logic unit U205, the clock signal of the D trigger U231 is connected to the output signal dly1 of the first delay module U208, and the reset end of the D trigger U231 is connected to the power-on enable signal EN. Before power-up enabling, the D flip-flop U231 is reset, and the output terminal Q of the D flip-flop U231 is zero. After power-up enabling, the output signal ou_signal of the over-voltage and under-voltage control logic unit U205 changes according to the output signals of the comparators U203 and U204, when the outputs of the comparators U203 and U204 are both low, the signal ou_signal is low, and when either of the outputs of the comparators U203 and U204 is high, the signal ou_signal is high. After the power-on enable delay is 2mS, the output signal dly1 of the first delay module U208 changes from low to high, latches the signal ou_signal into the D flip-flop U231, when the output of the D flip-flop U231 is at a high level, which indicates that the circuit has detected that the bus voltage is over-voltage or under-voltage when the circuit is powered on, the latch U125 is continuously reset to shield the conduction of the power tube Q131, and the state is continuously maintained until reset is cleared after the power-on is again performed.
The D trigger U206 is locked with a bus voltage overvoltage and undervoltage signal generated in the working process of the switching power supply. The D terminal of the D flip-flop U206 is connected to the high level, and the clock signal of the D flip-flop U206 is connected to the output signal ou_clk of the overvoltage/undervoltage control logic unit U205. When the power is on, if the bus voltage division signal vbus_div falls within the window range of the comparison reference, the ou_signal signal is zero, the output of the D flip-flop U231 is also zero, the circuit starts to enter the normal switching process, and at the same time, after the delay of the second delay module 209, the window range of the comparison reference is increased by the signal dly 2. In the working process of the circuit, when overvoltage or undervoltage protection is triggered, the protection action is not triggered immediately, but 120mS (namely the preset time duration) timing is performed to shield the misjudgment problem caused by bus voltage disturbance. During the 120mS timing period, the over-voltage or under-voltage continuously occurs, the over-voltage and under-voltage control logic unit U205 latches the high level signal into the D flip-flop U206 from low to high after the 120mS timing is completed, which indicates that the circuit detects that the bus voltage is over-voltage or under-voltage during the working process, and the D flip-flop U206 outputs the high level to continuously reset the latch U125 to shield the conduction of the power tube Q131, and the state is continuously maintained until reset and zero reset after power-up again.
The bus voltage detection and protection time sequence during power-up is shown in fig. 3. The signals in fig. 3 include: VDD voltage signal 302, power-on enable signal EN, output signal dly1 of first delay block U208, output signal dly2 of second delay block U209, bus voltage divided signal vbus_div, over voltage reference 342, under voltage reference 343; the over-voltage reference 342 includes two segments of reference signals V214 and V215, and the under-voltage reference 343 includes two segments of reference signals V211 and V212.
After the system is electrified, after the VDD voltage is gradually raised to UVLO threshold voltage, the electrifying enabling signal EN is changed from low to high, the reference voltage of overvoltage and undervoltage is also established, and a circuit detects whether a busbar voltage dividing signal VBUS_DIV falls in a reference window in real time; after a system delay of 2mS, the signal dly1 changes from low to high, and after confirming that the busbar voltage division signal VBUS_DIV falls in the reference window, the circuit starts to enter normal operation, and after a delay of 100 mS, the signal dly2 changes from low to high, and the reference window increases.
As shown in fig. 4, after the high level pulse OVP detected by the overvoltage is generated, the first counter U401 is cleared, the latch U403 is set, the output of the or gate U410 is high, the second counter U411 starts to time from zero, and the timing period of the second counter U411 is a preset time period (greater than one power frequency period) of 120 ms; when the signal OVP returns to low level, the first counter U401 starts timing from zero, the timing period is set between one power frequency half-wave period and two power frequency half-wave periods, when the signal OVP regenerates high level pulse in the next adjacent power frequency half-wave period, the first counter U401 starts timing from zero again after being cleared, at this time, the output of the OR gate U410 is continuously high level, and the second counter U411 continuously counts; when the signal OVP does not generate a high level pulse in the next adjacent power frequency half-wave period, the first counter U401 is not cleared, a signal from low to high is output after the set timing time (from one power frequency half-wave period to two power frequency half-wave periods) is reached, the rising edge detection module U402 generates a high level pulse, the latch U403 is reset, at this time, the output of the or gate U410 is low, and the second counter U411 is cleared to protect the re-timing.
The under-voltage protection is relatively simple, the timing process of the second counter U411 is directly related to the state of the signal UVP, and when the signal UVP is continuously high, the second counter U411 enters the protection after timing is completed.
The invention realizes the detection and protection control of the bus voltage by comparing the magnitude relation between the divided voltage signal of the bus voltage and the reference voltage. After the power-on is started, whether a bus voltage division signal falls in an overvoltage and undervoltage reference window range or not is firstly compared, and the process is completed within 2mS time after the power-on; when the bus voltage dividing signal falls in the range of the overvoltage and undervoltage reference windows, the switch signal starts to be output after the delay of 2mS time, meanwhile, the range of the overvoltage and undervoltage reference windows is increased, and the protection hysteresis recovery function is realized; in addition, when the bus voltage dividing signal exceeds the range of an overvoltage and undervoltage reference window within 2mS after power-on, the overvoltage and undervoltage protection signals are directly latched, the switching signal is not output any more, and the bus voltage protection mechanism before switching is realized until the VDD is restarted after power-off.
Finally, it should be noted that the above-mentioned embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same, and although the present invention has been described in detail with reference to examples, it should be understood by those skilled in the art that modifications and equivalents may be made to the technical solution of the present invention without departing from the spirit and scope of the technical solution of the present invention, and all such modifications and equivalents are intended to be encompassed in the scope of the claims of the present invention.
Claims (10)
1. A bus voltage detection and protection module (122), comprising: the first signal selector U201, the second signal selector U202, the first comparator U203, the second comparator U204, the overvoltage and undervoltage control logic unit U205, the D flip-flops U231 and U206, the OR gate U232, the oscillator U207, the first delay module U208 and the second delay module U209;
the low level selection signal input end of the first signal selector U201 is connected with the reference signal V211, and the high level selection signal input end of the first signal selector U201 is connected with the reference signal V212; the signal selection end of the first signal selector U201 is connected with the output end of the second delay module U209; the output end of the first signal selector U201 is connected with the non-inverting input end of the first comparator U203;
the inverting input end of the first comparator U203 is connected with a busbar voltage division signal VBUS_DIV, and the output signal of the first comparator U203 is a UVP signal which is used as one of input signals of the overvoltage and undervoltage control logic unit U205;
the low level selection signal input of the second signal selector U202 is connected to the reference signal V214, and the high level selection signal input of the second signal selector U202 is connected to the reference signal V215; the signal selection end of the second signal selector U202 is connected with the output end of the second delay module U209; the output end of the second signal selector U202 is connected with the inverting input end of the second comparator U204;
the non-inverting input end of the second comparator U204 is connected with a busbar voltage division signal VBUS_DIV, and the output signal of the second comparator U204 is an OVP signal and is used as the other input signal of the overvoltage and undervoltage control logic unit U205;
the input end of the oscillator U207 is connected with a power-on enabling signal EN, and the output end of the oscillator U207 outputs a clock signal CLK to the overvoltage and undervoltage control logic unit U205;
the input end of the first delay module U208 is connected with a power-on enabling signal EN, the output end of the first delay module U208 is connected with the input end of the second delay module U209, the reset end of the D trigger U206 and the clock signal end of the D trigger U231;
one output end of the overvoltage and undervoltage control logic unit U205 is connected with the D end of the D trigger U231 and outputs a signal OU_signal; the reset end of the D trigger U231 is connected with a power-on enabling signal EN;
the other output end of the overvoltage and undervoltage control logic unit U205 is connected with the clock signal end of the D trigger U206 and outputs a signal OU_CLK; the D terminal of the D trigger U206 is connected with a high level;
the output end of the D trigger U231 and the output end of the D trigger U206 are respectively connected with two input ends of the OR gate U232; the output of OR gate U232 is used as the output of bus voltage detection and protection module (122).
2. The bus voltage detection and protection module (122) of claim 1 wherein,
the overvoltage and undervoltage control logic unit U205 includes: a NOT gate U407, a first counter U401, a rising edge detection module U402, a latch U403, an OR gate U410, and a second counter U411;
the output end of the first comparator U203 is connected with one input end of the OR gate U410;
the output end of the second comparator U204 is connected with the reset end of the first counter U401 through the NOT gate U407 and is directly connected with the set end of the latch U403;
the output end of the oscillator U207 is respectively connected to the clock signal end of the first counter U401 and the clock signal end of the second counter U411;
the output end of the first counter U401 is connected with the input end of the rising edge detection module U402; the output end of the rising edge detection module U402 is connected to the reset end of the latch U403; the output Q of latch U403 is coupled to the other input of or gate U410; the output end of the OR gate U410 is connected with the reset end of the second counter U411 and is used as one output end of the overvoltage and undervoltage control logic unit U205 to be connected with the D end of the D trigger U231; the output end of the second counter U411 is used as the other output end of the overvoltage/undervoltage control logic unit U205, and is connected to the clock signal end of the D flip-flop U206.
3. The bus voltage detection and protection module (122) of claim 1 wherein,
the delay time of the first delay module U208 is 1ms to 20ms.
4. The bus voltage detection and protection module (122) of claim 1 wherein,
the reference signals V211 and V212 are used as bus voltage undervoltage judgment references, wherein the reference signal V211 is higher than the reference signal V212; the reference signals V213 and V214 are used as bus voltage overvoltage judging references, wherein the reference signal V215 is higher than the reference signal V214; the reference signal V214 is higher than V211; the output signal dly2 of the second delay module U209 is used as a selection signal; when the selection signal dly2 is at a low level, the first signal selector U201 selects the reference signal V211, and the second signal selector U202 selects the reference signal V214; when the selection signal dly2 is at a high level, the first signal selector U201 selects the reference signal V212, and the second signal selector U202 selects the reference signal V215; thus, after the select signal dly24 goes from low to high, the reference window for over-voltage under-voltage protection increases in response.
5. The bus voltage detection and protection module (122) of claim 1 wherein,
when the output of the comparator U203 and the output of the comparator U204 are at a high level, the output signal ou_signal of the overvoltage/undervoltage control logic unit U205 changes from low to high, meanwhile, the overvoltage/undervoltage control logic unit U205 counts the duration of the high level of the signal ou_signal, and when the high level of the signal ou_signal continuously exceeds the preset time duration, the output signal ou_clk of the overvoltage/undervoltage control logic unit U205 changes from low to high; in the timing process of the preset time duration, if the signal OU_signal has a low level, the timing is cleared, and the timing is restarted after the signal OU_signal has a high level; the duration of the preset time is more than 1 power frequency period.
6. The bus voltage detection and protection module (122) of claim 2 wherein,
the timing period of the first counter U401 is set to be between one power frequency half-wave period and two power frequency half-wave periods; the timing period of the second counter U411 is set to be greater than one power frequency period.
7. A switching power supply control unit (120), characterized by comprising a switching power supply "on" signal generating module (121), a switching power supply "off" signal generating module (123), a switching latch U125, a driving module (126), a bus voltage sample-and-hold module (127), a bus voltage detecting and protecting module (122) according to any one of claims 1 to 6, or gate U124;
the input end of the bus voltage sampling and holding module (127) is used for connecting a bus voltage sampling and dividing signal VBUS_IN, the output end of the bus voltage sampling and holding module (127) is connected with the bus voltage detecting and protecting module (122), and the bus voltage dividing signal VBUS_DIV is output to the bus voltage detecting and protecting module (122); the output end of the bus voltage detection and protection module (122) is connected with one end of the OR gate U124;
the input end of the switching power supply 'on' signal generation module (121) is used for being connected with an auxiliary winding voltage division feedback signal FB of the transformer, and the output end of the switching power supply 'on' signal generation module (121) is connected with the setting end of the switching latch U125;
the input end of the switching power supply off signal generating module (123) is used for being connected with a sampling signal CS at the positive end of the primary current sampling resistor, and the output end of the switching power supply off signal generating module (123) is connected with the other end of the OR gate U124;
the output end of the OR gate U124 is connected with the reset end of the Guan Suocun U125;
the Q end of the switch latch U125 is connected with the input end of the driving module (126), and the output end of the driving module (126) is used for being connected with the switch control end of the power tube Q131.
8. The switching power supply control unit (120) according to claim 7, wherein,
the bus voltage detection and protection module (122) compares the bus voltage division signal VBUS_DIV with a reference signal, when the bus voltage division signal VBUS_DIV falls within the window range of the reference signal, the bus voltage detection and protection module (122) outputs a low level, and the low level signal does not control the turn-off of the power tube Q131; when the divided bus voltage division signal VBUS_DIV falls outside the range of the reference signal window, the bus voltage detection and protection module (122) outputs a high level, and the high level signal immediately controls the turn-off of the power tube Q131.
9. The switching power supply control unit (120) according to claim 7, wherein,
the reset of switch flip-flop U125 has a higher priority than the set.
10. A switching power supply circuit, comprising: an input rectifying and filtering circuit, a switching power supply control unit (120) according to claim 7, 8 or 9, a transformer T106, an output rectifying and filtering circuit (107), an RCD snubber circuit (109), a power tube Q131, a primary current sampling resistor Rcs, bus voltage detection resistors R103, R104, and an auxiliary winding voltage division feedback circuit (108);
the positive output end of the input rectifying and filtering circuit is connected with the primary winding synonym end of the transformer T106, and the negative output end of the input rectifying and filtering circuit is connected with the primary ground;
the series bus voltage detection resistors R103 and R104 are connected between the positive output end of the input rectifying and filtering circuit and the primary side ground, a bus voltage sampling voltage division signal VBUS_IN is obtained from the connection point of the series resistors R103 and R104, and the series bus voltage detection resistors R103 and R104 are connected to the input end of the bus voltage sampling and holding module (127);
the RCD absorption circuit (109) is connected with two ends of a primary winding of the transformer T106;
the primary winding of the transformer T106 is connected with the current input end of the power tube Q131 in the same name, the current output end of the power tube Q131 is connected with one end of the primary current sampling resistor Rcs, and is connected with the input end of the switching power supply off signal generating module (123), and the other end of the primary current sampling resistor Rcs is connected with primary side ground;
the secondary winding of the transformer T106 is connected with an output rectifying and filtering circuit (107) and outputs direct-current voltage through the output rectifying and filtering circuit;
the two ends of the auxiliary winding of the transformer T106 are connected with an auxiliary winding voltage division feedback circuit (108); the auxiliary winding voltage division feedback circuit (108) obtains an auxiliary winding voltage division feedback signal FB and is connected to the input end of the switching power supply 'on' signal generation module (121).
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| CN110277982A (en) * | 2019-07-03 | 2019-09-24 | 江苏宏微科技股份有限公司 | A kind of power switch |
| CN112448370A (en) * | 2019-09-04 | 2021-03-05 | 厦门市必易微电子技术有限公司 | Primary side control circuit and control method and isolated power supply conversion circuit |
| CN113125842A (en) * | 2019-12-31 | 2021-07-16 | 北汽福田汽车股份有限公司 | Undervoltage detection method and device, vehicle and electronic equipment |
| CN112730956B (en) * | 2020-12-18 | 2023-11-21 | 杭州士兰微电子股份有限公司 | Switching power supply, voltage detection circuit thereof and voltage detection method |
| CN114498563B (en) * | 2022-04-06 | 2022-07-15 | 深圳市芯茂微电子有限公司 | Protection method, circuit, device and medium for main power tube of switching power supply |
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