CN108563400B - Method and system for reducing wear of flash memory No. 0 block - Google Patents
Method and system for reducing wear of flash memory No. 0 block Download PDFInfo
- Publication number
- CN108563400B CN108563400B CN201810210361.7A CN201810210361A CN108563400B CN 108563400 B CN108563400 B CN 108563400B CN 201810210361 A CN201810210361 A CN 201810210361A CN 108563400 B CN108563400 B CN 108563400B
- Authority
- CN
- China
- Prior art keywords
- block
- management information
- writing
- mark
- module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0616—Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
Abstract
The invention provides a method for reducing wear of a flash memory No. 0 block, which comprises a writing step, wherein the writing step comprises the following steps: a mark writing step: writing a mark in a page of block No. 0; wherein, the 0 th block refers to the 0 th block in the flash memory; a management information writing step: writing management information in one page of the normal block after writing the mark; the common block is a storage block of a non-0 number block in the flash memory; page changing judgment: judging whether all pages of the block 0 are written in completely, if so, considering that the block 0 is fully written; and if not, the block No. 0 is paged and the step of writing the mark is returned to be executed. Correspondingly, the invention can improve the writing times of the flash memory No. 0 block.
Description
Technical Field
The invention relates to the technical field of storage, in particular to a method and a system for reducing abrasion of a flash memory number 0 block.
Background
Flash manufacturers generally guarantee the erase-write times of the newly shipped flash block 0, namely block 0. Block 0 is typically used to store management information for the entire flash memory, e.g., which blocks have data and which blocks are free, and the number of reads and writes for block 0 is typically much higher than for other blocks, but if block 0 fails, the entire flash memory fails, which is similar to track 0 of a hard disk. The invention aims to reduce the erasing frequency of the No. 0 block and reduce the abrasion of the No. 0 block. Patent document CN102789423B discloses a four-pool flash wear leveling method, which adopts a multi-pool storage management structure, introduces a wear rate concept, and is used to identify the degree of a block tending to a bad block, so as to more objectively reflect the wear of the block. The wear condition of the block can be more effectively reflected by combining the erasable times, and the wear balance of the NAND flash memory can be more accurately realized by the determined wear balance method. However, this patent document solves the problem of wear of the normal block, and cannot solve the problem of reducing the wear of the block No. 0.
Disclosure of Invention
In view of the defects in the prior art, the present invention provides a method and system for reducing number 0 blocks of a flash memory.
The method for reducing the abrasion of the flash memory No. 0 block comprises a writing step, wherein the writing step comprises the following steps:
a mark writing step: writing a mark in a page of block No. 0; wherein, the 0 th block refers to the 0 th block in the flash memory;
a management information writing step: writing management information in one page of the normal block after writing the mark; the common block is a storage block of a non-0 number block in the flash memory;
page changing judgment: judging whether all pages of the block 0 are written in completely, if so, considering that the block 0 is fully written; and if not, the block No. 0 is paged and the step of writing the mark is returned to be executed.
Preferably, the writing step further comprises the erasing step: and when the block 0 is fully written, erasing the block 0 and returning to the step of executing the mark writing.
Preferably, the flag represents validity of the corresponding management information;
the tag occupies 1 byte; after the block erase operation No. 0, it is marked as 0xFF, which represents that the corresponding management information is invalid.
Preferably, in the management information writing step, the management information is written four times per page of the normal block;
the four addresses of the management information are consecutive.
Preferably, the method further comprises a reading step, wherein the reading step comprises:
an indicia reading step: reading the mark;
and (3) error correction of the mark: error correction is carried out on the marks;
an effective judgment step: judging whether the corrected mark represents that the corresponding management information is effective or not, if so, returning to the mark reading step; if not, reading the adjacent previous management information;
and (3) correcting the management information: and correcting the management information.
The invention also provides a system for reducing the abrasion of the flash memory No. 0 block, which comprises a writing module, wherein the writing module comprises the following modules:
a mark writing module: writing a mark in a page of block No. 0; wherein, the 0 th block refers to the 0 th block in the flash memory;
a management information writing module: writing management information in one page of the normal block after writing the mark; the common block is a storage block of a non-0 number block in the flash memory;
a page change judgment module: judging whether all pages of the block 0 are written in completely, if so, considering that the block 0 is fully written; and if not, the block No. 0 is paged and returns to execute the mark writing module.
Preferably, the writing module further comprises an erasing module: and when the block 0 is fully written, erasing the block 0 and returning to the execution mark writing module.
Preferably, the flag represents validity of the corresponding management information;
the tag occupies 1 byte; after the block erase operation No. 0, it is marked as 0xFF, which represents that the corresponding management information is invalid.
Preferably, in the management information writing module, the management information is written four times per page of the normal block;
the four addresses of the management information are consecutive.
Preferably, the device further comprises a reading module, wherein the reading module comprises:
an indicia reading module: reading the mark;
a mark error correction module: error correction is carried out on the marks;
an effective judgment module: judging whether the corrected mark represents that the corresponding management information is effective or not, if so, returning to the mark reading module; if not, reading the adjacent previous management information;
the management information error correction module: and correcting the management information.
Compared with the prior art, the invention has the following beneficial effects:
1. taking a 4Gbit flash memory as an example, manufacturers guarantee that the erasing and writing times of the 0 block is more than 1024 times, and if the method of the invention is not adopted, the 0 block may fail after 1024 times, which causes the failure of the whole flash memory. The 4Gbit flash memory has 64 pages per block, and each page can be written four times with continuous addresses, and if the method of the present invention is adopted, the writing times are 64 × 4 times 256 times of the original writing times.
2. If the method of the invention is not adopted, the memory is used in the common method, the flash memory is not written in the common condition, and the flash memory is written before the power-off, and the problem of the method is that if the power-off is accidentally cut off, the management information is damaged because the flash memory is not written in time.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
FIG. 1 is a diagram illustrating a method for reducing wear of flash block 0;
FIG. 2 is a flow chart of a write step;
FIG. 3 is a flowchart of a read step;
FIG. 4 is a block diagram of a system for reducing wear of flash block 0.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that variations and modifications can be made by persons skilled in the art without departing from the spirit of the invention. All falling within the scope of the present invention.
Block 0, of a typical flash memory guarantees 1024 erasures and writes, all bits are 1 after erasure, and allows each page to be addressed four times in succession. The system for reducing the abrasion of the flash memory No. 0 block comprises a writing module, wherein the writing module comprises: a mark writing module: writing a mark in a page of block No. 0; wherein, the 0 th block refers to the 0 th block in the flash memory; a management information writing module: writing management information in one page of the normal block after writing the mark; the common block is a storage block of a non-0 number block in the flash memory; a page change judgment module: judging whether all pages of the block 0 are written in completely, if so, considering that the block 0 is fully written; and if not, the block No. 0 is paged and returns to execute the mark writing module. Preferably, the method further comprises the following steps: and when the block 0 is fully written, erasing the block 0 and returning to the execution mark writing module. The flag occupies 1 byte and represents the validity of the corresponding management information. Since all bits are 1 after block erase and before write, 0xFF represents that the following management information is invalid. The effective value representing the corresponding management information can be selected within a certain range as long as the error correction algorithm can be ensured. In the management information writing module, writing four times of management information into each page of the common block; the four addresses of the management information are consecutive.
The system for reducing the abrasion of the flash memory No. 0 block also comprises a reading module, wherein the reading module comprises: an indicia reading module: reading the mark; a mark error correction module: error correction is carried out on the marks; an effective judgment module: judging whether the corrected mark represents that the corresponding management information is effective or not, if so, returning to the mark reading module; if not, reading the adjacent previous management information; the management information error correction module: and correcting the management information. Preferably, the error correction of the mark can be implemented by selecting one bit of the mark, 0 for valid, 1 for invalid, and selecting two bits for 3-mode redundancy. Preferably, the management information adopts a hamming code method.
The system for reducing wear of the flash memory No. 0 block can be realized by the steps and flows of the method for reducing wear of the flash memory No. 0 block provided by the invention, and a person skilled in the art can understand the method for reducing wear of the flash memory No. 0 block as a specific embodiment of the system for reducing wear of the flash memory No. 0 block.
The invention also provides a method for reducing the abrasion of the flash memory No. 0 block, as shown in FIG. 1, comprising a writing step, wherein the writing step comprises: a mark writing step: writing a mark in a page of block No. 0; wherein, the 0 th block refers to the 0 th block in the flash memory; a management information writing step: writing management information in one page of the normal block after writing the mark; the common block is a storage block of a non-0 number block in the flash memory; page changing judgment: judging whether all pages of the block 0 are written in completely, if so, considering that the block 0 is fully written; and if not, the block No. 0 is paged and the step of writing the mark is returned to be executed. Further comprising an erasing step: and when the block 0 is fully written, erasing the block 0 and returning to the step of executing the mark writing. The flag represents validity of the corresponding management information; the tag occupies 1 byte; after the erase operation of the block No. 0, marking the block as 0xFF, representing that the corresponding management information is invalid in the management information writing step, and writing the management information into each page of the common block four times; the four addresses of the management information are consecutive. The method for reducing the abrasion of the flash memory No. 0 block further comprises a reading step, wherein the reading step comprises the following steps: an indicia reading step: reading the mark; and (3) error correction of the mark: error correction is carried out on the marks; an effective judgment step: judging whether the corrected mark represents that the corresponding management information is effective or not, if so, returning to the mark reading step; if not, reading the adjacent previous management information; and (3) correcting the management information: and correcting the management information.
Those skilled in the art will appreciate that, in addition to implementing the system and its various devices, modules, units provided by the present invention as pure computer readable program code, the system and its various devices, modules, units provided by the present invention can be fully implemented by logically programming method steps in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like. Therefore, the system and various devices, modules and units thereof provided by the invention can be regarded as a hardware component, and the devices, modules and units included in the system for realizing various functions can also be regarded as structures in the hardware component; means, modules, units for performing the various functions may also be regarded as structures within both software modules and hardware components for performing the method.
The foregoing description of specific embodiments of the present invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes and modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention.
Claims (10)
1. A method for reducing wear of flash block No. 0, comprising a writing step, said writing step comprising the steps of:
a mark writing step: writing a mark in a page of block No. 0; wherein, the 0 th block refers to the 0 th block in the flash memory; the No. 0 block of the flash memory, namely the No. 0 block, ensures 1024 times of erasing and writing, all bits are 1 after erasing, and each page is allowed to be continuously written with addresses for four times;
a management information writing step: writing management information in one page of the normal block after writing the mark; the common block is a storage block of a non-0 number block in the flash memory; the addresses of the four pieces of management information are continuous;
page changing judgment: judging whether all pages of the block 0 are written in completely, if so, considering that the block 0 is fully written; if not, the block No. 0 is paged and the step of writing the mark is returned to;
in the management information writing module, management information is written four times per page of the normal block.
2. The method of claim 1, wherein the writing step further comprises the erasing step of: and when the block 0 is fully written, erasing the block 0 and returning to the step of executing the mark writing.
3. The method of reducing wear of flash block No. 0 of claim 2, wherein the flag represents validity of the corresponding management information;
the tag occupies 1 byte; after the block erase operation No. 0, it is marked as 0xFF, which represents that the corresponding management information is invalid.
4. The method of reducing wear of block 0 of flash memory according to claim 1, wherein in the management information writing step, the management information is written four times per page of the normal block;
the four addresses of the management information are consecutive.
5. The method of claim 3, further comprising a reading step, wherein the reading step comprises:
an indicia reading step: reading the mark;
and (3) error correction of the mark: error correction is carried out on the marks;
an effective judgment step: judging whether the corrected mark represents that the corresponding management information is effective or not, if so, returning to the mark reading step; if not, reading the adjacent previous management information;
and (3) correcting the management information: and correcting the management information.
6. A system for reducing wear of flash block No. 0, comprising a write module, the write module comprising:
a mark writing module: writing a mark in a page of block No. 0; wherein, the 0 th block refers to the 0 th block in the flash memory; the No. 0 block of the flash memory, namely the No. 0 block, ensures 1024 times of erasing and writing, all bits are 1 after erasing, and each page is allowed to be continuously written with addresses for four times;
a management information writing module: writing management information in one page of the normal block after writing the mark; the common block is a storage block of a non-0 number block in the flash memory; the addresses of the four pieces of management information are continuous;
a page change judgment module: judging whether all pages of the block 0 are written in completely, if so, considering that the block 0 is fully written; if not, the block No. 0 is paged and returns to execute the mark writing module;
in the management information writing module, management information is written four times per page of the normal block.
7. The system of claim 6, wherein the write module further comprises an erase module to: and when the block 0 is fully written, erasing the block 0 and returning to the execution mark writing module.
8. The system for reducing wear of flash block 0 of claim 7, wherein said flag represents validity of corresponding management information;
the tag occupies 1 byte; after the block erase operation No. 0, it is marked as 0xFF, which represents that the corresponding management information is invalid.
9. The system for reducing wear of block 0 of flash memory according to claim 6, wherein in said management information writing module, management information is written four times per page of a normal block;
the four addresses of the management information are consecutive.
10. The system for reducing wear of flash block No. 0 of claim 8, further comprising a read module, said read module comprising:
an indicia reading module: reading the mark;
a mark error correction module: error correction is carried out on the marks;
an effective judgment module: judging whether the corrected mark represents that the corresponding management information is effective or not, if so, returning to the mark reading module; if not, reading the adjacent previous management information;
the management information error correction module: and correcting the management information.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810210361.7A CN108563400B (en) | 2018-03-14 | 2018-03-14 | Method and system for reducing wear of flash memory No. 0 block |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810210361.7A CN108563400B (en) | 2018-03-14 | 2018-03-14 | Method and system for reducing wear of flash memory No. 0 block |
Publications (2)
Publication Number | Publication Date |
---|---|
CN108563400A CN108563400A (en) | 2018-09-21 |
CN108563400B true CN108563400B (en) | 2021-05-11 |
Family
ID=63532718
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810210361.7A Active CN108563400B (en) | 2018-03-14 | 2018-03-14 | Method and system for reducing wear of flash memory No. 0 block |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN108563400B (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101727395A (en) * | 2008-10-17 | 2010-06-09 | 深圳市朗科科技股份有限公司 | Flash memory device and management system and method thereof |
US20110264847A1 (en) * | 2010-04-21 | 2011-10-27 | Silicon Motion, Inc. | Data Writing Method and Data Storage Device |
CN202472635U (en) * | 2012-03-23 | 2012-10-03 | 山东华芯半导体有限公司 | Flash memory wear leveling device |
CN102890656A (en) * | 2012-09-25 | 2013-01-23 | Tcl光电科技(惠州)有限公司 | Method for improving service life of FLASH |
-
2018
- 2018-03-14 CN CN201810210361.7A patent/CN108563400B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101727395A (en) * | 2008-10-17 | 2010-06-09 | 深圳市朗科科技股份有限公司 | Flash memory device and management system and method thereof |
US20110264847A1 (en) * | 2010-04-21 | 2011-10-27 | Silicon Motion, Inc. | Data Writing Method and Data Storage Device |
CN202472635U (en) * | 2012-03-23 | 2012-10-03 | 山东华芯半导体有限公司 | Flash memory wear leveling device |
CN102890656A (en) * | 2012-09-25 | 2013-01-23 | Tcl光电科技(惠州)有限公司 | Method for improving service life of FLASH |
Non-Patent Citations (1)
Title |
---|
基于随机游走的大容量固态硬盘磨损均衡算法;赵鹏等;《计算机学报》;20120531;第35卷(第5期);第972-978页 * |
Also Published As
Publication number | Publication date |
---|---|
CN108563400A (en) | 2018-09-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110147295B (en) | Method for accessing flash memory module, flash memory controller and memory device | |
US10592410B2 (en) | Backup mechanism of writing sequential data to single-level cell buffer and multi-level cell buffer | |
US20180260317A1 (en) | Method for managing the copying and storing of data in garbage collection, memory storage device and memory control circuit unit using the same | |
EP2367110B1 (en) | Emerging bad block detection | |
TWI527037B (en) | Data storing method, memory control circuit unit and memory storage apparatus | |
US10540276B2 (en) | Method of processing data based on erase operations of logical pages related to data compression rate of mapping table in data storage device | |
US8510637B2 (en) | Data reading method, memory storage apparatus and memory controller thereof | |
US8453021B2 (en) | Wear leveling in solid-state device | |
US9996462B1 (en) | Data storage device and data maintenance method thereof | |
US9201785B2 (en) | Data writing method, memory controller and memory storage apparatus | |
US9058256B2 (en) | Data writing method, memory controller and memory storage apparatus | |
US7725646B2 (en) | Method of using a flash memory for a circular buffer | |
US8516184B2 (en) | Data updating using mark count threshold in non-volatile memory | |
US20110029808A1 (en) | System and method of wear-leveling in flash storage | |
TWI435329B (en) | Flash memory management method and flash memory controller and storage system using the same | |
CN109582216B (en) | Data storage device and data processing method of memory device | |
US20190034290A1 (en) | Method and System for Improving Open Block Data Reliability | |
US20100115325A1 (en) | Method for accessing a flash memory, and associated memory device and controller thereof | |
TWI460586B (en) | Data storage device and operating method for flash memory | |
TWI459198B (en) | Memory storage device, memory controller thereof, and method for identifying valid data | |
US9383929B2 (en) | Data storing method and memory controller and memory storage device using the same | |
WO2019136968A1 (en) | Method for protecting data array and restoring flash memory internal data | |
US20200073582A1 (en) | Flash memory controller and associated accessing method and electronic device | |
CN104252317A (en) | Data writing method, memory controller and memory storage device | |
CN102800357A (en) | Program code loading and accessing methods, memory controller and storage device of memory |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |