CN108550625B - Thin film transistor and manufacturing method thereof - Google Patents
Thin film transistor and manufacturing method thereof Download PDFInfo
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- CN108550625B CN108550625B CN201810350248.9A CN201810350248A CN108550625B CN 108550625 B CN108550625 B CN 108550625B CN 201810350248 A CN201810350248 A CN 201810350248A CN 108550625 B CN108550625 B CN 108550625B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention provides a thin film transistor and a manufacturing method thereof, wherein the thin film transistor comprises an ohmic layer, the ohmic layer comprises a first part, a second part and a third part, the second part is positioned between the first part and the third part, the second part of the ohmic layer corresponds to a groove of a second metal, and the second part of the ohmic layer is oxidized into an ohmic protection layer through an annealing process, so that the first part and the third part of the ohmic layer are isolated, and the stability of the thin film transistor is improved; in addition, the titanium dioxide doped with niobium metal, aluminum metal or a mixture of niobium metal and aluminum metal is adopted to manufacture the ohmic layer, so that a back channel of the thin film transistor is not easy to damage, and meanwhile, the metal concentration in the ohmic layer is adjustable, so that the good conductivity of the thin film transistor is ensured, and the electrical stability of the thin film transistor is improved.
Description
Technical Field
The invention relates to the field of display panel manufacturing, in particular to a thin film transistor and a manufacturing method thereof.
Background
LCD (Liquid crystal display) is a widely used flat panel display, and mainly uses Liquid crystal switches to modulate the light field intensity of a backlight source to realize image display. The LCD display device includes a Thin Film Transistor (TFT) device, and a TFT-LCD, i.e., a Thin Film Transistor liquid crystal display (TFT-LCD), each liquid crystal pixel on the display device is driven by a TFT integrated behind the TFT, so that the TFT-LCD has the characteristics of high response speed, high brightness, high contrast, small size, low power consumption, no radiation, etc., and is dominant in the current display market.
Among the common TFT driving categories, there are a-Si TFTs (amorphous silicon), LTPS TFTs (low temperature polysilicon), and IGZO TFTs (indium gallium zinc oxide). Briefly, IGZO is a new semiconductor material, has higher electron mobility and on-state current than amorphous silicon (a-Si), and is widely used in TFT devices in the display industry. IGZO is used as a channel material in a new generation of high performance Thin Film Transistors (TFTs), thereby improving display panel resolution and making large screen OLED (organic light emitting diode) televisions possible.
However, the currently commonly used BCE (Back Channel Etching) bottom gate IGZO TFT has a simpler structure, but the Back Channel process thereof is difficult to manufacture, and the conventional method is as follows: (1) dry etching, which reduces the electrical stability of the TFT; (2) wet etching, such as with hydrogen peroxide, is not suitable for large-scale production; (3) by adding an ESL (etching stop layer) protective layer, the structure is complicated, but the method is the best choice in practical production. The invention therefore proposes an improvement over the prior art, primarily according to a third approach.
Disclosure of Invention
The invention provides a thin film transistor and a manufacturing method thereof, aiming at overcoming the defect of poor electrical stability of the existing thin film transistor.
In order to achieve the purpose, the technical scheme provided by the invention is as follows:
the invention provides a manufacturing method of a thin film transistor, wherein the manufacturing method of the thin film transistor comprises the following steps:
s10, providing a substrate, forming a first metal layer on the substrate, and using a first photomask to pattern the first metal layer to form a grid electrode of the thin film transistor;
s20, sequentially forming a gate insulating layer, an active layer and an ohmic layer on the gate electrode,
wherein the ohmic layer includes a first portion, a second portion and a third portion, the second portion being the ohmic protection layer, the second portion being located between the first portion and the third portion;
s30, forming a second metal layer on the ohmic layer, and using a second photomask to pattern the second metal layer to form a source drain electrode of the thin film transistor;
s40, forming an ohmic protection layer on part of the ohmic layer by adopting a preset process;
and S50, forming a passivation layer on the source and drain electrodes, forming a passivation layer through hole on the passivation layer by using a third photomask, and forming a pixel electrode pattern.
According to a preferred embodiment of the present invention, the ohmic layer is made of a metal-doped oxide film.
According to a preferred embodiment of the present invention, the ohmic layer is made of a titanium oxide film doped with niobium, aluminum or a mixture thereof.
According to a preferred embodiment of the present invention, the active layer and the ohmic layer are formed by a same photo-masking process.
According to a preferred embodiment of the present invention, the step S30 includes:
step S301, depositing the second metal layer on the surface of the substrate base plate;
step S302, coating a photoresist layer on the second metal layer;
step S303, after the photoresist layer is exposed and developed, etching the second metal layer to form a source electrode and a drain electrode of the thin film transistor,
wherein the second metal layer on the second portion of the ohmic layer is removed;
step S304, stripping the photoresist layer.
The present invention also provides a thin film transistor, wherein the thin film transistor includes:
a substrate base plate;
a first metal layer formed on the substrate base plate;
the grid insulating layer is formed on the substrate base plate and covers the first metal layer;
an active layer formed on the gate insulating layer;
an ohmic layer formed on the active layer, the ohmic layer including a first portion, a second portion and a third portion, the second portion being the ohmic protection layer, the second portion being located between the first portion and the third portion;
a second metal layer formed on the substrate, covering the gate insulating layer and the first and third portions of the ohmic layer;
a passivation layer formed on the substrate base plate and covering the second metal layer and the second portion of the ohmic layer, the passivation layer including a passivation layer via hole;
and the pixel electrode layer is formed on the passivation layer and is electrically connected with the second metal layer through the passivation layer through hole.
According to a preferred embodiment of the present invention, the ohmic layer is made of a metal-doped oxide film.
According to a preferred embodiment of the present invention, the ohmic layer is made of a titanium oxide film doped with niobium, aluminum or a mixture thereof.
According to a preferred embodiment of the present invention, the active layer and the ohmic layer are formed by a same photo-masking process.
According to a preferred embodiment of the present invention, the second portion of the ohmic layer is processed by an annealing process to form the ohmic protection layer.
The invention has the beneficial effects that: according to the invention, the titanium dioxide doped with niobium metal, aluminum metal or a mixture of niobium metal and aluminum metal is adopted to manufacture the ohmic layer, so that a back channel of the thin film transistor is not easy to damage; in addition, the metal concentration in the ohmic layer is adjustable, so that the good conductivity of the thin film transistor is ensured, and the electrical stability of the thin film transistor is improved.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a flow chart of a method for fabricating a thin film transistor array substrate according to the present invention;
FIGS. 2A to 2J are process flow diagrams of a method for manufacturing a thin film transistor array substrate according to the present invention;
fig. 3 is a film structure diagram of a thin film transistor according to the present invention.
Detailed Description
The following description of the various embodiments refers to the accompanying drawings that illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], are only referring to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention. In the drawings, elements having similar structures are denoted by the same reference numerals.
Fig. 1 is a flow chart showing steps of a method for manufacturing a thin film transistor according to a preferred embodiment of the present invention, wherein the method includes the steps of:
s10, providing a substrate, forming a first metal layer on the substrate, and using a first photomask to pattern the first metal layer to form a grid electrode of the thin film transistor;
as shown in fig. 2A, a substrate 101 is first provided, and the raw material of the substrate 101 may be one of a glass substrate, a quartz substrate, a resin substrate, and the like;
as shown in fig. 2B, a first metal layer 102 is deposited on the substrate 101, wherein the thickness of the first metal layer 102 is generally selected from 400 to 1500 angstroms, and the deposition method can be physical vapor deposition; in addition, the metal material may be metal such as molybdenum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, or copper, and a combination structure of these materials may also be used;
as shown in fig. 2C, a first photo-mask process is applied to the first metal layer 102, a first photoresist layer is coated on the first metal layer 102, a mask is used to perform a patterning process including exposure, development and first etching, so that the first metal layer 102 forms a gate of the thin film transistor, and the first photoresist layer is stripped.
S20, sequentially forming a gate insulating layer, an active layer and an ohmic layer on the gate electrode,
wherein the ohmic layer includes a first portion, a second portion and a third portion, the second portion being the ohmic protection layer, the second portion being located between the first portion and the third portion;
as shown in fig. 2D, a gate insulating layer 103 is formed on the gate 101, and the gate insulating layer 103 covers the first metal layer 102 and the substrate 101, in this embodiment, the material of the gate insulating layer 103 is silicon nitride, silicon oxide, silicon oxynitride, or the like, preferably, the thickness of the gate insulating layer 103 deposited is generally 1500 to 4000 angstroms;
as shown in fig. 2E, an active layer 104 and an ohmic layer 105 are sequentially coated on the gate insulating layer 103, the thickness of the active layer 104 deposited is generally less than 500 angstroms, and the thickness of the ohmic layer 105 deposited is generally 1 to 500 nanometers; secondly, the active layer 104 and the ohmic layer 105 simultaneously use a third photo-masking process to coat a second photoresist layer on the ohmic layer 105, and a mask plate is adopted to carry out the composition process treatment of exposure, development and second etching, so that the active layer 104 and the ohmic layer 105 simultaneously form a predetermined pattern, and the second photoresist layer is stripped;
as shown in fig. 2F, the ohmic layer 105 includes a first portion 106, a second portion 107 and a third portion 108, the second portion 107 being located between the first portion 106 and the third portion 108; in a preferred embodiment of the present invention, the ohmic layer 105 is made of a titanium dioxide oxide film doped with a metal, the metal doped in the ohmic layer 105 is niobium, aluminum or a mixture of niobium and aluminum, the conductivity of the ohmic layer 105 can be adjusted according to the concentration of the doped metal, and the ohmic layer 105 made of the titanium dioxide oxide film has high acid resistance, so that the corrosion of the ohmic layer 105 by a subsequent etching process is reduced for a process using wet etching.
S30, forming a second metal layer on the ohmic layer, and using a second photomask to pattern the second metal layer to form a source drain electrode of the thin film transistor;
as shown in fig. 2G, the second metal layer 109 is formed on the ohmic layer 105, and both the first metal layer 102 and the second metal layer 109 may be deposited by sputtering, in this embodiment, the thickness of the second metal layer 109 is generally selected to be 400 to 1500 angstroms; the material of the second metal layer 109 may be the same as or different from the material of the first metal layer 102, and the metal material may be a metal such as molybdenum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, or copper, or a combination of these materials may be used;
secondly, a second photomask manufacturing process is used for the second metal layer 109, a third light resistance layer is coated on the second metal layer 109, a mask plate is adopted to carry out exposure, development and third etching composition process treatment, so that the second metal layer 109 forms a source electrode and a drain electrode of the thin film transistor, and the third light resistance layer is stripped;
in the third etching process, a groove 110 is formed in the second metal layer 109, the groove 110 corresponds to the second portion 107 of the ohmic layer 105, in this embodiment, the first portion 106 of the ohmic layer 105 is electrically connected to one of the source and the drain of the thin film transistor, and the third portion 108 of the ohmic layer 105 is electrically connected to the other of the source and the drain of the thin film transistor.
S40, forming an ohmic protection layer on part of the ohmic layer by adopting a preset process;
as shown in fig. 2H, the second metal layer 109 is subjected to the third etching process to form a recess 110, thereby exposing the second portion 107 of the ohmic layer 105; in this embodiment, an annealing process may be selected to process the second portion 107 of the ohmic layer 105, and the annealing process is mainly performed with oxygen, nitrous oxide or a combination thereof to form the ohmic protection layer 111, so that the ohmic layer 105 is oxidized to reduce resistivity and become an insulator, thereby functioning as an etching stop protection layer.
S50, forming a passivation layer on the source and drain electrodes, forming a passivation layer through hole on the passivation layer by using a third photomask, and forming a pixel electrode pattern;
as shown in fig. 2I, a passivation layer 112 is formed on the source/drain electrode, and the passivation layer 112 covers the second metal layer 109 and the ohmic protection layer 111 completely, preferably, the material of the passivation layer 112 is usually a silicon nitride compound, a silicon oxide compound or a mixture of the two, and the thickness of the passivation layer 112 deposited is generally 1500 to 4000 angstrom; in this step, a fourth photo-mask process is mainly used for the passivation layer 112, a mask plate is adopted to perform patterning process treatment through exposure, development and fourth etching, and a passivation layer via hole 113 is formed on the passivation layer 112;
as shown in fig. 2J, a solution type transparent metal is coated on the passivation layer 112, the transparent metal is connected to the second metal layer 109 of the thin film transistor through the passivation layer via 113, and the solution type transparent metal is cured by removing a solvent in the transparent metal solution by baking or the like, such as annealing, to form a pixel electrode layer 114 of the thin film transistor.
The invention provides a manufacturing method of a thin film transistor, wherein an ohmic layer is manufactured by adopting titanium dioxide doped with metal niobium, aluminum or a mixture of the metal niobium and the aluminum, so that a back channel of the thin film transistor is not easy to be damaged; the ohmic layer comprises a first part, a second part and a third part, the second part is positioned between the first part and the third part, the second part of the ohmic layer corresponds to the groove of the second metal, and the second part of the ohmic layer is oxidized into an ohmic protection layer through an annealing process, so that the first part and the third part of the ohmic layer are isolated, and the stability of the thin film transistor is improved; in addition, the metal concentration in the ohmic layer is adjustable, so that the good conductivity of the thin film transistor is ensured, and the electrical stability of the thin film transistor is improved.
Fig. 3 is a diagram illustrating a film structure of a thin film transistor according to a preferred embodiment of the present invention, wherein the thin film transistor includes:
a substrate base 201, wherein the raw material of the substrate base 201 can be one of a glass base plate, a quartz base plate, a resin base plate and the like;
the thickness of the first metal layer 202 is generally selected to be 400-1500 angstroms, and the deposition mode can be physical vapor deposition; in addition, the metal material may be metal such as molybdenum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, or copper, and a combination structure of these materials may also be used; forming a gate electrode and a gate line of the thin film transistor by the first metal layer 202 through a first photomask manufacturing process;
the gate insulating layer 203 covers the first metal layer 202 and the substrate 201, in this embodiment, the gate insulating layer 203 is made of silicon nitride, silicon oxide, silicon oxynitride, or the like, and preferably, the gate insulating layer 203 is deposited with a thickness of 1500 to 4000 angstroms;
an active layer 204, wherein the thickness of the active layer 204 is generally less than 500 angstroms, the active layer 204 is IGZO, but not limited to IGZO, and may be an oxide semiconductor satisfying the process;
the thickness of the ohmic layer deposition is generally 1-500 nanometers, and the active layer 204 and the ohmic layer are manufactured by adopting the same photomask manufacturing process; in addition, the ohmic layer includes a first portion 206, a second portion (also shown as an ohmic protection layer 211), and a third portion 208, the second portion being located between the first portion 206 and the third portion 208; in a preferred embodiment of the present invention, the ohmic layer is made of a titanium dioxide oxide film doped with a metal, the metal doped in the ohmic layer is niobium, aluminum or a mixture of niobium and aluminum, the conductivity of the ohmic layer can be adjusted according to the concentration of the doped metal, and the ohmic layer made of the titanium dioxide oxide film has high acid resistance, so that the corrosion of the ohmic layer by a subsequent etching process is reduced for a process using wet etching.
The second metal layer 209, the first metal layer 202 and the second metal layer 209 may all be deposited by a sputtering method, in this embodiment, the thickness of the second metal layer 209 is generally selected to be 400 to 1500 angstroms; forming a source electrode and a drain electrode of the thin film transistor by the second metal layer 209 through a second photomask manufacturing process; in addition, in the second photo-mask process, the second metal layer 209 has a groove corresponding to the second portion of the ohmic layer, in this embodiment, the first portion 206 of the ohmic layer is electrically connected to one of the source and the drain of the thin film transistor, and the third portion 208 of the ohmic layer is electrically connected to the other of the source and the drain of the thin film transistor.
The ohmic protection layer 211, i.e., the second portion of the ohmic layer, may be treated with an annealing process, which is performed with oxygen, nitrous oxide, or a combination thereof as a primary treatment to form the ohmic protection layer 211; the resistivity of the oxidized ohmic layer is weakened to become an insulator, so that the ohmic layer can play a role of an etching barrier protective layer.
A passivation layer 212, wherein the passivation layer 212 covers the second metal layer 209 and the ohmic protection layer 211 completely, preferably, the material of the passivation layer 212 is usually a silicon nitride compound, a silicon oxide compound or a mixture of the two, the thickness of the passivation layer 212 is generally 1500-4000 angstroms, and a passivation layer via hole is formed on the passivation layer 212;
and a pixel electrode layer 214 formed on the passivation layer 212 and electrically connected to the second metal layer 209 of the thin film transistor through a passivation layer via hole, wherein the pixel electrode layer 214 is a transparent metal.
The invention provides a thin film transistor, which comprises a substrate, a first metal layer, a gate insulating layer, an active layer, an ohmic layer, a second metal layer, an ohmic protection layer, a passivation layer and a pixel electrode layer, wherein the ohmic layer comprises a first part, a second part and a third part, the second part is positioned between the first part and the third part, the second part of the ohmic layer corresponds to a groove of a second metal, the second part of the ohmic layer is oxidized into the ohmic protection layer through an annealing process, the first part and the third part of the ohmic layer are isolated, and the stability of the thin film transistor is improved; in addition, the titanium dioxide doped with niobium metal, aluminum metal or a mixture of niobium metal and aluminum metal is adopted to manufacture the ohmic layer, so that a back channel of the thin film transistor is not easy to damage, and meanwhile, the metal concentration in the ohmic layer is adjustable, so that the good conductivity of the thin film transistor is ensured, and the electrical stability of the thin film transistor is improved.
In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.
Claims (5)
1. A method for manufacturing a thin film transistor is characterized by comprising the following steps:
s10, providing a substrate, forming a first metal layer on the substrate, and using a first photomask to pattern the first metal layer to form a grid electrode of the thin film transistor;
s20, sequentially forming a gate insulating layer, an active layer and an ohmic layer on the gate electrode,
s30, forming a second metal layer on the ohmic layer, and using a second photomask to pattern the second metal layer to form a source drain electrode of the thin film transistor;
s40, forming an ohmic protection layer on part of the ohmic layer by adopting a preset process;
s50, forming a passivation layer on the source and drain electrodes, forming a passivation layer through hole on the passivation layer by using a third photomask, and forming a pixel electrode pattern;
wherein the ohmic layer comprises a first portion, a second portion and a third portion, the second portion is the ohmic protection layer, the second portion is located between the first portion and the third portion, and the ohmic layer is made of a titanium dioxide oxide film doped with niobium, aluminum or a mixture of the two;
the second portion of the ohmic layer is annealed in an atmosphere of oxygen, nitrous oxide, or a combination thereof to form the ohmic protection layer.
2. The method of claim 1, wherein the active layer and the ohmic layer are formed by a same photo-masking process.
3. The method for manufacturing a thin film transistor according to claim 1, wherein the step S30 includes:
step S301, depositing the second metal layer on the surface of the substrate base plate;
step S302, coating a photoresist layer on the second metal layer;
step S303, after the photoresist layer is exposed and developed, etching the second metal layer to form a source electrode and a drain electrode of the thin film transistor,
wherein the second metal layer on the second portion of the ohmic layer is removed;
step S304, stripping the photoresist layer.
4. A thin film transistor manufactured by the manufacturing method of a thin film transistor according to any one of claims 1 to 3, comprising:
a substrate base plate;
a first metal layer formed on the substrate base plate;
the grid insulating layer is formed on the substrate base plate and covers the first metal layer;
an active layer formed on the gate insulating layer;
an ohmic layer formed on the active layer, the ohmic layer including a first portion, a second portion and a third portion, the second portion being an ohmic protection layer, the second portion being located between the first portion and the third portion, the ohmic layer being made of a titanium dioxide oxide film doped with niobium, aluminum or a mixture thereof, the second portion of the ohmic layer being annealed in an atmosphere of oxygen, nitrous oxide or a combination thereof to form the ohmic protection layer;
a second metal layer formed on the substrate, covering the gate insulating layer and the first and third portions of the ohmic layer;
a passivation layer formed on the substrate base plate and covering the second metal layer and the second portion of the ohmic layer, the passivation layer including a passivation layer via hole;
and the pixel electrode layer is formed on the passivation layer and is electrically connected with the second metal layer through the passivation layer through hole.
5. The thin film transistor of claim 4, wherein the active layer and the ohmic layer are formed by a same photo-masking process.
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| CN109638034B (en) * | 2018-11-06 | 2021-04-27 | 深圳市华星光电半导体显示技术有限公司 | Method for manufacturing display panel |
| CN109920855B (en) * | 2019-02-13 | 2020-11-03 | 深圳市华星光电半导体显示技术有限公司 | Thin film transistor and manufacturing method thereof |
| CN109888020A (en) * | 2019-02-21 | 2019-06-14 | 深圳市华星光电技术有限公司 | Thin film transistor (TFT) and its manufacturing method |
| CN110098259A (en) * | 2019-04-10 | 2019-08-06 | 深圳市华星光电技术有限公司 | Amorphous silicon film transistor and preparation method thereof |
| CN111025800B (en) * | 2019-12-06 | 2021-06-01 | Tcl华星光电技术有限公司 | Display panel and preparation method thereof |
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| CN101673770A (en) * | 2008-09-09 | 2010-03-17 | 富士胶片株式会社 | Thin film field-effect transistor and display using the same |
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| CN101673770A (en) * | 2008-09-09 | 2010-03-17 | 富士胶片株式会社 | Thin film field-effect transistor and display using the same |
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