CN108538867B - Image sensor and sensing pixel array - Google Patents
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- CN108538867B CN108538867B CN201710118844.XA CN201710118844A CN108538867B CN 108538867 B CN108538867 B CN 108538867B CN 201710118844 A CN201710118844 A CN 201710118844A CN 108538867 B CN108538867 B CN 108538867B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
- H01L27/14605—Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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Abstract
The invention discloses a sensing pixel array used for an image sensor, which comprises a plurality of sensing pixel units, wherein each sensing pixel unit at least comprises a photodiode element, a column reset transistor, a buffer transistor and a column control transistor, the photodiode element converts light to generate a sensing signal, the column reset transistor is coupled to a reference reset signal, the photodiode element and is controlled by the column reset signal, the buffer transistor is coupled to the output of the photodiode element to buffer and receive the sensing signal, the column control transistor is electrically connected to the control end of the buffer transistor or the output of the buffer transistor and used as a switch and switched to be an open circuit or a closed circuit according to the column control signal corresponding to the sensing pixel unit, and when the column reset transistor is switched on, whether the charge of the reference reset signal is transferred to a temporary storage capacitor or not is controlled.
Description
Technical Field
The present invention relates to an image sensing mechanism, and more particularly, to an image sensor and a sensing pixel array with a novel structure.
Background
Generally speaking, for the conventional sensing pixel unit structure, the operation of reading the sensing signal charges and resetting the signal charges of a sensing pixel unit uses a plurality of sets of capacitors to temporarily store the charges, each set of capacitors includes two capacitors, for example, when a row selection signal selects a row (row), the sensing signal charges of multiple sensing pixel units on the same row are read to one of the capacitors in the multiple sets of capacitors at the same time, then, the sensing pixel units are reset simultaneously, and the reset signal charges of the sensing pixel units on the same row are read to another capacitor of the plurality of sets of capacitors simultaneously, therefore, for the conventional sensing pixel unit structure, the design of the reading circuit necessarily requires multiple sets of capacitors, resulting in a larger actual circuit area, which is not in line with the trend of gradually decreasing design of the circuit area.
Disclosure of Invention
It is therefore one of the objectives of the claimed invention to provide a novel image sensor and sensing pixel array to solve the problems of the prior art.
According to an embodiment of the present invention, an image sensor is disclosed, which comprises a plurality of sensing pixel units and a processing circuit, wherein a sensing pixel unit at least comprises a photodiode element, a row reset transistor, a buffer transistor, a register circuit and a column control transistor. The photodiode element is used for converting the light to generate a sensing signal. The row reset transistor has a first terminal coupled to a reference reset signal, a second terminal coupled to the photodiode element, and a control terminal controlled by a row reset signal. The buffer transistor has a control terminal coupled to an output of the photodiode element for buffering the received sensing signal. The temporary storage capacitor is electrically coupled between the buffer transistor and a ground level for temporarily storing the charge of the sensing signal. The column control transistor is electrically connected to the control terminal of the buffer transistor or an output of the buffer transistor, and is used as a switch to be switched to an open circuit or a closed circuit according to a column control signal corresponding to the sensing pixel unit, and when the column reset transistor is turned on, the column control transistor controls whether to transfer the charge of the reference reset signal to the temporary storage capacitor. The processing circuit is coupled to the sensing pixel units and used for generating the column reset signal and the column control signal.
According to an embodiment of the present invention, a sensing pixel array for an image sensor is disclosed, the sensing pixel array includes a plurality of sensing pixel units, each of the sensing pixel units at least includes a photodiode element, a row reset transistor, a buffer transistor, a register circuit and a column control transistor. The photodiode element is used for converting the light to generate a sensing signal. The row reset transistor has a first terminal coupled to a reference reset signal, a second terminal coupled to the photodiode element, and a control terminal controlled by a row reset signal. The buffer transistor has a control terminal coupled to an output of the photodiode element for buffering the received sensing signal. The temporary storage capacitor is electrically coupled between the buffer transistor and a ground level for temporarily storing the charge of the sensing signal. The column control transistor is electrically connected to the control terminal of the buffer transistor or an output of the buffer transistor, and is used as a switch to be switched to an open circuit or a closed circuit according to a column control signal corresponding to the sensing pixel unit, and when the column reset transistor is turned on, the column control transistor controls whether to transfer the charge of the reference reset signal to the temporary storage capacitor.
The present invention provides a novel structure of sensing pixel units of an image sensor and/or a sensing pixel array, each sensing pixel unit comprises a column control transistor, so that the image sensor can output the charges of sensing signals and the charges of reset signals sensed by different sensing pixel units on the same row one by controlling the column control transistor corresponding to each sensing pixel unit, compared with the existing structure of sensing pixel units, the novel structure of sensing pixel units of the present invention can make the subsequent analog receiving circuit for receiving the charges of sensing signals and the charges of reset signals only need one set of analog receiving circuit, for example, only one set of two sampling capacitors are needed to receive the charges of sensing signals and the charges of reset signals, and the conventional receiving circuit does not need N sets of sampling capacitors to receive the charges of sensing signals and the charges of reset signals of sensing pixel units on the same row at the same time Therefore, the image sensor and/or the sensing pixel array can greatly reduce the circuit area and the circuit manufacturing cost.
Drawings
FIG. 1 is a circuit diagram of an image sensor according to a first embodiment of the present invention.
FIG. 2 is a circuit diagram of an image sensor according to a second embodiment of the present invention.
FIG. 3 is a circuit diagram of an image sensor according to a third embodiment of the present invention.
FIG. 4 is a schematic signal diagram illustrating resetting of two different sensing pixel units on the same row by the image sensor shown in FIG. 1 according to the same row selection signal.
The reference numbers illustrate:
| 100、200、300 | |
| 101、201 | |
| 101A、201A | |
| 102 | |
| 105 | |
| 110 | |
| 115 | |
| 120 | |
| 125 | |
| 130 | Column |
| 135 | |
| 140 | |
| 145 | Analog-to- |
| 150 | Successive approximation register circuit |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The circuit locations of the column control transistors may have a variety of different designs, and various embodiments of the image sensor and/or sensing pixel array are provided below.
Referring to fig. 1, a circuit diagram of an image sensor 100 according to a first embodiment of the present invention is shown, the image sensor 100 includes a sensing pixel array 101 and a processing circuit 102, the sensing pixel array 101 includes a plurality of sensing pixel units 101A, such as M × N sensing pixel units (M ROWs, N columns), each sensing pixel unit 101A includes a photodiode element (photodiode)105, a buffer transistor 110, a transfer transistor 115, a buffer capacitor 120, a read transistor 125, a column select transistor 130, a column reset transistor 140, and a column control transistor 135 (the column reset transistor 140 is connected in series with the column control transistor 135), the photodiode element 105 converts light into a current or voltage signal to generate a sense signal, the buffer transistor 110 has a control terminal coupled to the output of the photodiode element 105 to buffer the charge of the received signal, the buffer transistor 110 has a first terminal coupled to a potential, a second terminal coupled to a buffer transistor 120, and a control terminal coupled to a sense transistor 120 for transferring the charge to a sense signal, and a control terminal coupled to a sense transistor 120 for receiving a sense signal, and a signal output terminal coupled to a signal transfer transistor 120 coupled to a sense transistor 120 for receiving a signal, and a signal output, such as a signal transfer transistor 120 coupled to a signal, when the sense transistor 120 having a sense transistor 120 coupled to a sense signal output, a sense transistor 120 coupled to a sense signal output, and a signal output, such as a sense transistor 120 coupled to a signal output, and a signal output, such as a signal output, a signal output transistor 120 coupled to a signal, a signal output, a transistor 120, a signal output transistor 120 coupled to a transistor 120, and a transistor 120 coupled to a signal, and a transistor 120 coupled to.
The column reset transistor 140 has a control terminal coupled to and controlled by a ROW Reset Signal (RST) and the column control transistor 135 as a switch and switched to open or closed according to a column control signal (column control) CO L corresponding to the sensing pixel unit 101A, e.g., after a subsequent analog receiving circuit has received and stored the sensing signal charge of the sensing pixel unit 101A, the sensing pixel unit 101A may be reset to obtain the corresponding reset signal charge, and a second capacitor (not shown in fig. 1) is used to receive the corresponding reset signal charge, when the column reset signal RST controls the column reset transistor 140 to be conductive, the column control signal CO L controls the column control transistor 135 to be conductive to reset the sensing pixel unit 101A, while the reference reset signal (VDD) is transferred to the control terminal of the buffer transistor 110 and through the buffer transistor 110, the transfer transistor 115 to the buffer transistor 120, then the analog reading transistor 125 is read and the column control transistor 130 to read the reference reset transistor 140 a, thereby reading the column control transistor 120 a read the reference reset signal, and read the column control transistor 120 b, thereby reading the column control transistor 140 a read the reference reset signal, e.g., read the column control transistor 140 a, read the reference reset signal, read the column control transistor 120, read the column control transistor 130, read the column control transistor 120, and read the pixel unit 120 b, thereby read the column control transistor 120 b, read the pixel 1A, read the pixel 1 b, read the pixel, and read the pixel.
The subsequent analog receiving circuit uses a set of two capacitors (i.e. the first and second capacitors) to receive and store the sensing signal charge and the reset signal charge of a sensing pixel unit, the sensing signal charge and the reset signal charge can be converted into two digital values by an analog-to-digital conversion circuit and stored in the memory, therefore, the charges originally stored in the two capacitors (first and second capacitors) of the same group can be emptied and then used to receive and store the sensing signal charges and the reset signal charges of the next sensing pixel unit, thus, the analog receiving circuit of the image sensor 100 can receive the sensing signal charges and the reset signal charges generated by different sensing pixel units on the same row one by one only by using one set of two capacitors, and does not need to use N sets of capacitors to receive the charges generated by different sensing pixel units on the same row.
With reference to fig. 1 and 4, fig. 4 is a schematic diagram of an image sensor 100 shown in fig. 1 resetting two different sensing pixel cells on the same ROW when a ROW select signal is asserted, image sensor 100 reading the sensing signal charges and reset signal charges of the different sensing pixel cells on a particular ROW corresponding to ROW select signal ROW0 when the ROW select signal ROW0 is asserted, fig. 4 showing the sequence of reading the sensing signal charges and reset signal charges of the two different sensing pixel cells on the particular ROW, signal CO 0 representing a column reset signal, signal CO L and signal CO L being the column control signals of the two different sensing pixel cells respectively, when the column reset signal RST0 and column control signal CO L are both asserted (e.g., time period T2), the ROW reset transistor corresponding to the corresponding sensing pixel cells of column control signal CO L and the column control signal RST pixel 865 are not connected to the same column control signal ROW, the column control signal RST signal specification circuit 36120, the column control circuit 120 is connected to the column control signal ROW, the column control signal buffer circuit 120, the column control circuit is connected to the column control signal ROW, the column control circuit 120 is connected to the column control signal ROW, the column control signal ROW not connected to the column control signal ROW buffer circuit 120, the column control signal ROW, the column control circuit 120.
It should be noted that the signals shown in fig. 4 are only used to illustrate the operations of performing the photo sensing and the charge resetting successively on the different sensing pixel units in the same row, so as to distinguish that the operation of the present application is different from the operation of simultaneously resetting the different sensing pixel units in the same row by the conventional mechanism, and this should not be construed as a limitation of the present application.
Furthermore, the first embodiment has other design variations, for example, the column control transistor 135 may be connected between the supply potential VDD and the column reset transistor 140 instead, and the column reset transistor 140 may be connected between the column control transistor 135 and the control terminal of the buffer transistor 110 instead, which is also the scope of the present invention.
Further, the circuit location of the column control transistor 135 may be alternatively disposed between the output of the buffer transistor 110 and the transfer transistor 115, or alternatively disposed between the transfer transistor 115 and the read transistor 125. referring to fig. 2, a schematic diagram of an image sensor 200 according to a second embodiment of the invention is shown, the image sensor 200 includes a sensing pixel array 201 and a processing circuit 102, the sensing pixel array 201 includes a plurality of sensing pixel cells 201A, e.g., M N sensing pixel cells, each sensing pixel cell 201A includes a photodiode element 105, a buffer transistor 110, a transfer transistor 115, a storage capacitor 120, a read transistor 125, a column select transistor 130, a column reset transistor 140 and a column control transistor 135 (the transfer transistor 115 is connected in series with the column control transistor 135), the column control transistor 135 serves as a switch and is switched to an open circuit or a closed circuit according to a column control signal CO 35 corresponding to the sensing pixel cell 201A, e.g., the analog receiving circuit has received and stored the column control signal 120, the read signal 120, the column control transistor 120 c, the read signal may be passed through the read transistor 140, the column control transistor 140, and the read signal may be output when the column control transistor 140 is not being turned on, the read signal, or reset signal may be passed through the read signal 36140, the column control transistor 140, the pixel cell 140, the pixel array may be read signal, or read signal, and the pixel array may be read signal, or read signal, and read signal may be read by the pixel array 36140.
The subsequent analog receiving circuit uses a set of two capacitors (first and second capacitors) to receive and store the sensing signal charge and the reset signal charge of a sensing pixel unit, the sensing signal charge and the reset signal charge can be converted into two digital values by an analog-to-digital conversion circuit and stored in the memory, therefore, the charges originally stored in the two capacitors (first and second capacitors) of the same group can be emptied and then used to receive and store the sensing signal charges and the reset signal charges of the next sensing pixel unit, thus, the analog receiving circuit of the image sensor 200 can receive the sensing signal charges and the reset signal charges generated by different sensing pixel units on the same row one by one only by using one set of two capacitors, and does not need to use N sets of capacitors to receive the charges generated by different sensing pixel units on the same row.
In addition, the example of signals for resetting two different sensing pixel units on the same row when the image sensor 200 shown in fig. 2 selects the same row signal can refer to the example of fig. 4, and is not repeated herein.
In addition, the second embodiment has other design variations, for example, the column control transistor 135 may be connected between the output of the buffer transistor 110 and the transfer transistor 115, and the transfer transistor 115 may be connected between the column control transistor 135 and one end of the register capacitor 120, which is also within the scope of the present invention.
In addition, the image sensor of the first or second embodiment may further include an analog-to-digital conversion circuit, for example, referring to fig. 3, fig. 3 is a circuit diagram of an image sensor 300 according to a third embodiment of the present invention. In addition to the circuit elements shown in fig. 1, the image sensor 300 further includes an analog-to-digital conversion circuit 145, the analog-to-digital conversion circuit 145 includes a first switch SW1, a second switch SW2, a first sampling capacitor C1, a second sampling capacitor C2, and a Successive Approximation Register (SAR) circuit 150, the analog-to-digital conversion circuit 145 is coupled to the second end of the column selection transistor 130, when the switch SW1 is closed, the first sampling capacitor C2 is used for temporarily storing the sensing signal charge, and when the switch SW2 is closed, the second sampling capacitor C2 is used for temporarily storing the resetting signal charge, and then the Successive Approximation Register circuit 150 compares the charges respectively stored by the capacitors C1 and C2 to deduct the Fixed Pattern Noise (FPN) caused by the transistor process drift. It should be noted that the present application is not limited to using the successive approximation register circuit 150 to compare two signal charges, and other analog circuit mechanisms can be used to perform the operation. Compared with the conventional scheme that a Correlated Double Sampling Circuit (CDS) is adopted to access the sensing signal charges and the reset signal charges, the present application directly adopts the first Sampling capacitor C1 and the second Sampling capacitor C2 included in the analog digital conversion circuit 145 as the first capacitor and the second capacitor in the first embodiment or the second embodiment to access the sensing signal charges and the reset signal charges, so that the present application can dispense with the use of a Correlated Double Sampling circuit, and only needs one set of two capacitors instead of multiple sets of capacitors to access the charge value, thereby meeting the trend of smaller circuit area.
The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made in accordance with the claims of the present invention should be covered by the present invention.
Claims (10)
1. An image sensor, comprising:
a plurality of sensing pixel units, wherein a sensing pixel unit at least comprises:
a photodiode element for converting light to generate a sensing signal;
a row reset transistor having a first terminal coupled to a reference reset signal, a second terminal coupled to the photodiode element, and a control terminal controlled by a row reset signal;
a buffer transistor having a control terminal coupled to an output of the photodiode element for buffering and receiving the sensing signal;
a temporary storage capacitor electrically coupled between the buffer transistor and a ground level for temporarily storing the charge of the sensing signal; and
a column control transistor electrically connected to the control terminal of the buffer transistor or an output of the buffer transistor, for being used as a switch and being switched to open or close according to a column control signal corresponding to the sensing pixel unit, and controlling whether to transfer the charge of the reference reset signal to the temporary storage capacitor when the column reset transistor is turned on; and
a processing circuit coupled to the plurality of sensing pixel units for generating the column reset signal and the column control signal.
2. The image sensor of claim 1, wherein the column control transistor is coupled in series with the column reset transistor, the column control transistor is coupled between the reference reset signal and the column reset transistor, and the column reset transistor is coupled between the column control transistor and the control terminal of the buffer transistor.
3. The image sensor of claim 1, wherein the column control transistor is connected in series with the column reset transistor, the column reset transistor is coupled between the column control transistor and the reference reset signal, and the column control transistor is coupled between the column reset transistor and the control terminal of the buffer transistor.
4. The image sensor of claim 1, wherein the sensing pixel unit further comprises:
a transfer transistor having a control terminal coupled to and controlled by a row control signal, and having a first terminal coupled to the output of the buffer transistor and a second terminal electrically coupled to the temporary storage capacitor;
wherein the column control transistor is connected in series with the transfer transistor, the column control transistor is coupled between the output of the buffer transistor and the transfer transistor, and the transfer transistor is coupled between the column control transistor and the temporary storage capacitor, the row control signal is generated by the processing circuit.
5. The image sensor of claim 1, wherein the sensing pixel unit further comprises:
a transfer transistor having a control terminal coupled to and controlled by a row control signal, and having a first terminal coupled to the output of the buffer transistor and a second terminal electrically coupled to the temporary storage capacitor;
wherein the column control transistor is connected in series with the transfer transistor, the transfer transistor is coupled between the column control transistor and the output of the buffer transistor, and the column control transistor is coupled between the transfer transistor and the temporary storage capacitor, the row control signal is generated by the processing circuit.
6. The image sensor of claim 1, wherein the sensing pixel unit further comprises:
a read transistor having a control terminal coupled to the temporary storage capacitor; and
a row selection transistor having a control terminal coupled to and controlled by a row selection signal generated by the processing circuit and having a first terminal coupled to an output terminal of the read transistor.
7. The image sensor as claimed in claim 6, wherein when the row selection signal selects a row corresponding to the sensing pixel unit, the column control signal controls the column control transistor to be open, the charge of the sensing signal temporarily stored in the register capacitor is read through the read transistor and the row selection transistor, and then the column control signal controls the column control transistor to be closed, so that the column control transistor transfers the charge of the reference reset signal to the register capacitor, and the charge of the reference reset signal is read through the read transistor and the row selection transistor.
8. The image sensor of claim 6, further comprising:
an analog-to-digital conversion circuit having a first sampling capacitor and a second sampling capacitor, the analog-to-digital conversion circuit being coupled to a second terminal of the row selection transistor, using the first sampling capacitor to temporarily store the charge of the sensing signal, and using the second sampling capacitor to temporarily store the charge of the reference reset signal.
9. A sensing pixel array for use in an image sensor, comprising:
a plurality of sensing pixel units, wherein each sensing pixel unit at least comprises:
a photodiode element for converting light to generate a sensing signal;
a row reset transistor having a first terminal coupled to a reference reset signal, a second terminal coupled to the photodiode element, and a control terminal controlled by a row reset signal;
a buffer transistor having a control terminal coupled to an output of the photodiode element for buffering and receiving the sensing signal;
a temporary storage capacitor coupled between the buffer transistor and a ground level for temporarily storing the charge of the sensing signal; and
a column control transistor electrically connected to the control terminal of the buffer transistor or an output of the buffer transistor for being used as a switch and being switched to open or close according to a column control signal corresponding to the sensing pixel unit, and controlling whether to transfer the charge of the reference reset signal to the temporary storage capacitor when the column reset transistor is turned on.
10. The pixel array of claim 9, wherein when a row selection signal selects a row corresponding to the sensing pixel unit, the column control signal controls the column control transistor to be open, the charge of the sensing signal temporarily stored in the temporary storage capacitor is read through a read transistor and a row selection transistor, and then the column control signal controls the column control transistor to be closed, so that the column control transistor transfers the charge of the reference reset signal to the temporary storage capacitor, and the charge of the reference reset signal is read through the read transistor and the row selection transistor.
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| CN101166241A (en) * | 2006-03-24 | 2008-04-23 | 英特尔公司 | Sub-ranging pixel sampling and keeping |
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