CN108538713B - Method for preparing high-resistance epitaxial layer by heavily-doped silicon substrate for photoelectric detector - Google Patents
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 49
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 49
- 239000010703 silicon Substances 0.000 title claims abstract description 49
- 239000000758 substrate Substances 0.000 title claims abstract description 49
- 238000000034 method Methods 0.000 title claims abstract description 24
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 109
- 239000001257 hydrogen Substances 0.000 claims abstract description 109
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 109
- 238000010926 purge Methods 0.000 claims abstract description 74
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 58
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 29
- 239000012535 impurity Substances 0.000 claims abstract description 20
- 239000007789 gas Substances 0.000 claims description 47
- 238000010438 heat treatment Methods 0.000 claims description 30
- 230000009467 reduction Effects 0.000 claims description 22
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 15
- 229910000041 hydrogen chloride Inorganic materials 0.000 claims description 15
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 claims description 15
- 238000005498 polishing Methods 0.000 claims description 15
- UORVGPXVDQYIDP-UHFFFAOYSA-N borane Chemical compound B UORVGPXVDQYIDP-UHFFFAOYSA-N 0.000 claims description 14
- ZDHXKXAHOVTTAH-UHFFFAOYSA-N trichlorosilane Chemical compound Cl[SiH](Cl)Cl ZDHXKXAHOVTTAH-UHFFFAOYSA-N 0.000 claims description 14
- 239000005052 trichlorosilane Substances 0.000 claims description 14
- 229910000085 borane Inorganic materials 0.000 claims description 7
- 238000010408 sweeping Methods 0.000 claims description 4
- 239000000463 material Substances 0.000 abstract description 7
- 230000009286 beneficial effect Effects 0.000 abstract 1
- 230000007547 defect Effects 0.000 description 15
- 230000008569 process Effects 0.000 description 13
- 230000002093 peripheral effect Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 5
- 230000035882 stress Effects 0.000 description 4
- 238000009825 accumulation Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000012071 phase Substances 0.000 description 3
- 230000004044 response Effects 0.000 description 3
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000737 periodic effect Effects 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000007790 solid phase Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000035484 reaction time Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
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Abstract
The invention relates to a method for preparing a high-resistance epitaxial layer by using a heavily-doped silicon substrate for a photoelectric detector. And (3) loading the silicon substrate slice on an epitaxial base in an epitaxial reaction cavity, and purging a doping pipeline and the reaction cavity of the epitaxial furnace by using nitrogen and hydrogen in sequence. The epitaxial susceptor was heated from room temperature to 1160 ℃. And baking the silicon substrate slice for 3min at constant temperature to volatilize impurities on the surface of the silicon substrate slice and form an impurity depletion region on the surface. And purging the reaction cavity by using hydrogen with the flow rate periodically and rapidly changing in an alternating manner, wherein the range of the hydrogen is 40-400L/min. And growing the first epitaxial layer. And purging the reaction cavity by using hydrogen with the flow rate periodically and rapidly changing in an alternating manner, wherein the range of the hydrogen is 40-400L/min. And growing a second epitaxial layer. The beneficial effects are that: the resistivity of the whole area can meet the index higher than 1000 omega cm, so that the material can meet the use requirement of the photoelectric detector.
Description
Technical Field
The invention relates to the technical field of preparation of semiconductor epitaxial materials, in particular to a method for preparing a high-resistance epitaxial layer by using a heavily-doped silicon substrate for a photoelectric detector.
Background
The current silicon-based array photoelectric detector is developed in a direction of high precision, fast response and high signal-to-noise ratio, the requirements of the detector on the response wavelength range and the detection precision index are increasingly strict, the current general requirement is that the response nonuniformity is not higher than 10%, the effective pixel rate reaches 100%, and the failure of one pixel in an array unit causes the rejection of the whole chip. The P-type high-resistance epitaxial layer is used as a key supporting material for realizing the performance of the photoelectric avalanche detector, also called as a pi layer, the resistivity, the thickness and the defect content of the P-type high-resistance epitaxial layer determine the material quality, and further determine the key performance index requirements of the laser wavelength of a device, the detection threshold luminous power, the responsivity uniformity, the dark current density and the like, the thickness is generally required to be not less than 45 mu m, the resistivity is required to be higher than 1000 omega cm, and the epitaxial layer is required to have perfect crystal quality and to have no faults, dislocations and fog defects. However, it is extremely difficult to deposit a thick epitaxial layer with low defects and a resistivity higher than 1000 Ω · cm on a heavily doped silicon substrate with a resistivity lower than 0.02 Ω · cm, because thick layer epitaxy requires a long reaction time, mechanical and thermal stresses accumulate during growth, and it is extremely difficult to achieve zero defects. Meanwhile, HCl gas polishing, high-temperature baking and epitaxial high-temperature growth are carried out in the process, the doping concentration difference between the heavily doped substrate and the epitaxial layer is 5 orders of magnitude, impurity boron atoms are diffused from a solid phase and enter a gas phase growth region from the gas phase evaporation of the front side, the back side and the chamfered edge, and participate in the growth process of the epitaxial layer from the two ways of the solid phase and the gas phase, so that the uniformity of the resistivity distribution of the epitaxial layer is greatly influenced, the resistivity of the central region of the epitaxial wafer can meet the requirement higher than 1000 ohm cm, but the resistivity of the peripheral region is low, so that the index requirement cannot be met, and the epitaxial wafer cannot pass the device process verification.
Disclosure of Invention
The invention aims to solve the problems of resistivity and defect control of a P-type silicon epitaxial layer used by the conventional photoelectric detector, and inhibits the generation of defects by adopting a relatively slow temperature gradient when the temperature of an epitaxial base is raised and keeping the temperature for a certain time to release stress when the temperature is raised to a certain temperature. Meanwhile, before the epitaxial layer grows, the periodic rapid alternate change of the large-amplitude gas flow is implemented, most of impurities volatilized at high temperature are swept out of the cavity, the self-doping influence of the substrate impurities at high temperature in the growth process of the epitaxial layer is reduced, and the method for preparing the high-resistance epitaxial layer by using the heavily-doped silicon substrate for the photoelectric detector is obtained.
In order to achieve the purpose, the invention adopts the following specific technical scheme: a method for preparing a high-resistance epitaxial layer by a heavily doped silicon substrate for a photoelectric detector is characterized by comprising the following steps:
firstly, a silicon substrate slice is arranged on an epitaxial base in an epitaxial reaction cavity, a doping pipeline and the reaction cavity of an epitaxial furnace are swept by nitrogen and hydrogen in sequence, the flow rate of the nitrogen is set to be 100L/min, the flow rate of the hydrogen is set to be 100L/min, and the sweeping time of the doping pipeline and the reaction cavity is set to be 10 min;
secondly, heating the epitaxial base from room temperature to 1160 ℃, introducing hydrogen chloride gas, and polishing the surface of the silicon substrate wafer, wherein the flow of the hydrogen chloride is set to be 3L/min, and the polishing time is set to be 1 min;
thirdly, baking the silicon substrate slice for 3min at constant temperature to volatilize impurities on the surface of the silicon substrate slice and form an impurity depletion region on the surface;
fourthly, purging the reaction cavity by using hydrogen with flow rate periodically and rapidly changing in an alternating manner, wherein the range of the flow rate is 40L/min-400L/min, rapidly reducing the flow rate of the hydrogen from 300L/min to 40L/min, setting the time required by flow rate reduction to be 1min, and purging for 3min under the air flow; rapidly increasing the hydrogen flow from 40L/min to 400L/min, setting the time required for the flow increase to be 1min, and purging for 3min under the gas flow; rapidly reducing the hydrogen flow from 400L/min to 40L/min, setting the time required for flow reduction to be 1min, and purging for 3min under the gas flow; rapidly increasing the hydrogen flow from 40L/min to 400L/min, setting the time required for the flow increase to be 1min, and purging for 3min under the gas flow; rapidly reducing the hydrogen flow from 400L/min to 40L/min, setting the time required for flow reduction to be 1min, rapidly increasing the hydrogen flow from 40L/min to 300L/min, setting the time required for flow increase to be 1min, and purging for 3min under the gas flow;
fifthly, growing the first epitaxial layer, wherein the hydrogen flow is set to be 300L/min, introducing gaseous trichlorosilane, the flow is set to be 33L/min, the growth time is 2min, and then reducing the temperature of the reaction cavity by 30 ℃;
sixthly, purging the reaction cavity by using hydrogen with the flow rate periodically and rapidly changing in an alternating manner, wherein the range of the flow rate is 40L/min-400L/min, the flow rate of the hydrogen is rapidly reduced from 300L/min to 40L/min, the time required by flow rate reduction is set to be 1min, and purging is carried out for 3min under the air flow; rapidly increasing the hydrogen flow from 40L/min to 400L/min, setting the time required for the flow increase to be 1min, and purging for 3min under the gas flow; rapidly reducing the hydrogen flow from 400L/min to 40L/min, setting the time required for flow reduction to be 1min, and purging for 3min under the gas flow; rapidly increasing the hydrogen flow from 40L/min to 400L/min, setting the time required for the flow increase to be 1min, and purging for 3min under the gas flow; rapidly reducing the hydrogen flow from 400L/min to 40L/min, setting the time required for flow reduction to be 1min, rapidly increasing the hydrogen flow from 40L/min to 300L/min, setting the time required for flow increase to be 1min, and purging for 3min under the gas flow;
seventhly, growing a second epitaxial layer, wherein the hydrogen flow is set to be 300L/min, gaseous trichlorosilane is introduced, the flow is set to be 33L/min, borane with the purity specification of 50ppm is introduced to serve as epitaxial layer doping gas, the flow is set to be 50sccm, and the epitaxial layer growth time is 34 min;
and step eight, stopping heating after the epitaxial layer grows, sequentially purging the epitaxial reaction cavity for 10min by using hydrogen and nitrogen, setting the flow of the hydrogen to be 100L/min and the flow of the nitrogen to be 100L/min, and finally taking the wafer from the reaction cavity.
The further technical scheme is that the silicon substrate slice is a heavily doped borosilicate substrate slice with the diameter of 150mm, and the substrate resistivity is lower than 0.02 omega cm.
The further technical scheme is that the thickness of the epitaxial layer of the doped epitaxial layer is 45-55 mu m, and the resistivity is higher than 1000 omega-cm.
The further technical scheme is that a slow gradient heating method is adopted in the process of heating the epitaxial base from room temperature to 1160 ℃, the heating rate is 15 ℃/min, the temperature is kept constant at 900 ℃, 950 ℃ and 1000 ℃ for 2min, the stress accumulation of materials is reduced, and the occurrence probability of defects is reduced.
The invention has the advantages that the stress accumulation effect in the growth process of the epitaxial layer is weakened by adopting the method of gradual gradient temperature rise, the good crystallization quality of the thick-layer epitaxial growth is realized, the epitaxial surface is bright, the defects of dislocation, stacking fault and fog are avoided, the self-diffusion influence of impurities of the heavily doped substrate is inhibited by the periodic rapid alternate hydrogen purging, the resistivity of the whole area can meet the index higher than 1000 omega cm, and the material can meet the use requirement of a photoelectric detector.
Drawings
FIG. 1 is a schematic diagram of the on-chip resistivity distribution of example 1 of the present invention;
FIG. 2 is a schematic diagram of the on-chip resistivity distribution of example 2 of the present invention;
FIG. 3 is a schematic diagram of the on-chip resistivity distribution of example 3 of the present invention;
FIG. 4 is a schematic diagram of the on-chip resistivity distribution of example 4 of the present invention;
FIG. 5 is a schematic diagram showing the on-chip resistivity distribution in example 5 of the present invention.
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings in which:
the silicon substrate slice used in the invention is a heavily boron-doped substrate slice with the diameter of 150mm and the resistivity lower than 0.02 omega cm, the thickness of the prepared epitaxial layer is 45-55 mu m, and the resistivity is higher than 1000 omega cm. The center point of the thickness test is positioned, the resistivity adopts a 5-point test method, and the distribution positions are the center point and points 6mm away from the edge at the periphery.
Heating the epitaxial base, adopting a slow gradient heating method in the process of heating from room temperature to 1160 ℃, wherein the heating rate is 15 ℃/min, and the temperature is kept constant for 2min at 900 ℃, 950 ℃ and 1000 ℃, so that the stress accumulation of the material is reduced, and the occurrence probability of defects is reduced.
Example 1
Firstly, loading a silicon substrate slice on an epitaxial base in an epitaxial reaction cavity, and purging a doping pipeline and the reaction cavity of an epitaxial furnace by using nitrogen and hydrogen in sequence, wherein the flow rate of the nitrogen is set to be 100L/min, the flow rate of the hydrogen is set to be 100L/min, and the purging time of the doping pipeline and the reaction cavity is set to be 10 min;
secondly, heating the epitaxial base, directly heating the epitaxial base from room temperature to 1160 ℃, wherein the heating rate is 10 ℃/min, introducing hydrogen chloride gas, and polishing the surface of the silicon substrate slice, wherein the flow rate of the hydrogen chloride is set to be 3L/min, and the polishing time is set to be 1 min;
thirdly, baking the silicon substrate slice for 3min at constant temperature to volatilize impurities on the surface of the silicon substrate slice and form an impurity depletion region on the surface;
fourthly, purging the reaction cavity for 10min by using hydrogen with the flow rate of 300L/min;
fifthly, growing the first epitaxial layer, wherein the hydrogen flow is set to be 300L/min, introducing gaseous trichlorosilane, the flow is set to be 33L/min, the growth time is 2min, and then reducing the temperature of the reaction cavity by 30 ℃;
sixthly, growing a second epitaxial layer, wherein the hydrogen flow is set to be 300L/min, gaseous trichlorosilane is introduced, the flow is set to be 33L/min, borane with the purity specification of 50ppm is introduced to serve as epitaxial layer doping gas, the flow is set to be 50sccm, and the epitaxial layer growth time is 34 min;
and seventhly, stopping heating after the epitaxial layer grows, sequentially purging the epitaxial reaction cavity for 10min by using hydrogen and nitrogen, setting the flow of the hydrogen to be 100L/min and the flow of the nitrogen to be 100L/min, and finally taking the wafer from the reaction cavity.
The thickness test value of the silicon epitaxial layer prepared in example 1 is 49.8 mu m, the mean value of the resistivity 5 point test is 795.2 omega cm, the surface is bright and has no fog defect, and the stacking fault density is 0/cm2Dislocation density of 119 dislocations/cm2The resistivity sheet internal 5-point test result is shown in fig. 1, the resistivity of the central region is 1055 Ω · cm, and the resistivity of the peripheral region is 708 Ω · cm, 734 Ω · cm, 624 Ω · cm, 855 Ω · cm in this order;
the resistivity of the central region is 1055 omega cm, which can meet the requirement of more than 1000 omega cm, but the resistivity of the peripheral region can not meet the requirement of the resistivity.
Example 2
Firstly, loading a silicon substrate slice on an epitaxial base in an epitaxial reaction cavity, and purging a doping pipeline and the reaction cavity of an epitaxial furnace by using nitrogen and hydrogen in sequence, wherein the flow rate of the nitrogen is set to be 100L/min, the flow rate of the hydrogen is set to be 100L/min, and the purging time of the doping pipeline and the reaction cavity is set to be 10 min;
secondly, heating the epitaxial base from room temperature to 1160 ℃, wherein the heating rate is 15 ℃/min, introducing hydrogen chloride gas, and polishing the surface of the silicon substrate slice, wherein the flow rate of the hydrogen chloride is set to be 3L/min, and the polishing time is set to be 1 min;
thirdly, baking the silicon substrate slice for 3min at constant temperature to volatilize impurities on the surface of the silicon substrate slice and form an impurity depletion region on the surface;
fourthly, purging the reaction cavity for 10min by using hydrogen with the flow rate of 300L/min;
fifthly, growing the first epitaxial layer, wherein the hydrogen flow is set to be 300L/min, introducing gaseous trichlorosilane, the flow is set to be 33L/min, the growth time is 2min, and then reducing the temperature of the reaction cavity by 30 ℃;
sixthly, purging the reaction cavity for 10min by using hydrogen with the flow rate of 300L/min;
seventhly, growing a second epitaxial layer, wherein the hydrogen flow is set to be 300L/min, gaseous trichlorosilane is introduced, the flow is set to be 33L/min, borane with the purity specification of 50ppm is introduced to serve as epitaxial layer doping gas, the flow is set to be 50sccm, and the epitaxial layer growth time is 34 min;
and step eight, stopping heating after the epitaxial layer grows, sequentially purging the epitaxial reaction cavity for 10min by using hydrogen and nitrogen, setting the flow of the hydrogen to be 100L/min and the flow of the nitrogen to be 100L/min, and finally taking the wafer from the reaction cavity.
The thickness test value of the silicon epitaxial layer prepared in the example 2 is 50.1 mu m, the mean value of the resistivity 5 point test is 877.2 omega cm, the surface is bright and has no fog defect, and the stacking fault density is 0/cm2Dislocation density of 51/cm2The resistivity sheet internal 5-point test result is shown in fig. 2, the central region resistivity is 1079 Ω · cm, and the peripheral region resistivity is 772 Ω · cm, 882 Ω · cm, 718 Ω · cm, and 935 Ω · cm in this order;
the resistivity of the central region is 1079 omega cm, which can meet the requirement of more than 1000 omega cm, but the resistivity of the peripheral region can not meet the requirement of the resistivity.
Example 3
Firstly, loading a silicon substrate slice on an epitaxial base in an epitaxial reaction cavity, and purging a doping pipeline and the reaction cavity of an epitaxial furnace by using nitrogen and hydrogen in sequence, wherein the flow rate of the nitrogen is set to be 100L/min, the flow rate of the hydrogen is set to be 100L/min, and the purging time of the doping pipeline and the reaction cavity is set to be 10 min;
secondly, heating the epitaxial base from room temperature to 1160 ℃, wherein the heating rate is 15 ℃/min, keeping the temperature at 900 ℃, 950 ℃ and 1000 ℃ for 2min, introducing hydrogen chloride gas, polishing the surface of the silicon substrate slice, setting the flow of the hydrogen chloride at 3L/min, and setting the polishing time at 1 min;
thirdly, baking the silicon substrate slice for 3min at constant temperature to volatilize impurities on the surface of the silicon substrate slice and form an impurity depletion region on the surface;
fourthly, hydrogen is introduced to purge the reaction cavity, the hydrogen flow rate is rapidly changed in the purging process, the hydrogen flow rate is reduced from 300L/min to 40L/min, the time required by the flow rate reduction is set to 1min, then purging is carried out under the air flow for 3min, the hydrogen flow rate is increased from 40L/min to 400L/min, the time required by the flow rate increase is set to 1min, then purging is carried out under the air flow for 3min, the hydrogen flow rate is reduced from 400L/min to 40L/min, the time required by the flow rate reduction is set to 1min, then purging is carried out under the air flow for 3min, the hydrogen flow rate is increased from 40L/min to 300L/min, the time required by the flow rate increase is set to 1min, and then purging is carried out under the air flow for 3 min;
fifthly, growing the first epitaxial layer, wherein the hydrogen flow is set to be 300L/min, introducing gaseous trichlorosilane, the flow is set to be 33L/min, the growth time is 2min, and then reducing the temperature of the reaction cavity by 30 ℃;
sixthly, growing a second epitaxial layer, wherein the hydrogen flow is set to be 300L/min, gaseous trichlorosilane is introduced, the flow is set to be 33L/min, borane with the purity specification of 50ppm is introduced to serve as epitaxial layer doping gas, the flow is set to be 50sccm, and the epitaxial layer growth time is 34 min;
and seventhly, stopping heating after the epitaxial layer grows, sequentially purging the epitaxial reaction cavity for 10min by using hydrogen and nitrogen, setting the flow of the hydrogen to be 100L/min and the flow of the nitrogen to be 100L/min, and finally taking the wafer from the reaction cavity.
The thickness test value of the silicon epitaxial layer prepared in example 3 is 49.9 μm, the mean value of the resistivity 5-point test is 943.0 Ω & cm, the surface is bright and has no fog defect, and the stacking fault density is 0/cm2Dislocation density of 0 pieces/cm2As a result of the resistivity sheet internal 5-point test shown in fig. 3, the center region resistivity was 1114 Ω · cm, and the peripheral region resistivity was 889 Ω · cm, 905 Ω · cm, 835 Ω · cm, and 972 Ω · cm in this order;
the resistivity of the central region is 1144 Ω · cm, which can satisfy the requirement higher than 1000 Ω · cm, but none of the peripheral regions can satisfy the resistivity requirement.
Example 4
Firstly, a silicon substrate slice is filled into an epitaxial reaction cavity, a doping pipeline and the reaction cavity of an epitaxial furnace are swept by nitrogen and hydrogen in sequence, the flow rate of the nitrogen is set to be 100L/min, the flow rate of the hydrogen is set to be 100L/min, and the sweeping time of the doping pipeline and the reaction cavity is set to be 10 min;
heating the epitaxial base from room temperature to 1160 ℃, wherein the heating rate is 15 ℃/min, the temperature is kept constant at 900 ℃, 950 ℃ and 1000 ℃ for 2min, introducing hydrogen chloride gas, polishing the surface of the silicon substrate slice, wherein the flow rate of the hydrogen chloride is set to be 3L/min, and the polishing time is set to be 1 min;
thirdly, baking the silicon substrate slice for 3min at a constant temperature to volatilize impurities on the surface of the silicon substrate slice and form an impurity depletion region on the surface;
fourthly, hydrogen is introduced to purge the reaction cavity, the hydrogen flow rate is rapidly changed in the purging process, the hydrogen flow rate is reduced from 300L/min to 40L/min, the time required by the flow rate reduction is set to 1min, then purging is carried out under the air flow for 3min, the hydrogen flow rate is increased from 40L/min to 400L/min, the time required by the flow rate increase is set to 1min, then purging is carried out under the air flow for 3min, the hydrogen flow rate is reduced from 400L/min to 40L/min, the time required by the flow rate reduction is set to 1min, then purging is carried out under the air flow for 3min, the hydrogen flow rate is increased from 40L/min to 300L/min, the time required by the flow rate increase is set to 1min, and then purging is carried out under the air flow for 3 min;
fifthly, growing the first epitaxial layer, wherein the hydrogen flow is set to be 300L/min, introducing gaseous trichlorosilane, the flow is set to be 33L/min, the growth time is 2min, and then reducing the temperature of the reaction cavity by 30 ℃;
sixthly, introducing hydrogen to purge the reaction cavity, wherein the hydrogen flow rate is changed rapidly in the purging process, the hydrogen flow rate is reduced from 300L/min to 40L/min, the time required for flow reduction is set to 1min, then purging is carried out for 3min under the gas flow, the hydrogen flow rate is increased from 40L/min to 400L/min, the time required for flow increase is set to 1min, then purging is carried out for 3min under the gas flow, the hydrogen flow rate is reduced from 400L/min to 40L/min, the time required for flow reduction is set to 1min, then purging is carried out for 3min under the gas flow, the hydrogen flow rate is increased from 40L/min to 300L/min, the time required for flow increase is set to 1min, and then purging is carried out for 3min under the gas flow;
seventhly, growing a second epitaxial layer, wherein the hydrogen flow is set to be 300L/min, gaseous trichlorosilane is introduced, the flow is set to be 33L/min, borane with the purity specification of 50ppm is introduced to serve as epitaxial layer doping gas, the flow is set to be 50sccm, and the epitaxial layer growth time is 34 min;
and eighth, stopping heating after the epitaxial layer grows, purging the epitaxial reaction cavity for 10min by using hydrogen and nitrogen in sequence, setting the flow of the hydrogen to be 100L/min and the flow of the nitrogen to be 100L/min, and finally taking the wafer from the reaction cavity.
The thickness test value of the silicon epitaxial layer prepared in example 4 is 50.0 μm, the mean value of the resistivity 5-point test is 1020.2 Ω & cm, the surface is bright and has no fog defect, and the stacking fault density is 0/cm2Dislocation density of 0 pieces/cm2The resistivity sheet internal 5-point test result is shown in fig. 4, the resistivity of the center region is 1166 Ω · cm, and the resistivity of the peripheral regions is 1012 Ω · cm, 982 Ω · cm, 909 Ω · cm, 1032 Ω · cm in this order;
the central region resistivity of 1166 Ω · cm can satisfy the requirement of more than 1000 Ω · cm, but the lower and right points of the peripheral region still cannot satisfy the resistivity requirement.
Example 5
Firstly, a silicon substrate slice is filled into an epitaxial reaction cavity, a doping pipeline and the reaction cavity of an epitaxial furnace are swept by nitrogen and hydrogen in sequence, the flow rate of the nitrogen is set to be 100L/min, the flow rate of the hydrogen is set to be 100L/min, and the sweeping time of the doping pipeline and the reaction cavity is set to be 10 min;
heating the epitaxial base from room temperature to 1160 ℃, wherein the heating rate is 15 ℃/min, the temperature is kept constant at 900 ℃, 950 ℃ and 1000 ℃ for 2min, introducing hydrogen chloride gas, polishing the surface of the silicon substrate slice, wherein the flow rate of the hydrogen chloride is set to be 3L/min, and the polishing time is set to be 1 min;
thirdly, baking the silicon substrate slice for 3min at a constant temperature to volatilize impurities on the surface of the silicon substrate slice and form an impurity depletion region on the surface;
fourthly, hydrogen is introduced to purge the reaction cavity, the hydrogen flow rate is rapidly changed in the purging process, the hydrogen flow rate is reduced from 300L/min to 40L/min, the time required for flow reduction is set to be 1min, then purging is carried out under the gas flow for 3min, the hydrogen flow rate is increased from 40L/min to 400L/min, the time required for flow increase is set to be 1min, then purging is carried out under the gas flow for 3min, the hydrogen flow rate is reduced from 400L/min to 40L/min, and the time required for flow reduction is set to be 1, then purging under the gas flow for 3min, increasing the hydrogen flow from 40L/min to 300L/min, setting the time required for the flow increase to 1min, then purging under the gas flow for 3 min;
fifthly, growing the first epitaxial layer, wherein the hydrogen flow is set to be 300L/min, introducing gaseous trichlorosilane, the flow is set to be 33L/min, the growth time is 2min, and then reducing the temperature of the reaction cavity by 30 ℃;
sixthly, introducing hydrogen to purge the reaction cavity, wherein the hydrogen flow rate is changed rapidly in the purging process, the hydrogen flow rate is reduced from 300L/min to 40L/min, the time required for flow reduction is set to 1min, then purging is carried out under the gas flow for 3min, the hydrogen flow rate is increased from 40L/min to 400L/min, the time required for flow increase is set to 1min, then purging is carried out under the gas flow for 3min, the hydrogen flow rate is reduced from 400L/min to 40L/min, and the time required for flow reduction is set to 1min, then purging under the gas flow for 3min, increasing the hydrogen flow from 40L/min to 300L/min, setting the time required for the flow increase to 1min, then purging under the gas flow for 3 min;
seventhly, growing a second epitaxial layer, wherein the hydrogen flow is set to be 300L/min, gaseous trichlorosilane is introduced, the flow is set to be 33L/min, borane with the purity specification of 50ppm is introduced to serve as epitaxial layer doping gas, the flow is set to be 50sccm, and the epitaxial layer growth time is 34 min;
and eighth, stopping heating after the epitaxial layer grows, purging the epitaxial reaction cavity for 10min by using hydrogen and nitrogen in sequence, setting the flow of the hydrogen to be 100L/min and the flow of the nitrogen to be 100L/min, and finally taking the wafer from the reaction cavity.
The thickness test value of the silicon epitaxial layer prepared in example 5 is 50.1 μm, the mean value of 5 points of the resistivity test is 1072.2 Ω & cm, the surface is bright and has no fog defect, and the stacking fault density is 0/cm2Dislocation density of 0 pieces/cm2As shown in fig. 5, the resistivity sheet internal 5-point test result shows that the center region resistivity is 1180 Ω · cm, the peripheral region resistivity is 1036 Ω · cm, 1035 Ω · cm, 1013 Ω · cm, and 1097 Ω · cm in this order, and both the center and peripheral region resistivity can satisfy the requirement higher than 1000 Ω · cm.
Compared with the embodiments 1, 2, 3 and 4, under the corresponding process conditions, the epitaxial layer prepared in the embodiment 5 has good crystallization quality, bright surface without dislocation, fault and fog defect, the edge position is minimally affected by self doping, and 5 resistivity test points in the chip can meet the requirement of being higher than 1000 omega cm, namely the resistivity of the whole chip can meet the requirement. Therefore, example 5 is the most preferred embodiment of the present invention.
It is apparent that those skilled in the art can make various changes and modifications to the preparation method of the present invention without departing from the spirit and scope of the present invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is intended to include such modifications and variations.
Claims (1)
1. A method for preparing a high-resistance epitaxial layer by a heavily doped silicon substrate for a photoelectric detector is characterized by comprising the following steps:
firstly, a silicon substrate slice is arranged on an epitaxial base in an epitaxial reaction cavity, a doping pipeline and the reaction cavity of an epitaxial furnace are swept by nitrogen and hydrogen in sequence, the flow rate of the nitrogen is set to be 100L/min, the flow rate of the hydrogen is set to be 100L/min, and the sweeping time of the doping pipeline and the reaction cavity is set to be 10 min;
secondly, heating the epitaxial base, heating from room temperature to 1160 ℃, adopting a slow gradient heating method, wherein the heating rate is 15 ℃/min, keeping the temperature at 900 ℃, 950 ℃ and 1000 ℃ for 2min, introducing hydrogen chloride gas, and polishing the surface of the silicon substrate slice, wherein the flow of the hydrogen chloride is set to be 3L/min, and the polishing time is set to be 1 min;
thirdly, baking the silicon substrate slice for 3min at constant temperature to volatilize impurities on the surface of the silicon substrate slice and form an impurity depletion region on the surface;
fourthly, purging the reaction cavity by using hydrogen with flow rate periodically and rapidly changing in an alternating manner, wherein the range of the flow rate is 40L/min-400L/min, rapidly reducing the flow rate of the hydrogen from 300L/min to 40L/min, setting the time required by flow rate reduction to be 1min, and purging for 3min under the air flow; rapidly increasing the hydrogen flow from 40L/min to 400L/min, setting the time required for the flow increase to be 1min, and purging for 3min under the gas flow; rapidly reducing the hydrogen flow from 400L/min to 40L/min, setting the time required for flow reduction to be 1min, and purging for 3min under the gas flow; rapidly increasing the hydrogen flow from 40L/min to 400L/min, setting the time required for the flow increase to be 1min, and purging for 3min under the gas flow; rapidly reducing the hydrogen flow from 400L/min to 40L/min, setting the time required for flow reduction to be 1min, rapidly increasing the hydrogen flow from 40L/min to 300L/min, setting the time required for flow increase to be 1min, and purging for 3min under the gas flow;
fifthly, growing the first epitaxial layer, wherein the hydrogen flow is set to be 300L/min, introducing gaseous trichlorosilane, the flow is set to be 33L/min, the growth time is 2min, and then reducing the temperature of the reaction cavity by 30 ℃;
sixthly, purging the reaction cavity by using hydrogen with the flow rate periodically and rapidly changing in an alternating manner, wherein the range of the flow rate is 40L/min-400L/min, the flow rate of the hydrogen is rapidly reduced from 300L/min to 40L/min, the time required by flow rate reduction is set to be 1min, and purging is carried out for 3min under the air flow; rapidly increasing the hydrogen flow from 40L/min to 400L/min, setting the time required for the flow increase to be 1min, and purging for 3min under the gas flow; rapidly reducing the hydrogen flow from 400L/min to 40L/min, setting the time required for flow reduction to be 1min, and purging for 3min under the gas flow; rapidly increasing the hydrogen flow from 40L/min to 400L/min, setting the time required for the flow increase to be 1min, and purging for 3min under the gas flow; rapidly reducing the hydrogen flow from 400L/min to 40L/min, setting the time required for flow reduction to be 1min, rapidly increasing the hydrogen flow from 40L/min to 300L/min, setting the time required for flow increase to be 1min, and purging for 3min under the gas flow;
seventhly, growing a second epitaxial layer, wherein the hydrogen flow is set to be 300L/min, gaseous trichlorosilane is introduced, the flow is set to be 33L/min, borane with the purity specification of 50ppm is introduced to serve as epitaxial layer doping gas, the flow is set to be 50sccm, and the epitaxial layer growth time is 34 min;
eighthly, stopping heating after the epitaxial layer grows, sequentially purging the epitaxial reaction cavity for 10min by using hydrogen and nitrogen, setting the flow of the hydrogen to be 100L/min and the flow of the nitrogen to be 100L/min, and finally taking the wafer from the reaction cavity;
the silicon substrate slice is a heavily doped borosilicate substrate slice with the diameter of 150mm, and the resistivity is lower than 0.02 omega cm;
the thickness of the prepared epitaxial layer is 45-55 mu m, and the resistivity is higher than 1000 omega-cm.
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| CN104947183A (en) * | 2015-05-29 | 2015-09-30 | 中国电子科技集团公司第四十六研究所 | Production method of heavily phosphorus-doped thin substrate silicon epitaxial layer for Schottky devices |
| CN106816499A (en) * | 2017-02-15 | 2017-06-09 | 华灿光电（浙江）有限公司 | Preparation method of light-emitting diode epitaxial wafer |
| CN107099840A (en) * | 2017-04-18 | 2017-08-29 | 中国电子科技集团公司第四十六研究所 | A kind of preparation method of transient voltage suppressor silicon epitaxial wafer |
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| CN104947183A (en) * | 2015-05-29 | 2015-09-30 | 中国电子科技集团公司第四十六研究所 | Production method of heavily phosphorus-doped thin substrate silicon epitaxial layer for Schottky devices |
| CN106816499A (en) * | 2017-02-15 | 2017-06-09 | 华灿光电（浙江）有限公司 | Preparation method of light-emitting diode epitaxial wafer |
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