CN108520490A - 基于gpgpu中的2d桌面光栅化操作的实现 - Google Patents

基于gpgpu中的2d桌面光栅化操作的实现 Download PDF

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CN108520490A
CN108520490A CN201810340823.7A CN201810340823A CN108520490A CN 108520490 A CN108520490 A CN 108520490A CN 201810340823 A CN201810340823 A CN 201810340823A CN 108520490 A CN108520490 A CN 108520490A
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CN108520490B (zh
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杨盼
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Changsha In Blx Ic Design Corp
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Changsha In Blx Ic Design Corp
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

本发明公开了一种GPGPU的2D桌面光栅化操作的实现方式，包括读取帧存源数据以及目标数据对象，将数据存入双口RAM，再从RAM取数据进行字节对齐再送入光栅化操作引擎,光栅化引擎输出对应的逻辑操作结果写入FIFO，再启动Burst写回帧存操作。整个光栅化操作过程简单，高效，极大的加速了复杂3D应用场景下2D桌面流畅度。

Description

基于GPGPU中的2D桌面光栅化操作的实现
技术领域
本发明主要涉及到基于GPGPU中的2D桌面系统硬件设计领域，特指基于GPGPU中的2D光栅化操作的实现。
背景技术
操作系统按应用领域分为桌面操作系统，服务器操作系统，嵌入式操作系统。桌面操作系统应用最为普遍，桌面操作系统基本功能是实现人机交互，人机交互过程中追求流畅的桌面窗口显示效果从而带来友好的体验，目前主流桌面系统有MAC OS，LINUX，WINDOWS，桌面系统主要操作对象为像素操作，而像素操作的特点在于数据量庞大，操作次数极其频繁。
由软件直接实现桌面功能操作，桌面性能极大的依赖CPU性能，为了摆脱对CPU的完全依赖，通过GPGPU实现硬件加速。在某些应用情景下，GPGPU绘图引擎被负责的3D绘图占据时，2D桌面使用时会造成卡顿，而独立2D桌面光栅化操作实现2D桌面的全加速，不占用3D绘图引擎资源
发明内容
本发明要解决的问题就在于：针对现有的桌面应用需求，本发明提供一种相对简单、硬件资源占比很小、性能极高地光栅化操作的硬件实现方式，为2D桌面实现加速且不受限于复杂的3D应用场景，达到流畅的2D桌面显示效果。
与现有技术相比，本发明的优点就在于：1、性能极高，本发明提出的光栅化操作的实现采用流水方式实现以及高效率Burst方式写回帧存，Burst操作可达到128x256bit，相比1024x768显示分辨率，一次可连续操作一行像素；2、逻辑资源少，本发明支持的光栅化16种操作可直接由逻辑并行实现，电路结构相对简单；3、可复用性强：本发明采用独立的2D光栅化逻辑实现，采用标准的本地总线配置接口接收2D操作命令，采用标准的内部存储总线接口访问帧存，可重用性强，能在GPGPU高性能通用型图形芯片设计中重复使用。
附图说明
图1是光栅化操作流水线结构框图。
具体实施方式
以下将结合附图和具体实现对本发明做进一步详细说明。
本发明中光栅化引擎包括16种逻辑操作，包括黑色，白色，空操作，目标取反，源颜色，源反色，源颜色或目标反色，源颜色与目标反色，目标颜色或源反色，目标颜色与源反色，目标颜色或源颜色，目标颜色或源颜色再取反，目标颜色与源颜色，目标颜色与源颜色再取反，源颜色异或目标颜色，源颜色异或目标颜色再取反。采用两级流水线实现，第一级输出16种逻辑操作值，第二级输出16种逻辑操作选择后的值。
如图1所示，本发明的2D桌面光栅化操作的实现分为四个阶段，第一阶段：读取帧存源数据以及目标数据对象，将数据存入双口RAM。第二阶段：取双口RAM的数据，进行字节对齐再送入光栅化操作引擎，字节对齐采用了全流水方式，数据两级缓存器后根据起始地址获取128bit像素值，流水送入光栅化引擎单元。第三阶段：光栅化引擎为256bit的光栅化操作，选择对应的逻辑操作结果输出。逻辑操作后由控制单元产生相应字节掩码信息以及缓存两拍依据目标起始地址控制输出，一并写入FIFO。第四阶段，FIFO非空状态可直接启动写帧存Burst操作，此处Burst操作若存储带宽足够的情况下，也可以达到全流水操作性能。整个光栅化操作过程简单，高效，极大的加速了复杂3D应用场景下2D桌面流畅度。

Claims (1)

1.GPGPU芯片设计中2D桌面光栅化操作的实现方法，包括16种方式，其特征在于采用了256bit全流水操作，依据源和目标起始地址采用流水方式对其光栅化操作的像素，实现了单周期8个像素（RGBA,32bit）的光栅化操作,流水操作包括从RAM读取像素，两级缓存流水对齐，两级流水执行光栅化操作，流水写回。
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102509326A (zh) * 2010-10-06 2012-06-20 微软公司 目标独立光栅化
US20170372519A1 (en) * 2016-06-28 2017-12-28 Intel Corporation Architecture for Interleaved Rasterization and Pixel Shading for Virtual Reality and Multi-View Systems

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102509326A (zh) * 2010-10-06 2012-06-20 微软公司 目标独立光栅化
US20170372519A1 (en) * 2016-06-28 2017-12-28 Intel Corporation Architecture for Interleaved Rasterization and Pixel Shading for Virtual Reality and Multi-View Systems

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
田泽等: "并行处理二维图形加速引擎结构设计", 《计算机工程与设计》 *

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