CN108520128B - Integrated circuit design method and computer-readable storage medium - Google Patents
Integrated circuit design method and computer-readable storage medium Download PDFInfo
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- CN108520128B CN108520128B CN201810270103.8A CN201810270103A CN108520128B CN 108520128 B CN108520128 B CN 108520128B CN 201810270103 A CN201810270103 A CN 201810270103A CN 108520128 B CN108520128 B CN 108520128B
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Abstract
An integrated circuit design method and computer readable medium, the method comprising: calculating the port density of each standard cell in a specified area in the integrated circuit; selecting standard cells having a port density within a predetermined range; isolation constraints are added for the selected standard cells. The problem that the isolation constraint is unreasonably added due to the fact that the standard cell needing to be added with the isolation constraint cannot be accurately found can be solved.
Description
Technical Field
The present disclosure relates to the field of integrated circuit design, and more particularly, to an integrated circuit design method and a computer-readable storage medium.
Background
In the field of integrated circuit digital back end design, insufficient Routing resources can cause a local or large-area Congestion (Congestion) phenomenon of an integrated circuit, and the problem that a line is short-circuited or does not meet Design Rules (DRC) is caused. The insufficient winding resources are caused by the fact that the number of the winding channels cannot meet the winding requirements of the metal wires with excessive number, and the metal wires with the excessive winding channels occupy the metal wires positioned in the winding channels to cause short circuit. The purpose of routing is to connect ports (pins) of standard cells (stdcell) according to a logical relationship, if ports in a certain area are dense, a lot of metal wires are involved in the connection logical relationship, and under the condition that the number of routing layers (metal layers) is limited, the congestion problem is easy to occur.
The congestion can be reduced by reducing the port density (pin density) without changing the number of winding layers. Typically, port density is reduced by increasing the spacing between standard cells in the congested area.
The current method for increasing the distance between adjacent standard cells in a congested area is to select a specific logic cell, such as a complex logic cell of an and-or (AOI) or an and-not (OAI), and add isolation constraint (keepout margin). Composite logical units such as AOI and OAI are typical standard units with small area and large port number, and isolation constraints are added to the units to pull the space between the units, which is helpful for the purpose of relieving congestion. There are a number of problems with this approach. On the one hand, the existence of other logic units with small area and large port number, such as a four-input nand gate (ND4D), a four-input nor gate (NR4D) and the like, is not excluded except for the AOI, OAI and other composite units. On the other hand, the method of adding isolation constraints to compound units such as AOI and OAI is usually to add isolation constraints of the same size to logic units of different sizes. Although the number of ports of logic units with the same name is the same, the larger the unit size is, the larger the area is, the more abundant the routing resources are, if isolation constraints with the same size are applied to the logic units, redundancy of the added isolation constraints can be caused, and even the unit overflow can be caused under the condition that the design area is limited.
In summary, if no isolation constraint is added for a standard cell that needs to be added, the effect of solving congestion is not achieved; if isolation constraints are added to a cell that does not need to be added, the cell will overflow in the case of a tight design area, and the design will be aborted. Even if the standard cell to which the isolation constraint needs to be added can be correctly found, the above problem can be caused if the size of the isolation constraint is not properly added.
Disclosure of Invention
In view of the above, the present disclosure provides an integrated circuit design method and a computer readable storage medium, which can solve the problem of unreasonable addition of isolation constraints due to the fact that a standard cell to be added with isolation constraints cannot be accurately found.
According to a first aspect of the present disclosure, there is provided an integrated circuit design method for adding isolation constraints to standard cells, the integrated circuit design method comprising: calculating the port density of each standard cell in a specified area in the integrated circuit; selecting standard cells having a port density within a predetermined range; isolation constraints are added for the selected standard cells.
Preferably, the calculating the port density of each standard cell in the specified area of the integrated circuit comprises: calculating the monomer area according to the monomer width and the monomer height of the standard unit; calculating the number of monomers in the standard unit according to the area of the standard unit and the area of the monomers; and dividing the number of the ports of the standard unit by the number of the monomers in the standard unit to obtain the port density of the standard unit.
Preferably, the calculating the port density of each standard cell in the specified area of the integrated circuit comprises: and dividing the number of the ports of the standard cell by the area of the standard cell to obtain the port density of the standard cell.
Preferably, after calculating the port density of each standard cell, the method further comprises: calculating the port sparsity of each standard cell according to the port density of the standard cell;
preferably, the selecting standard cells having a port density within a predetermined range includes: and selecting the standard cell with the port sparsity smaller than a preset threshold value.
Preferably, the adding isolation constraints for the selected standard cell comprises: for each selected standard cell, calculating the number of isolation constraints to be added for the standard cell according to the area, the number of ports, the port density and the height and width of the single body of the standard cell; isolation constraints are added on opposite sides of the standard cell.
Preferably, the calculating the number of isolation constraints to be added for the standard cell according to the area of the standard cell, the number of ports, the threshold value of the port density, and the height and width of the single body comprises: the number of isolation constraints to be added for this standard cell is calculated according to the following equation:
Preferably, the method for adding isolation constraints in an integrated circuit further comprises: in the case where the number of calculated isolation constraints is not an integer, the calculated isolation constraints are converted to integers by rounding.
Preferably, said adding isolation constraints on opposite sides of the standard cell comprises: calculating the number of ports on two sides of the central line of the standard unit; and respectively adding isolation constraints on the two sides of the standard cell according to the number of ports on the two sides of the central line of the standard cell.
Preferably, the calculating the number of monomers on both sides of the centerline of the standard cell comprises: calculating the center line position of the standard unit according to the position coordinates, the area and the monomer height of the standard unit; calculating the number of ports on both sides of the standard cell midline according to the midline position of the standard cell and the position of each port of the standard cell
Preferably, the adding isolation constraints to the two sides of the standard cell according to the number of ports on the two sides of the central line of the standard cell includes: calculating the absolute value of the difference of the number of ports on two sides of the central line of the standard unit; if the number of the isolation constraints to be added aiming at the standard unit is larger than the absolute value of the difference, the isolation constraints with the number of the absolute value of the difference are added to one side with larger number of ports in the two sides of the midline of the standard unit, and the rest isolation constraints are uniformly added to the two sides of the midline of the standard unit; and if the number of the isolation constraints to be added aiming at the standard cell is less than or equal to the absolute value of the difference, adding all the isolation constraints on the side with the larger port number in the two sides of the midline of the standard cell.
According to another aspect of the present disclosure, there is provided a computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform the method described above.
Drawings
To more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below, and it is apparent that the drawings in the following description only relate to some embodiments of the present disclosure and do not limit the present disclosure.
FIG. 1 shows a schematic flow diagram of a method of adding isolation constraints to standard cells in an integrated circuit, according to an embodiment of the present disclosure.
FIG. 2A illustrates a schematic diagram of specifying a target area by module hierarchy according to an embodiment of the disclosure.
FIG. 2B shows a schematic diagram of specifying a target area in terms of coordinates in an integrated circuit, according to an embodiment of the disclosure.
FIG. 3 illustrates a standard cell to cell relationship in an integrated circuit design according to an embodiment of the disclosure.
FIG. 4 shows a schematic of the standard cell port sparsity value change before and after adding isolation constraints.
Fig. 5A shows the addition result using the conventional isolation constraint addition method.
FIG. 5B shows the result of the addition after rounding the isolation constraint number according to an embodiment of the disclosure.
Fig. 6 is a schematic flow chart of a method for calculating the number of left and right ports inside a standard cell according to an embodiment of the present disclosure.
Fig. 7 is a schematic diagram illustrating a method for calculating the number of left and right ports inside a standard cell according to an embodiment of the present invention, by taking a standard cell with three ports as an example.
FIG. 8 is a schematic flow chart diagram illustrating a method for adding isolation constraints on both sides of a standard cell based on the number of ports on both sides of the standard cell in accordance with an embodiment of the present disclosure.
Fig. 9 illustrates a schematic diagram of adding isolation constraints on two sides of a standard cell according to the number of ports on the two sides of the standard cell according to an embodiment of the present disclosure, taking a standard cell with 7 ports as an example.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be described below in detail and completely with reference to the accompanying drawings of the embodiments of the present disclosure. It is to be understood that the embodiments described are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the disclosure without any inventive step, are within the scope of protection of the disclosure.
The present disclosure provides a method and a computer readable storage medium for adding isolation constraints in an integrated circuit, which can add isolation constraints in a targeted manner according to the port density of a standard cell by calculating the port density of each standard cell, thereby solving the problem of unreasonable addition of isolation constraints due to the fact that a standard cell to which isolation constraints are to be added cannot be accurately found.
FIG. 1 shows a schematic flow diagram of a method of adding isolation constraints in an integrated circuit according to an embodiment of the disclosure.
In step S101, one or more target areas are specified in the integrated circuit. For example, any area in the integrated circuit may be specified as needed, and an area where a congestion problem is likely to occur is generally selected. The manner of designation of the target region may be selected as desired.
As an example, as shown in FIG. 2A, selection may be made at a module level in the integrated circuit, for example, the entire core (core) A1 may be designated as a target area, or one or some of the modules A2 may be designated as target areas. This way it is possible to purposefully select modules that are prone to congestion problems to perform the subsequent steps. Typically, a module with complex internal logic operations and many complex logic units with large port density can be specified.
As another example, as shown in fig. 2B, the target area may be specified according to coordinates, for example, an area with an excessive winding density, such as a rectangular area B1 or a corner-shaped area B2, may be specified, and the shape of the area may be set as needed, for example, but not limited to, a rectangle, a polygon, etc., and may also be a polygon with boundaries extending horizontally and vertically, for example. This way, it is possible to flexibly specify a target area of a desired shape and size as needed. In the designed boundary area, if there is a long and narrow boundary area or a corner boundary area, the problem of excessive winding density is easily caused inside the two boundary shapes, and it can be considered to assign a corresponding rectangle to the long and narrow area or assign a polygon with a corner shape to the corner area.
Of course, the embodiments of the present disclosure are not limited thereto, and in practice, a specific scheme may be selected according to a location area where congestion occurs. In addition, various target area designation modes can be mixed and used according to needs, so that the target area designation modes can be reasonably selected according to specific areas where congestion occurs. For example, one target region may be selected by the method shown in fig. 2A, another target region may be selected by the method shown in fig. 2B, and the target regions selected in the plurality of ways may be used together as the target region.
The target region is designated for subsequent addition of isolation constraints to standard cells within the target region. The area of the design region can be taken into consideration when the target region is specified, and the condition that the standard cell overflows due to the fact that isolation constraint is added too much is avoided. If the standard cell utilization is below a preset level, the entire core may be designated as the target area; if the standard cell utilization is higher than a preset level, the local area may be designated as the target area.
In step S102, the port density of each standard cell in the target area is calculated.
By way of example, the port density of a standard cell may be calculated by the following formula:
wherein sigmapIndicating the port density, N, of the standard cellpIndicates the number of ports, S, of the standard cellcThe area of the standard cell is shown. The number of ports of the standard cell and the area of the standard cell can be obtained by a tool command.
As another example, the port density of a standard cell is also calculated according to the following equation:
wherein sigmapIndicating the port density, N, of the standard cellpIndicates the number of ports, S, of the standard cellcDenotes the area of the standard cell, WuDenotes the width of the monomer, HuIndicating the monomer height.
The principle of the above equation (2) is explained below with reference to fig. 3.
FIG. 3 illustrates the relationship of standard cells to monomers in an integrated circuit design. As shown in fig. 3, during the placement of the standard cells, the upper and lower boundaries of the standard cells coincide with the grid lines of the row (row), and the left and right boundaries of the standard cells coincide with the grid lines of the unit (unit). The monomer is the minimum area unit in the row, and the boundary of the standard unit is overlapped with the grid line of the row and the monomer, so that the area of the standard unit can be divided by the monomer. In the example of fig. 3, one standard cell occupies the area of four monomers.
Considering that the number of ports of the standard cell is less than or equal to the number of monomers in the standard cell, and the result of dividing the number of ports by the number of monomers in the standard cell is in the range of 0 to 1, the embodiment of the present disclosure is evolved on the basis of the above equation (1), and the number of monomers in the standard cell is used to represent the area of the standard cell, so that the calculated port density result is in the range of 0 to 1. Therefore, equation (1) evolves to: and standard unit port density is equal to the number of standard unit ports/the number of standard unit monomers. As can be seen from the above analysis, the number of standard unit monomers is defined as standard unit area/standard unit monomer area. The area of a standard cell can be obtained by a tool command, and the cell area is the cell width × the cell height, wherein the cell width and the cell height can be captured from a technology file (technology file) by a command. By the above derivation, equation (2) is obtained, and thus the port density of the standard cell can be calculated.
In step S103, the port sparsity of each standard cell is calculated. The embodiments of the present disclosure provide a concept of standard cell port sparsity, which is inversely related to standard cell port density, and for example, the standard cell port sparsity may be set as: standard cell port sparsity-1-standard cell port density. Standard cell port sparsity can effectively reflect the degree to which isolation constraints need to be added. The more isolation constraints a standard cell adds, the greater the port sparsity of the standard cell will become and vice versa. The change in the standard cell port sparsity value is positively correlated with the magnitude of the added isolation constraint.
This step is optional, and in some embodiments, the processing and calculation of the subsequent steps may also be performed directly according to the port density of the standard cell.
In step S104, a standard cell that needs to be added with blocking constraint is selected, and specifically a standard cell whose port sparsity is within a predetermined range may be selected. It is known that the standard cell port sparsity is between 0 and 1, so we can set the threshold at any value between 0 and 1. Any port sparsity below the threshold in the target area is screened out.
FIG. 4 shows a schematic of standard cell port sparsity before and after adding isolation constraints. In the example of fig. 4, with a threshold of 0.3, standard cells with a port sparsity less than or equal to 0.3 are screened. And adding isolation constraints to the screened standard cells, wherein the sparsity of the standard cells after the constraints are added reaches a threshold level. Generally, the larger the set threshold value is, the larger the number of standard cells screened out; the smaller the port sparsity, the more isolation constraints need to be added for standard cells. The threshold value of the port sparsity can be reasonably set according to the size of the target area, and the situation that the standard cell overflows due to overlarge threshold value, so that the design flow is interrupted is avoided.
This completes the screening of standard cells. In the screening process, as an example, when the target area is specified, the standard cells in the target area may be collected by a command, and then the number of the collected standard cells may be found by the command. When the port sparsity is calculated, traversal can be performed according to the number sequence number of the standard cells, and the standard cell port sparsity is calculated for each collected standard cell, so that a set of the standard cell port sparsity is formed. When the standard units needing to be added with the isolation constraint are screened, sequentially taking out the sparseness of each standard unit in the set, comparing the sparseness with a set threshold, and finally determining the standard units needing to be added with the isolation constraint according to the corresponding relation between the sparseness and the positions of the standard units in the set if the sparseness is smaller than or equal to the set threshold.
In step S105, the number of isolation constraints that need to be added is calculated for each standard cell selected. In this embodiment, the number of isolation constraints that need to be added can be calculated by the following equation:
wherein N iskmIndicating the number of isolation constraints to be added, NpIndicates the number of ports of the standard cell, δthThreshold value, S, representing the port sparsity of a standard cellcDenotes the area of the standard cell, WuDenotes the width of the monomer, HuIndicating the monomer height. In some embodiments, δthThe value of (c) may be set manually.
The basic principle of equation (3) is explained in detail below.
The purpose of adding the isolation constraint in the embodiment of the present disclosure is to enable the port sparsity of the screened standard cell to reach a set threshold, and then for the screened standard cell, the port sparsity of the screened standard cell after the isolation constraint is added needs to satisfy the following equation:
wherein N iskmIndicating the number of isolation constraints to be added, NpIndicates the number of ports of the standard cell, δthThreshold, N, representing port sparsity of standard cellsuIndicates the number of monomers in the standard unit.
As can be seen from the above analysis, the number of monomers in the standard cell is equal to the area of the standard cell divided byThe amount of the monomer is calculated in terms of the area of the monomer, i.e.,
substituting equation (5) into equation (4) results in equation (3).
In step S106, the calculated isolation constraint number is rounded. The threshold value of the port sparsity is any value between 0 and 1, so that the number of the isolation constraints calculated in the step S105 is not necessarily an integer. In this embodiment, the number of isolation constraints may be rounded up, so that the numerical result is an integer number of monomers, which is closer to the actual value of the isolation constraints.
Fig. 5A and 5B show the addition result of the conventional isolation constraint addition method and the addition result after rounding the number of isolation constraints according to the embodiment of the present disclosure, respectively.
The traditional mode is directly added with the isolation constraint number by a tool, and the isolation constraint number can be automatically added according to a monomer principle. Specifically, when adding the number of isolation constraints to a standard cell using an integrated circuit Compiler (IC Compiler) tool, the fractional part of the number of isolation constraints is added as an integer of 1. As shown in FIG. 5A, where N is an integer, the number of isolation constraints N calculated iskmN, the number of isolation constraints added by the tool is also n; when the calculated isolation constraint number n<Nkm<n +1, the number of isolation constraints added by the tool becomes n + 1.
Embodiments of the present disclosure round the number of isolation constraints calculated in step S105, and then add an integer number of isolation constraints using a tool. In this case, half the number of monomers may be used as a reference point, and less than half the number of monomers may be used even for 0 number of monomers; greater than half the monomer amount, even 1 monomer amount. As shown in FIG. 5B, the number of isolation constraints n calculated<＝Nkm<n +0.5, the number of the added isolation constraints is n; when the calculated isolation constraint number n +0.5<＝Nkm<n +1, the number of added isolation constraints is n + 1. Rounding by rounding to give the final additionThe number of added isolation constraints is closer to the calculated number of isolation constraints, so that the added isolation constraints are more reasonable.
When the isolation constraint is added actually, the isolation constraint value is added, and the calculation formula of the isolation constraint value is as follows: the isolation constraint value is the number of isolation constraints x the width of the cell.
In step S107, for each standard cell selected, isolation constraints are added in accordance with the calculation result of step S106.
The position of the isolation constraint is divided into an upper direction, a lower direction, a left direction and a right direction. The upper and lower directions are mainly useful for fixed standard cells, usually only a few redundant cells (spare cells) are fixed, the other standard cells are all movable, and if the standard cells are movable, i.e. not fixed (fixed), the addition of isolation constraints in the upper and lower directions is not useful. The left and right directions are applicable to all standard cells, and isolation constraints are added to the left and right sides of the standard cells in this embodiment.
The isolation constraint acts to increase the distance separation of the standard cells. The isolation constraint added by the standard cell is equivalent to the increased invisible area of the standard cell, the invisible area of the adjacent standard cell, namely the isolation constraint part, is also not allowed to be overlapped (overlapped), and the spacing between the cells can be expanded by using the isolation constraint by using a layout fine adjustment command (layout _ placement-elementary).
We have previously calculated the number of isolation constraints that each standard cell in the region should add. Isolation constraints are added to increase the spacing between cells, the primary purpose being to reduce wire wrap congestion. However, from the inside of a standard cell, the distribution of standard cell ports inside the standard cell is sparse and dense. Isolation constraints are added on the left and right sides of the standard cell, and the purpose of adding isolation constraints is to dilute the density of the ports. Therefore, the number of ports on the left and right sides inside the standard cell needs to be calculated.
In step S1071, the number of ports on the left and right sides inside the standard cell is calculated. And calculating the number of ports on the left side and the right side of the midline of the standard unit by taking the midline as a reference by the standard unit. It is necessary to calculate the value of the centerline in the x-axis first, then obtain the value of the port in the x-axis, and then compare the value of the port in the x-axis with the value of the centerline in the x-axis.
Fig. 6 is a schematic flow chart showing a method for calculating the number of left and right ports in a standard cell.
In step S201, the position of the standard cell, the area of the standard cell, the height of the standard cell, and the port name set are acquired by a command. In the present embodiment, the position of the standard cell is represented by the lower left corner coordinate of the standard cell, and the height of the standard cell is represented by the cell height.
In step S202, the x-axis coordinate of the lower left corner of the standard cell is obtained from the position of the standard cell, and the width of the standard cell is calculated from the area of the standard cell and the height of the standard cell.
In step S203, the x-axis coordinate of the center line of the standard cell is calculated from the x-axis coordinate of the lower left corner of the standard cell and the width of the standard cell calculated in step S202.
In step S204, the x-axis coordinate of a port in the port name set is obtained.
In step S205, the x-axis coordinates of the port acquired in step S204 are compared with the x-axis coordinates of the center line of the standard cell calculated in step S203, and if the x-axis coordinates of the port are greater than the x-axis coordinates of the center line, step S207 is performed, and if the x-axis coordinates of the port are less than the x-axis coordinates of the center line, step S206 is performed.
In step S206, the number of ports on the left side of the standard cell is incremented by 1.
In step S207, the number of standard cell right ports is incremented by 1.
The initial value of the number of the left and right ports is 0, if the x-axis coordinate of the port is smaller than the x-axis coordinate of the central line, the port is positioned on the left side in the standard unit, the number of the left ports is added with 1, each port is sequentially traversed in a circulating mode, and the number of the left ports is counted; the same is true for counting the number of the right ports of the standard unit.
In step S208, it is determined whether all ports in the port name set have been traversed, if yes, go to step S1072 to add isolation constraints, otherwise return to step S204 for the next port in the port name set.
Fig. 7 is a schematic diagram illustrating a method for calculating the number of left and right ports inside a standard cell according to an embodiment of the present invention, by taking a standard cell with three ports as an example.
As shown in FIG. 7, the x-axis coordinate of the line in the standard cell can be calculated by the following equation:
where mid represents the x-axis coordinate of the midline and cx represents the x-axis coordinate of the bottom left corner of the standard cell.
In the example of FIG. 7, the x-axis coordinates of the three ports of the standard cell are p1x, p2x, p3x, respectively. P1x, p2x, p3x can be compared to mid, respectively. As can be seen from the figure, p1x and p2x are smaller than mid, and p3x is larger than mid, and after the comparison statistics, the number of ports on the left side of the standard cell is 2, and the number of ports on the right side of the standard cell is 1.
In step S1072, isolation constraints are added on both sides of the standard cell according to the number of ports on both sides of the standard cell.
The invention adopts the distribution of the number of ports in the unit as the guidance of the isolation constraint distribution. In the present embodiment, the absolute value of the difference between the port numbers of the left and right sides is calculated according to the following equation
Number of left ports to number of right ports
The value of the number of added isolation constraints is influenced by the set sparsity value, and may be greater than or less than the absolute value of the port number difference. When adding isolation constraint, taking the difference value of the port number as a threshold value, and when the difference value does not exceed the threshold value, adding isolation constraint on the side with more ports; and when the number of the added isolation constraints exceeds the threshold value, respectively adding the isolation constraints on both sides of the standard cell.
FIG. 8 is a schematic flow chart diagram illustrating a method for adding isolation constraints on both sides of a standard cell based on the number of ports on both sides of a line in the standard cell according to an embodiment of the present disclosure.
In step S301, the number N of left ports of the standard cell calculated in step S1071 is addedp_leftNumber N of ports on right sidep_rightAnd comparing and obtaining the absolute value of the difference value of the two as the number of threshold isolation constraints. If N is presentp_left≥Np_rightIf the number of left ports is greater than or equal to the number of right ports, step S302 is executed, otherwise step S305 is executed.
In step S302, the number of isolation constraints to be added calculated in step S106 is compared with the absolute value of the difference between the numbers of left and right ports obtained in step S301, and if the former is less than or equal to the latter, step S303 is executed, otherwise step S304 is executed.
In step S303, isolation constraints are all added to the left side of the standard cell, and the flow ends. In this step, since the number of isolation constraints to be added is less than the threshold number of isolation constraints, all isolation constraints are placed on the left side of the standard cell, the number km _ left _ n of left isolation constraints is equal to the number add _ mrgn _ n of isolation constraints to be added, no isolation constraint needs to be added on the right side, and km _ right _ n is 0.
In step S304, isolation constraints are added to both sides of the standard cell, ending the flow. Since the number of isolation constraints to be added is greater than the threshold number of isolation constraints, isolation constraint addition is performed on both sides of the standard cell. In this embodiment, an isolation constraint equal to the threshold number of isolation constraints, D _ value, is added to the left side of the standard cell, while the remaining isolation constraints are added evenly to the left and right sides of the standard cell. Specifically, the difference km _ dif between the number of isolation constraints to be added and the threshold isolation constraint number, add _ mrgn-D _ value, that is, the number of isolation constraints left after the isolation constraint threshold is filled on the left side, and then uniformly add the difference km _ dif isolation constraints on the left side and the right side of the standard cell. Km _ div is int (km _ dif/2), km _ left _ mre is km _ dif-km _ div because km _ dif may be odd or even, if even is halved, if odd is halved, there is one more, using km _ div, km _ left _ mre can just solve this problem, if km _ dif is even, km _ div is km _ left _ mre, if km _ dif is odd, km _ div is one less than km _ left _ mre. In this embodiment, to better reduce congestion, km _ left _ mre is allocated to one side with more ports, so the number km _ left _ n of isolation constraints added on the left side is D _ value + km _ left _ mre, and the number km _ right _ n of isolation constraints added on the right side is km _ div.
In step S305, the number of isolation constraints to be added calculated in step S106 is compared with the absolute value of the difference between the numbers of left and right ports obtained in step S301, and if the former is less than or equal to the latter, step S307 is executed, otherwise step S306 is executed.
In step S306, isolation constraints are added to both sides of the standard cell, ending the flow.
In step S307, isolation constraints are all added to the right side of the standard cell, and the flow ends.
The isolation constraint adding manner of steps S306 and S307 is similar to that of steps S303 and 304, and is not described herein again.
Fig. 9 illustrates a schematic diagram of adding isolation constraints on two sides of a standard cell according to the number of ports on two sides of a line in the standard cell according to an embodiment of the present disclosure, taking a standard cell with 7 ports as an example. In the example of fig. 9, there are 5 ports on the left side and 2 ports on the right side of the standard cell.
As shown in fig. 9, the difference of the subtraction of the port numbers on the left and right sides is 3, so the threshold value of this standard cell isolation constraint is 3. When the isolation constraints are added, if the number of the isolation constraints to be added is less than or equal to 3, the isolation constraints are all added to the side with more ports, namely the left side; if the number of the isolation constraints to be added is more than 3, the standard cells are placed on the left side and the right side. As can be seen in the example of fig. 9, the isolation constraint threshold of the 7-port standard cell is 3, and when the number of isolation constraints to be added is 1, 2, and 3, respectively, the isolation constraints are within the threshold range and are all added on the left side of the standard cell as shown in the left half of fig. 9. When the number of isolation constraints to be added is 4, 5, 6, respectively, exceeding the threshold value of 3, 3 isolation constraints are added to the left side of the standard cell, and the remaining isolation constraints are added to the left and right sides. For example, when the number of isolation constraints to be added is 4, 3 isolation constraints are added to the left side of the standard cell, and the fourth isolation constraint, i.e., the first isolation constraint that exceeds the threshold, is added to the side where there are more ports, i.e., the left side. Similarly, when the number of isolation constraints to be added is 5, 3 isolation constraints are added to the left of the standard cell, the 4 th isolation constraint is added to the left of the standard cell, the 5 th isolation constraint is added to the right of the isolation cell, and so on. That is, when the number of isolation constraints to be added exceeds the threshold number, for the part of the isolation constraints exceeding the threshold, the part is first swung from the side with more ports, and then the part is added in sequence on both sides of the standard cell.
Embodiments of the present disclosure also provide a computer-readable storage medium for storing instructions that, when executed by a processor, cause the processor to perform the above-described method.
By way of example, embodiments of the disclosure may also be described in the context of machine-executable instructions, such as those included in program modules, being executed in devices on target real or virtual processors. Generally, program modules include routines, programs, libraries, objects, classes, components, data structures, etc. that perform particular tasks or implement particular abstract data types. In various embodiments, the functionality of the program modules may be combined or divided between program modules as described. Machine-executable instructions for program modules may be executed within local or distributed devices. In a distributed facility, program modules may be located in both local and remote memory storage media.
Computer program code for implementing the methods of the present disclosure may be written in one or more programming languages. These computer program codes may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the computer or other programmable data processing apparatus, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be performed. The program code may execute entirely on the computer, partly on the computer, as a stand-alone software package, partly on the computer and partly on a remote computer or entirely on the remote computer or server.
In the context of this disclosure, a machine-readable medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination thereof. More detailed examples of a machine-readable storage medium include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical storage device, a magnetic storage device, or any suitable combination thereof.
According to the embodiment of the disclosure, by calculating the port density of each standard cell, the isolation constraint can be added in a targeted manner according to the port density of the standard cell, so that the problem that the isolation constraint is unreasonably added due to the fact that the standard cell needing to be added cannot be accurately found is solved. By screening the standard units needing to be added with the isolation constraints and calculating the number of the isolation constraints to be added to each screened standard unit, the isolation constraints can be automatically and reasonably distributed in the standard units, and the speed, accuracy and reasonability of adding the isolation constraints are improved.
The standard units are automatically screened through the algorithm, the names of the standard units do not need to be manually added, the condition of selection omission or wrong selection caused by subjective judgment of a person can be avoided, and units for adding isolation constraints do not need to be manually filled; and the screening range can be flexibly adjusted according to the size of the design area, so that the overflow of the standard unit is avoided.
The embodiment of the disclosure can add different isolation constraint values respectively according to different standard cell port densities by calculating the number of isolation constraints to be added according to the area, the number of ports, the port density of the standard cell and the height and width of the single body. Compared with the prior art that the same isolation constraint value is used for different standard units, the method solves the problems that the overflow of the units is easy to cause and the congestion cannot be effectively relieved due to unreasonable addition of the isolation constraint.
The embodiment of the disclosure calculates the number of ports on the left side and the right side inside the standard cell, and allocates the isolation constraints on the left side and the right side of the standard cell according to the number, and compared with the prior art in which the isolation constraints are added on one side of the standard cell or equal isolation constraints are added on two sides of the cell, the isolation constraints are allocated more reasonably, so that more isolation constraints are added on one side with more ports, and the congestion problem can be solved more effectively.
The embodiment of the disclosure provides various target area selection modes, such as module level selection and coordinate selection, and can mix various areas for use, and can set a single sparsity threshold value for each target area for screening, and can be very well and flexibly applied under the condition of limited area.
The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure, and various modifications and changes may be made to the present disclosure by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.
Claims (11)
1. An integrated circuit design method for adding isolation constraints to standard cells, the integrated circuit design method comprising:
calculating the port density of each standard cell in a specified area in the integrated circuit;
selecting standard cells having a port density within a predetermined range;
an isolation constraint is added for the selected standard cell,
wherein the adding isolation constraints for the selected standard cell comprises:
for each selected standard cell;
calculating the number of isolation constraints to be added for the standard unit according to the area, the number of ports, the port density and the height and width of the single body of the standard unit;
isolation constraints are added on opposite sides of the standard cell.
2. The method of claim 1, wherein calculating the port density of each standard cell in a given area of the integrated circuit comprises:
calculating the monomer area according to the monomer width and the monomer height of the standard unit;
calculating the number of monomers in the standard unit according to the area of the standard unit and the area of the monomers;
and dividing the number of the ports of the standard unit by the number of the monomers in the standard unit to obtain the port density of the standard unit.
3. The method of claim 1, wherein calculating the port density of each standard cell in a given area of the integrated circuit comprises:
and dividing the number of the ports of the standard cell by the area of the standard cell to obtain the port density of the standard cell.
4. The method of claim 1, wherein after said calculating the port density of each standard cell in a given area of the integrated circuit, further comprising:
and calculating the port sparsity of each standard cell according to the port density of the standard cell.
5. The method of claim 4, wherein selecting standard cells having a port density within a predetermined range comprises:
and selecting the standard cell with the port sparsity smaller than a preset threshold value.
6. The method of claim 1, wherein calculating the number of isolation constraints to be added for the standard cell based on the area of the standard cell, the number of ports, the threshold for port density, and the height and width of the cell comprises:
the number of isolation constraints to be added for this standard cell is calculated according to the following equation:
7. The integrated circuit design method of claim 6, further comprising: in the case where the number of calculated isolation constraints is not an integer, the calculated isolation constraints are converted to integers by rounding.
8. The method of claim 1, wherein adding isolation constraints on opposite sides of the standard cell comprises:
calculating the number of ports on two sides of the central line of the standard unit;
and respectively adding isolation constraints on two sides of the central line of the standard unit according to the number of ports on the two sides of the central line of the standard unit.
9. The method of claim 8, wherein calculating the number of cells on either side of the centerline of the standard cell comprises:
calculating the center line position of the standard unit according to the position coordinates, the area and the monomer height of the standard unit;
and calculating the number of ports on two sides of the central line of the standard unit according to the central line position of the standard unit and the positions of all the ports of the standard unit.
10. The method of claim 8, wherein the adding isolation constraints on the two sides of the centerline of the standard cell according to the number of ports on the two sides of the centerline of the standard cell comprises:
calculating the absolute value of the difference of the number of ports on two sides of the central line of the standard unit;
if the number of the isolation constraints to be added aiming at the standard unit is larger than the absolute value of the difference, the isolation constraints with the number of the absolute value of the difference are added to one side with larger number of ports in the two sides of the midline of the standard unit, and the rest isolation constraints are uniformly added to the two sides of the midline of the standard unit;
and if the number of the isolation constraints to be added aiming at the standard cell is less than or equal to the absolute value of the difference, adding all the isolation constraints on the side with the larger port number in the two sides of the midline of the standard cell.
11. A computer readable storage medium storing instructions that, when executed by a processor, cause the processor to perform the integrated circuit design method of any one of claims 1 to 10.
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