CN108494523B - Multi-CRC coding method of Polar code - Google Patents
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- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
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- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
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Abstract
The invention discloses a multi-CRC coding method of polar codes, belonging to the technical field of communication. Dividing the information source bit code word into s sub-blocks, wherein each sub-block corresponds to a CRC (cyclic redundancy check), and adjusting the bit length contained in each sub-block to obtain the final bit number contained in each sub-block; and obtaining source bit code words after multi-CRC cascade connection, transmitting the source bit code words to a receiving party for demodulation after polar code coding matrix and modulation to obtain soft information of the coded code words, calculating the SC List decoder with multi-CRC, and starting the SC List decoder with multi-CRC to finish decoding calculation in sequence from the beginning to the end. The invention adopts the optimal mode to embed a plurality of CRCs, improves the overall efficiency and obtains better error correction capability of polar codes.
Description
Technical Field
The invention belongs to the technical field of communication, and particularly relates to a multi-CRC coding method of polar codes.
Background
In 2009 Arikan proposed the polar code channel coding theory, and for the first time proved that polar code is an error correction coding scheme which can theoretically reach the channel capacity, has lower coding and decoding complexity, is flexible, simple and convenient, and is extremely easy to operate. During year 2016, 11/month and 14/18, Polar code channel coding scheme was adopted by 3GPP as a control channel standard scheme in the 5G-eMBB scenario at 3GPP RAN1#87 conference held by Reno, usa.
As is well known in the art, the SCL + multi-CRC coding scheme of polar codes aims to reduce decoding delay and decoding complexity; for example, reference [1] for "polar code of multiple CRC and its application" of Guo, History, et al, and reference [2] for "intra-block CRC-assisted polar code trellis-based decoding" of Weekly, Zhang, et al; however, the polar code information sets of the above two documents are uniformly divided into subblocks, as shown in fig. 1, each subblock adopts a tail part to cascade a CRC; such a uniform concatenated embedded CRC is not a BER performance optimum.
Disclosure of Invention
In order to meet the best BER performance requirement of the polar code, the traditional method of uniformly embedding CRC at the encoding end is abandoned, the CRC embedding position is further optimally arranged by adjusting the length of each subblock divided by the polar code, and then an SCL + multi-CRC decoding method of a self-adaptive List is carried out in the subblock of a code word, in particular to a multi-CRC encoding method of the polar code.
The method comprises the following specific steps:
step one, aiming at a certain string of information source bit code words, uniformly dividing an information bit set into s subblocks according to the requirements of a user;
step two, the number of the cascaded CRC is set as s, and each sub-block corresponds to one CRC;
step three, respectively adjusting the bit length contained in the s subblocks to obtain the final bit number contained in each subblock;
the method comprises the following specific steps:
step 301, initially setting a channel model of the polar code, a code length and a code rate of the polar code, a subchannel set where the information bit is located and a subchannel set corresponding to the frozen bit determined according to the channel condition.
Step 302, performing simulation according to the preliminary set value, and respectively calculating log-likelihood ratio LLR expectation of the subchannel output where the information bit of each subblock is located;
the LLR for the subchannel output in which the information bit of the mth subblock is located is desirably λm：
Where j is the output position of the subchannel, [1,2]mA set of labels representing information bits within the mth sub-block;is a positionThe bit at j decodes the decision, |, which represents an absolute value operation.
Step 303, ranking the LLRs of the s sub-blocks according to the sequence from small to large;
the ranking is 1,2, 3, ….
304, distributing the subblocks corresponding to the ranking to the code word bits with the same ranking;
the bit number which is sequentially allocated to each ranked sub-block for the first time is as follows:
symbol
Indicating a rounding down. For the first row named subblock, M is allocated1The number of bits of length;
RN is the total length of the source bit code word;
step 305, calculating the number D of the remaining bits of the source bit code word;
D＝RN-(M1+M2+,...,+Mm+Ms)；
D＜s。
step 306, filling the remaining D bits from the largest sub-block in sequence, wherein each sub-block is filled with one bit until the completion of the filling.
And 307, obtaining the final bit number contained in each sub-block.
Step four, aiming at the s subblocks which comprise the bit numbers with different lengths after adjustment, according to the undetectable level 2-r-2- | subblock | non-conducting phosphorAnd selecting corresponding CRC in the CRC table, and respectively cascading the CRC on each subblock.
r is the number of CRC check bits or the length of the CRC redundant block.
And step five, obtaining the source bit code word after the multiple CRC cascades, and transmitting the source bit code word to a receiving party through a channel after polar code coding matrix and modulation.
And step six, after receiving the modulation symbols, the receiver demodulates the modulation symbols to obtain soft information of the coded code words and calculates a SCList decoder with multiple CRCs.
The existing decoder is provided with s CRC and corresponding s List decoders with the same size, the SC List decoder changes the size of the List according to the lengths of different coding sub-blocks on the existing basis, and each sub-block with different sizes obtains the corresponding List value.
Firstly, in the encoding stage, after each sub-block allocates code word bits with different lengths and concatenates CRC, the length ratio is approximately: 1:2:,; the List index ratio corresponding to each sub-block is correspondingly set as s: s-1:.
Obtaining the List corresponding to each sub-block according to the index proportion, wherein the List is respectively: l is1＝2θ+s，L2＝2θ+(s-1)，...Ls-1＝22 +θ，Ls＝21+θ(ii) a And theta is a natural number.
List can only be adjusted to 1 at a minimum, so when θ ≦ s, L1＝L2＝…＝Ls＝1。
Then, the size of the List in each block is adjusted to obtain the SC List decoder with multiple CRC.
And step seven, starting the SC List decoder with multiple CRC to finish decoding calculation in sequence from beginning to end.
And the CRC in each sub-block completes the path selection in each sub-block, if the CRC check in a certain sub-block is not 0, the CRC in the sub-block selects a path with the highest LLR reliability as a decoding result.
The invention has the advantages that:
1) the polar code is embedded into a plurality of CRC in an optimal mode in a multi-CRC application system; better error correction capability of polar code can be obtained.
2) The length of each subblock in the source code word is divided according to the reliability, the reliability is poor when the length is short, a List with a large numerical value can be selected for carrying out targeted decoding operation in List-SC decoding, a large List value is targeted to a small block, the intra-block decoding operation is completed in a short time, and high intra-block error correction capability is obtained.
Drawings
Fig. 1 is a conventional multi-CRC and other uniform embedding cascading scheme for polar codes in the prior art.
FIG. 2 is a flow chart of a multi-CRC encoding method of polar codes according to the present invention.
FIG. 3 is a flow chart of the present invention for adjusting the bit length size in each sub-block separately;
FIG. 4 is a schematic diagram of different CRC concatenations respectively on subblocks of different lengths according to the present invention;
FIG. 5 is a schematic diagram of SCL decoding of a single CRC according to the present invention;
FIG. 6 is a diagram illustrating SCL decoding of s CRCs according to the present invention;
FIG. 7 is a diagram illustrating SCL decoding with multiple CRCs according to the present invention;
FIG. 8 is a diagram of performance simulation of the multiple CRC encoding method for polar codes according to the present invention.
Detailed Description
The following describes in detail a specific embodiment of the present invention with reference to the drawings.
The invention provides a code length less than 210The polar code is a multi-Cyclic Redundancy Check (CRC) embedded coding and decoding method, the multi-CRC embedding method is to segment code words when the polar code is coded, each segment is cascaded with a CRC, and the CRC check is used as a path selector when the segment is decoded; the invention optimizes the multi-CRC position of the segmented cascade embedded in the cascade. In polar coding, the invention divides code words into subblocks with unequal bit lengths through optimized SCL + multi-CRC (complementary decoding list + multi-CRC) coding and decoding, CRC is embedded at equal intervals, and the decoded Bit Error (BER) performance is better than the BER of polar codes of traditional single CRC cascade and uniform embedded CRC cascade.
As shown in fig. 2, the specific steps are as follows:
step one, aiming at a certain string of information source bit code words, equally dividing an information bit set into s subblocks according to the requirements of a user;
the invention adopts a simulation means to divide the sizes of the sub-blocks, and the likelihood ratio or Log Likelihood Ratio (LLR) of the decoding bits plays a role in determining the pruning operation in the expanding and pruning processes of the traditional SCL decoding path. The present invention is therefore based on the principle that the LLR magnitudes of the subchannel outputs within a given sub-block are expected to be equal or close, and then a uniform division of the sub-block sizes is made. This principle of equal or close output LLR magnitudes for sub-channels within a sub-block is a feature of the present invention.
Step two, the number of the cascaded CRC is set as s, and each sub-block corresponds to one CRC;
the number of block concatenated CRCs is determined as required, and not less than one CRC is called multi-CRC.
Step three, respectively adjusting the bit length contained in the s subblocks to obtain the final bit number contained in each subblock;
as shown in fig. 3, the specific steps are as follows:
step 301, initially setting a channel model of polar code, a code length and a code rate of a limited long polar code, a sub-channel set where information bits are located and a sub-channel set corresponding to frozen bits determined according to a channel model condition.
Determining the channel model as a rayleigh channel: y isi＝xi+ni；niIs white Gaussian noise, xiIs the encoder output signal, yiIs a signal at the input of the decoder, here
After determining the channel model, selecting a polarization kernel
Log by krk inner product2Polarization matrix generated after (N) times of expansion
As the basic polarization matrix of the polar code with code length N.
Sub-channel where information bit is locatedAre collected into
The set of sub-channels corresponding to the frozen bits is
Subchannel set where code rate R is information bit of polar code
Set of subchannels corresponding to frozen bits
The ratio of the number of (A):
n satisfies
Wherein freeze set bit selection
Step 302, performing simulation according to the preliminary set value, and respectively calculating log-likelihood ratio LLR expectation of the subchannel output where the information bit of each subblock is located;
the LLR for the subchannel output in which the information bit of the mth subblock is located is desirably λm：
Where j is the output position of the subchannel, [1,2]mA set of labels representing information bits within the mth sub-block;
is the bit decode decision at position j, |, represents an absolute value operation.
Step 303, ranking the LLRs of the s sub-blocks according to the sequence from small to large;
the ranking is 1,2, 3, ….
304, according to the sub-blocks corresponding to the ranking, allocating the bit length of the code word which is the same as the ranking;
the length of each block is taken as the ranking value occupied by the LLR average absolute value of the equally divided blocks, and the ranking value is called as the initial allocation of the size proportion of each sub-block.
The bit number which is sequentially allocated to each ranked sub-block for the first time is as follows:
symbol
Indicating a rounding down. For the first row named subblock, M is allocated1The number of bits of length; the sub-block of the rank M is divided into the bit length of Mm. RN is the total length of the source bit code word;
assuming that m is 4, the LLR output by the four sub-blocks is expected to be ranked as: lambda [ alpha ]3，λ1，λ4And λ2According to the SC decoding algorithm, the number of the information bit which completes decoding firstly is minimum, and the number of the sub-block where the information bit is located is also minimum;
the code word length share allocation is as follows: lambda [ alpha ]3Corresponding subblock division M1Number of bits of length, λ1Corresponding subblock division M2Number of bits of length, λ4Corresponding subblock division M3Number of bits of length, λ2Corresponding subblock division M4The number of bits of the length.
The present invention is one of the features of the present invention that follows the desired ranking of LLR values output by intra-block subchannel simulation and then assigns bit sizes within the sub-blocks based on the ranking.
Step 305, calculating the number D of the remaining bits of the source bit code word;
the sum of the bit numbers M of each sub-block after the initial allocation1+M2+,...,+MmRN ≦ so that there will be bits RN- (M)1+M2+,...,+Mm) The number of bits remaining D without participating in the allocation within each block is:
D＝RN-(M1+M2+,...,+Mm+Ms)
D＜s。
step 306, filling the remaining D bits from the largest sub-block in sequence, wherein each sub-block is filled with one bit until the completion of the filling.
The total number of discarded bits RN- (M) is the total number of discarded bits due to the fact that the number of bits of the sub-block which is allocated for the first time is less than a complete bit1+M2+,...,+Mm) Less than m; m is the number of subblocks.
Thus within the secondary block the bit allocation is: converting RN- (M)1+M2+,...,+Mm) One bit is filled from the largest sub-block to the smallest sub-block, and one bit is filled in each sub-block until RN- (M)1+M2+,...,+Mm) One bit is put out.
The reason for adding to the largest share of sub-blocks is: the larger the original share distribution is, the longer the block length is, which indicates that the channel is more reliable, and the corresponding bit error rate is lower in the decoding process; thus, properly adding a bit fraction does not disturb the error condition in the original block.
And 307, obtaining the final bit number contained in each sub-block.
Step four, aiming at the adjusted s subblocks with unequal sizes, according to the undetectable level 2 of CRC-r-2- | subblock | non-conducting phosphorAnd determining a CRC check function, selecting corresponding CRC in a CRC table, and respectively cascading the CRC on each sub-block.
r is the number of CRC check bits or the length of the CRC redundant block.
As shown in fig. 4, different CRCs are concatenated on sub-blocks of different lengths, respectively.
For example, k is used from the beginning to the end according to the SC decoding orderlDenotes a sub-block, l denotes a sub-block index, the ratio of the sub-block sizes, k1:k2:k3:k4:k5:k6:k7:k8CRC check function 2:3:1:7:1:4:6: 8:
sub-block k1Corresponds to g1(x)＝x5+x4+x3+x2+1 (International Union of telecommunication: ITU),
sub-block k2Corresponds to g2(x)＝x6+x5+x4+x3+x2+1(ITU)，
Sub-block k3Corresponds to g3(x)＝x5+x4+x3+x2+1(ITU)，
Sub-block k4Corresponds to g4(x)＝x7+x6+x2+1(ITU)，
Sub-block k5Corresponds to g5(x)＝x5+x4+x3+x2+1(ITU)，
Sub-block k6 corresponds to g6(x)＝x6+x5+x4+x3+x2+1(ITU)，
The sub-block k7 corresponds to g7(x)＝x7+x6+x2+1(ITU)，
Sub-block k8Corresponds to g8(x)＝x7+x6+x2+1(ITU)。
And step five, obtaining the source bit code word after the multiple CRC cascades, and transmitting the source bit code word to a receiving party through a channel after polar code coding matrix and modulation.
And step six, after receiving the modulation symbols, the receiver demodulates the modulation symbols to obtain soft information of the coded code words and calculates a SCList decoder with multiple CRCs.
As shown in fig. 5 and 6, the existing decoder only has a single CRC and a corresponding single List decoder, or has s CRCs and s corresponding List decoders of equal size, as shown in fig. 7, the SC List decoder employed in the present invention changes the size of the List according to the length of different encoded subblocks, and each subblock of different size obtains its corresponding List size value.
Firstly, in the coding stage, after each partitioned subblock is allocated with code word bits with different lengths and is concatenated with CRC, the length proportion is approximately as follows: 1:2:,; the List index ratio corresponding to each sub-block is correspondingly set as s: s-1:.
L is obtained according to the index proportion, and the List corresponding to each subblock is respectively1＝2θ+s，L2＝2θ+(s-1)，...Ls-1＝22 +θ，Ls＝21+θ(ii) a And theta is a natural number.
List can only be adjusted to 1 at a minimum, so when θ ≦ s, L1＝L2＝…＝Ls＝1。
Then, the size of the List in each sub-block is adjusted to obtain the SC List decoder with multiple CRC of the invention.
And step seven, starting the SC List decoder with multiple CRC to finish decoding calculation in sequence from beginning to end.
The decoding process is consistent with the calculation process of the existing decoder: and completing path selection in each sub-block from the CRC in the first sub-block to the CRC in the last sub-block, and if the CRC check in a certain sub-block is not 0, selecting a path with the highest LLR reliability as a decoding result by the CRC in the sub-block.
In the decoding design, the subblocks in the code word are taken as independent decoding objects, and the polar code decoding method of the List in the prior art is adopted aiming at the condition that a single subblock is cascaded with the CRC; selecting CRC with a certain check level according to the sizes of the subblocks, so that each subblock has independent CRC cascade with different redundancy lengths; it is a feature of the present invention to have such CRC concatenation with different redundancy lengths within a subblock.
The size of the List is closely matched with the size of the block, and finally the error correction performance of the polar code is improved under the condition of the same average List and code rate code length.
The average list is calculated as:
but when the same code rate and list are adopted
When only one CRC of (a) is SCL decoded, performance may be degraded.
As shown in fig. 8, by simulating the performance of the multi-CRC encoding method of polar codes, in the SC decoding algorithm, the single CRC-12, list-8 algorithm, the 8 CRC-7s are uniformly embedded, list-4 algorithm, and the comparison simulation of the optimally embedded 8 CRCs, list-4 algorithm, it can be known that, with the algorithm of optimally embedding CRC, the error rate of the frame is always kept to be the lowest as the signal-to-noise ratio increases, and the effect is the best.
Aiming at the SCL + CRC cascaded coding scheme and the SCL decoding method, then the scheme of selecting the correct code word by CRC is that the performance of polar code easily exceeds that of LDPC. However, the coding performance scheme of SCL + multi-CRC is more recently investigated than the performance of concatenated single CRC. The invention discloses a multi-CRC optimal cascade embedding scheme aiming at polar code coding based on the latest multi-CRC research.
Claims (2)
1. A multi-CRC coding method of Polar codes is characterized by comprising the following specific steps:
step one, aiming at a certain string of source bit code words, uniformly dividing a bit set in the code words into s subblocks according to the requirements of a user;
step two, the number of the cascaded CRC is set as s, and each sub-block corresponds to one CRC;
step three, respectively adjusting the bit length contained in the s subblocks to obtain the final bit number contained in each subblock;
the method comprises the following specific steps:
step 301, preliminarily setting a channel model of a polar code, a code length and a code rate of the polar code, a subchannel set where an information bit is located and a subchannel set corresponding to a frozen bit, wherein the subchannel set is determined according to channel conditions;
step 302, performing simulation according to the preliminary set value, and respectively calculating log-likelihood ratio LLR expectation of the subchannel output where the information bit of each subblock is located;
sub-channel output for the mth sub-block where the information bit isIs expected to be lambdam：
Where j is the output position of the subchannel, [1,2]mA set of labels representing information bits within the mth sub-block;
is the bit decoding decision at position j, | · | represents the absolute value operation;
step 303, ranking the LLRs of the s sub-blocks according to the sequence from small to large;
the ranking ranks are 1,2, 3 and … in sequence;
304, distributing the subblocks corresponding to the ranking to the code word bits with the same ranking;
the bit number which is sequentially allocated to each ranked sub-block for the first time is as follows:
symbol
Represents rounding down; for the first row named subblock, M is allocated1The number of bits of length;
RN is the total length of the source bit code word;
step 305, calculating the number D of the remaining bits of the source bit code word;
D＝RN-(M1+M2+,...,+Mm+Ms)；
D＜s；
step 306, filling the remaining D bits from the largest sub-block in sequence, wherein each sub-block is filled with one bit until the completion of the filling;
307, obtaining the final bit number contained in each sub-block;
step four, aiming at the s subblocks which comprise the bit numbers with different lengths after adjustment, according to the undetectable level 2-r-2- | subblock | non-conducting phosphorSelecting corresponding CRC from the CRC table, and respectively cascading the CRC on each subblock;
r is the number of CRC check bits or the length of a CRC redundancy block;
step five, obtaining source bit code words after multi-CRC cascade connection, and transmitting the source bit code words to a receiving party through a channel after polar code coding matrix and modulation;
step six, after receiving the modulation symbol, the receiver demodulates to obtain the soft information of the code word, and calculates the SC List decoder of the multiple CRC;
step seven, starting the SC List decoder with multiple CRC to finish decoding calculation in sequence from beginning to end;
and the CRC in each sub-block completes the path selection in each sub-block, if the CRC check in a certain sub-block is not 0, the CRC in the sub-block selects a path with the highest LLR reliability as a decoding result.
2. The method as claimed in claim 1, wherein in step six, based on s CRC and corresponding s equal-sized List decoders, the SC List decoder changes the size of the List according to different lengths of the encoded sub-blocks, and each sub-block with different size gets its corresponding List value;
firstly, in the encoding stage, after each sub-block allocates code word bits with different lengths and concatenates CRC, the length ratio is approximately: 1:2:,; correspondingly setting the List index ratio corresponding to each subblock as s: s-1:, (1., (2: 1);
obtaining the List corresponding to each sub-block according to the index proportion, wherein the List is respectively: l is1＝2θ+s，L2＝2θ+(s-1)，...Ls-1＝22+θ，Ls＝21+θ(ii) a Theta is a natural number;
list can only be adjusted to 1 at a minimum, so when θ ≦ s, L1＝L2＝…＝Ls＝1；
Then, the size of the List in each block is adjusted to obtain the SC List decoder with multiple CRC.
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