CN108462651A - A method of the 1394 asynchronous steaming transfer realized using DMA chain - Google Patents
A method of the 1394 asynchronous steaming transfer realized using DMA chain Download PDFInfo
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- CN108462651A CN108462651A CN201611140239.4A CN201611140239A CN108462651A CN 108462651 A CN108462651 A CN 108462651A CN 201611140239 A CN201611140239 A CN 201611140239A CN 108462651 A CN108462651 A CN 108462651A
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- Prior art keywords
- dma controller
- descriptor
- chain
- asynchronous
- dma
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9031—Wraparound memory, e.g. overrun or underrun detection
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9005—Buffering arrangements using dynamic buffer space allocation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9015—Buffering arrangements for supporting a linked list
Abstract
The invention belongs to onboard networks bussing technique fields, a kind of method for the 1394 asynchronous datas transmission realized using dma controller descriptor chain is proposed based on 1394 Open Host Controller Interface (OHCI) specifications, this method extends to the realization of asynchronous data and isochronous data transfers.The design scheme core of the present invention is the application method of dma controller descriptor chain.Based on 1394 OHCI agreements sending and receiving for asynchronous data is realized using the descriptor controller and descriptor pointer of dma controller.
Description
Technical field
The invention belongs to onboard networks bussing technique fields, a kind of using DMA controls based on 1394OHCI protocol realizations
The method for the 1394 asynchronous datas transmission that device descriptor chain is realized.
Background technology
Comprehensive task processor (IMP) is the key foundation platform of avionics system, have data, Graphics/Image and
The comprehensive treatment capability and system storage capacity of video.Input/output module abbreviation IOM modules, are the component parts of IMP, are
Ensure the core support module of airfight task-cycle.Input/output module is responsible for system administration, non-optical fiber interface data connect
It transmits/receives and send, inside and outside protocol conversion and Time Service.
IOM modules in comprehensive task processor are configured with special 1394B interfaces, using double remaining backup forms and C
Link terminal and Ku/Ka satellite link terminals are communicated, and system telemetry and investigation, the need for monitoring information real-time Transmission are met
It wants.1394B topological relations are as shown in Figure 1, wherein IOM1, IOM2, Ku/Ka chain terminal and C chains terminal include respectively that 2 tunnels are independent
1394B bus interface includes 3 Port per road 1394B interfaces, and IOM1, IOM2 are located inside IMP, backup each other.1394B is total
Line interface uses S400Beta operating modes, transmission rate 400Mbps.
Task system is using asynchronous data packet and C links terminal and Ku/Ka satellite link terminals in avionics system
It is communicated, completes the biography down of vedio data, be based on 1394OHCI agreements, using dma controller descriptor chain, realized different
Step flow data sends and receives, can the big datas transmission speed slow problem such as effective solution avionics system video,
Meet the requirement that task system passes down vedio data.
Invention content
A method of the 1394 asynchronous steaming transfer realized using DMA chain, 1394OHCI agreements support a plurality of types of DMA
Controller, each type of dma controller have oneself independent register space, support at least one dma controller description
Symbol.
Table 1DMA controllers and descriptor relationship correspond to table
The dma controller that this method is received using asynchronous transmission requests and whens waiting is realized the transmission of asynchronous data packet and is connect
It receives, operation of the dma controller to buffer circle is described using dma controller descriptor chain.Each dma controller descriptor
Corresponding one can DMA buffer, DMA buffer descriptor describes the essential information of buffering area, setting hardware uses the buffering area
Mode information；Include the following steps：
1. equipment initial phase：
1) 1394OHCI device hardwares initialize；
2) asynchronous transmission requests dma controller descriptor chain and the initialization that dma controller descriptor chain is received whens waiting, packet
Include the essential information of buffering area, setting hardware uses the information such as the mode of the buffering area；
3) pointer of dma controller descriptor is set；
4) dma controller parameter is set, dma controller is started；
5) it enables 1394OHCI equipment and sends and receives interruption, enabled hosts are interrupted；
2. data transfer phase
1) in asynchronous data transmission phase, the buffering area for being registered to hardware is managed using buffer circle mode, software
The dma controller descriptor last-of-chain that available buffering area addition is sent in buffer circle is selected successively, is released when being sent completely
The buffering area for having completed to send is put, dma controller descriptor chain head is updated, realizes the switching of buffer circle, asynchronous fluxion
According to sending, detailed process is as shown in Figure 2.
2) stage is received in asynchronous data, the buffering area for being registered to hardware is managed using buffer circle mode, is based on
The program, dma controller descriptor last-of-chain is updated when finishing receiving, and user updates dma controller descriptor after reading data
Chain head completes the switching of buffer circle, and it is as shown in Figure 3 that asynchronous data receives detailed process.
The present invention is based on 1394OHCI specifications to propose a kind of 1394 asynchronous flows realized using dma controller descriptor chain
The method of data transmission, this method extend to the realization of asynchronous data and isochronous data transfers.Its main feature is that implementation method is simple
It is single, using flexible, can the slow problem of big datas transmission speed such as effective solution avionics system video, answered at present
In the comprehensive task processor of certain type unmanned plane, meet the requirement that task system passes down vedio data.
Its major advantage is as follows：
1. the use of buffer circle so that the efficiency of dma controller has obtained significant raising；
2. the size of buffer circle can dynamically be configured according to the demand of application and actual hardware environment；
3. asynchronous data transmission using dma controller descriptor chain by the way of, 1394 protocol definitions can be extended to
Other types data.
Description of the drawings
Fig. 1 is 1394 topological diagrams.
Fig. 2 is asynchronous data transmission process figure；
Fig. 3 is asynchronous data receive process figure.
Specific implementation mode
In initial phase, initialization asynchronous transmission requests dma controller descriptor chain is retouched with reception dma controller whens waiting
The resource needed for symbol chain is stated, dma controller parameter is set, starts dma controller.
In data transfer phase, asynchronous transmission requests dma controller descriptor chain and reception dma controller descriptor whens waiting
Chain carries out switching at runtime in a manner of buffer circle.
This programme implementation steps are as follows：
1. equipment initial phase：
1) host interface (PCI) initializes, the initialization of 1394OHCI device hardwares；
2) buffer resource application, asynchronous transmission requests and the initialization that dma controller descriptor chain resource is received whens waiting,
Essential information, setting hardware including buffering area use the mode information of the buffering area；
3) initialization dma controller pointer is first descriptor for sending and receiving corresponding descriptor chain；
4) asynchronous transmission requests and reception dma controller parameter setting whens waiting, start dma controller；
5) it enables 1394OHCI equipment and sends and receives interruption, Host Interrupt is enabled；
2. data transfer phase
1) asynchronous data is sent, and after the inspection for completing parameter legitimacy, needs to carry out mutual exclusion protection operation to equipment,
Check whether the transmission state of equipment asynchronous transmission requests dma controller can be used, if normally, software selects loop buffer successively
The dma controller descriptor last-of-chain that available buffering area addition is sent in area, discharges when being sent completely and has completed transmission
Buffering area updates dma controller descriptor chain head, realizes that the switching of buffer circle, asynchronous data send detailed process such as
Shown in Fig. 2；Otherwise, transmission flow is exited.
2) asynchronous data receives, and the reception of data is completed by interrupt mode, update DMA controls in processing of breaking in the reception
Device descriptor last-of-chain processed, if user's registration interruption callback interface, the plot for directly receiving data return to user；Upper layer
When user reads data by reading data-interface, dma controller descriptor chain head is updated, the switching of buffer circle is completed,
It is as shown in Figure 3 that asynchronous data receives detailed process.
Symbol description：
IMP:Comprehensive task processor；
IOM：Input/output module；
OHCI:Open Host Control Interface；
DMA：Direct memory access.
Claims (1)
1. a kind of method for the 1394 asynchronous steaming transfer realized using DMA chain, 1394OHCI agreements support a plurality of types of DMA controls
Device processed, each type of dma controller have oneself independent register space, support at least one dma controller descriptor；
1 dma controller of table and descriptor relationship correspond to table
The dma controller that this method is received using asynchronous transmission requests and whens waiting realizes sending and receiving for asynchronous data packet,
Operation of the dma controller to buffer circle is described using dma controller descriptor chain；Each dma controller descriptor pair
Answer one can DMA buffer, DMA buffer descriptor describes the essential information of buffering area, setting hardware using the buffering area
Mode information；It is characterized in that including the following steps：
（1）Equipment initial phase：
1) 1394OHCI device hardwares initialize；
2) asynchronous transmission requests dma controller descriptor chain and the initialization that dma controller descriptor chain is received whens waiting, including it is slow
Rush the essential information in area, setting hardware uses the information such as the mode of the buffering area；
3) pointer of dma controller descriptor is set；
4) dma controller parameter is set, dma controller is started；
5) it enables 1394OHCI equipment and sends and receives interruption, enabled hosts are interrupted；
（2）Data transfer phase
1) in asynchronous data transmission phase, the buffering area for being registered to hardware is managed using buffer circle mode, and software is successively
The dma controller descriptor last-of-chain that available buffering area addition is sent in buffer circle is selected, is discharged when being sent completely
Buffering area through completing to send updates dma controller descriptor chain head, realizes the switching of buffer circle, asynchronous data hair
Send detailed process as shown in Figure 2；
2) stage is received in asynchronous data, the buffering area for being registered to hardware is managed using buffer circle mode, is based on the party
Case updates dma controller descriptor last-of-chain when finishing receiving, and user updates dma controller descriptor chain head after reading data,
Complete the switching of buffer circle.
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| CN201611140239.4A CN108462651A (en) | 2016-12-12 | 2016-12-12 | A method of the 1394 asynchronous steaming transfer realized using DMA chain |
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|---|---|---|---|
| CN201611140239.4A CN108462651A (en) | 2016-12-12 | 2016-12-12 | A method of the 1394 asynchronous steaming transfer realized using DMA chain |
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| CN108462651A true CN108462651A (en) | 2018-08-28 |
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| CN201611140239.4A Pending CN108462651A (en) | 2016-12-12 | 2016-12-12 | A method of the 1394 asynchronous steaming transfer realized using DMA chain |
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| CN1658613A (en) * | 2004-02-20 | 2005-08-24 | 国际商业机器公司 | Method and system for facilitating inter-DSP data communications |
| US8019825B1 (en) * | 2006-12-01 | 2011-09-13 | Marvell International Ltd. | Packet buffer apparatus and method |
| CN101937406A (en) * | 2009-06-29 | 2011-01-05 | 研祥智能科技股份有限公司 | Method and system for driving 1394 devices in VxWorks operating system |
| CN103064808A (en) * | 2011-10-24 | 2013-04-24 | 北京强度环境研究所 | Priority adjustable multiple-channel direct memory access (DMA) controller |
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