CN108462383B - Isolated single-inductor two-stage power factor correction converter and control method thereof - Google Patents

Isolated single-inductor two-stage power factor correction converter and control method thereof Download PDF

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CN108462383B
CN108462383B CN201810339145.2A CN201810339145A CN108462383B CN 108462383 B CN108462383 B CN 108462383B CN 201810339145 A CN201810339145 A CN 201810339145A CN 108462383 B CN108462383 B CN 108462383B
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switching tube
voltage
capacitor
winding
converter
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CN108462383A (en
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董秀成
李浩然
陈庚
阎铁生
代莎
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Xihua University
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Xihua University
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/42Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208Arrangements for improving power factor of AC input
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention discloses an isolated single-inductor two-stage power factor correction converter and a control method thereof, belonging to the field of topological structures or control methods of power factor correction converters, and comprising the following steps: an AC source having a filter arrangement; a single-phase half-wave rectifier circuit connected to the AC power supply and rectifying an output; a bridge structure including a FLYBACK converter circuit as a first stage and a BUCK converter circuit as a second stage that utilizes the secondary winding Ns of the FLYBACK converter L as an inductor. Power factor correction and low output ripple, fast dynamic response can be achieved using only one inductive element, namely the transformer and one set of control circuitry required by the FLYBACK converter. The defects of a traditional isolated two-stage PFC converter are overcome, such as: the cascade structure of the FLYBACK converter and the BUCK converter has the problems of more main circuit devices, larger volume, two sets of control circuits, higher cost and the like.

Description

Isolated single-inductor two-stage power factor correction converter and control method thereof
Technical Field
The invention relates to an isolated single-inductor two-stage power factor correction converter and a control method thereof, belonging to the field of topological structures or control methods of power factor correction converters.
Background
The Power Factor Correction (PFC) function is to reduce harmonic pollution of power electronics to the power grid, and IEC61000-3-2 puts a limit requirement on the harmonic current injected into the power grid by the AC-DC converter. For some special industrial products, such as lighting devices, etc., it is necessary to meet the more stringent harmonic requirements of 61000-3-2C regulations. Therefore, the AC-DC converter needs to have a power factor correction function.
The conventional power factor correction method is to cascade a plurality of DC-DC converters after a single-stage PFC converter, so as to form a multi-stage PFC. The single stage PFC converter regulates and maximizes the power factor at the input to provide a dc bus voltage. And the DC-DC converter at the rear stage of the PFC converter meets the requirement of each load.
A commonly used two-stage PFC is a single-stage PFC followed by a DC-DC converter. The two-stage PFC can obtain high power factors and low input current harmonics, and simultaneously obtain better output voltage characteristics, namely smaller output voltage ripples and faster dynamic response. Because the transmitted energy needs to be processed twice, the efficiency of the whole machine is lower, two sets of control circuits are needed, and the cost is higher. The volume is larger because of more devices. The application occasions of the device are as follows: the PFC circuit is used in occasions with high requirements on the output voltage characteristics of the PFC circuit or occasions with high requirements on the quality of input current.
At present, the existing non-isolated single-inductor two-stage power factor correction converter only uses one inductor to realize two-stage energy transfer, and solves the problems that the main circuit devices of the common non-isolated two-stage converter are more, the size is larger, two sets of control circuits are required, the cost is higher, and the like. However, the demand of the switching power supply market is greater for an isolated switching converter, and the isolated switching converter generally adopts a FLYBACK (fly back) converter. If the input end of the switching power supply needs to be corrected by power factors for alternating current, the converter structure is generally a cascade structure of the FLYBACK converter and other basic converters. The basic converters are generally BOOST (BOOST) converters, BUCK (BUCK) converters, and BOOST-BOOST (BUCK-BOOST) converters. However, such a cascade structure includes a plurality of magnetic components, and the entire volume thereof becomes large. The role of the FLYBACK converter is to isolate the input end from the output end, and the role of the basic converter is to meet the requirement of the load performance of the output end or the requirement of the power factor of the input end, which depends on the front and rear stage positions of the basic converter. Since the isolated switching converter is usually required to output one or more lower voltages, the converter at the next stage of the isolated two-stage switching converter is generally a BUCK converter.
Disclosure of Invention
The invention provides a topological structure of an isolated single-inductor two-stage power factor correction converter and a voltage mode control method in a critical conduction mode (CRM) in order to solve the problems, and power factor correction, low output ripple and quick dynamic response can be realized by only using one inductive element, namely a transformer and a set of control circuit required by a FLYBACK converter. The defects of a traditional isolated two-stage PFC converter are overcome, such as: the cascade structure of the FLYBACK converter and the BUCK converter has the problems of more main circuit devices, larger volume, two sets of control circuits, higher cost and the like.
The technical scheme adopted by the invention for solving the technical problems is as follows:
the invention discloses an isolated single-inductor two-stage power factor correction converter, which comprises:
an AC source having a filter arrangement;
the unidirectional bridge type rectifying circuit is connected with the AC power supply and rectifies and outputs;
a bridge configuration comprising a FLYBACK converter circuit as a first stage and a BUCK converter circuit as a second stage, the second stage circuit using the secondary winding Ns of the transformer L of the FLYBACK converter as an inductance.
Further, the FLYBACK converter circuit is formed by connecting a switch tube Q1, a switch tube Q2, a switch tube Q3, a transformer L, a capacitor C1 and a diode D8;
the switching tube Q1, the switching tube Q2 and the switching tube Q3 are respectively driven and controlled by a signal G1, a signal G2 and a signal G3; the BUCK converter circuit and the FLYBACK converter circuit share a switch tube Q2, a switch tube Q3 and a winding Ns, and further comprise a capacitor C2 and a diode D7, the switch tube Q1 and the diode D5 are connected in series between a primary winding Np of the transformer L and the unidirectional bridge rectifier circuit, the switch tube Q2 is connected in series between the capacitor C1 and the winding Ns, and the anode of the diode D7 is connected with the anode of the capacitor C1, and the cathode of the diode D7 is connected with the collector of the switch tube Q2; the switching tube Q3 is connected with the winding Ns, and the resistor Rcs is connected in series with the resistor D8 and then connected between the switching tube Q3 and the capacitor C1; a circuit formed by connecting a resistor R with a capacitor C2 in parallel and then connecting a diode D6 in series is connected with two sides of resistors Rcs and D8 in parallel; the capacitor C2 and the resistor R form an output terminal, the output voltage is Uout, and the cathode of the capacitor C2 is grounded.
Further, the first derivative structure is as follows: on the secondary side of the transformer L, a winding Ns, a capacitor C1, a resistor Rcs, a switching tube Q3 and a switching tube Q2 are sequentially connected to form a loop; the resistor R is connected in parallel with the capacitor C2, and then connected in series with the diode D6, and the circuit is connected in parallel with the resistor Rcs and the switch tube Q3 resistor Rcs, so as to form a boost output topological structure.
Further, the second derivative structure is as follows: on the secondary side of the transformer L, the diode D8 is replaced by a switching tube Q4 to form a topology of the buck-boost type output.
Further, the unidirectional bridge rectification circuit is composed of a diode D1, a diode D2, a diode D3 and a diode D4.
Furthermore, a winding Nt is further arranged on the secondary side of the transformer, the winding Nt is connected with a sampling circuit, the voltage state of the winding Np and the winding Ns is reflected by sampling the voltage Ut at the two ends of the winding Nt, and a corresponding control signal is generated by a conditioning circuit through signals G1, G2 and G3.
Further, by adopting a critical conduction mode and a method for detecting the zero crossing point of the voltage Ucs at two ends of the sampling resistor Rcs, the method for performing voltage-voltage mode control on the sampling capacitors C1 and C2 is as follows:
step 1, sampling a voltage Ubus of a capacitor 1, and adjusting the difference between the value and a reference value to be an error voltage Ue1 through a PI;
step 2: sampling the output voltage Uout of the capacitor 2, and regulating the difference between the value of the output voltage Uout and a reference value into an error voltage Ue2 through PI;
and step 3: sampling the voltage Ut of a secondary winding Nt of the transformer L, conditioning the value of the voltage Ut by signals, extracting a zero-crossing signal, and generating a zero-crossing signal Z1;
step 4, sampling voltage Ucs at two ends of a resistor Rcs, conditioning the voltage to extract a zero-crossing signal, and generating a zero-crossing signal Z2;
step 5, the zero-crossing signal Z1 makes the sawtooth wave SW1 set to zero and start to rise, and the zero-crossing signal Z2 makes the sawtooth wave SW2 set to zero and start to rise;
step 6, comparing the error voltage Ue1 obtained in the step 1 with a sawtooth wave SW 1; when the two values are equal, a peak signal P1 is generated;
step 7, comparing the error voltage Ue1 obtained in the step 2 with a sawtooth wave SW 2; when the two values are equal, a peak signal P2 is generated;
step 8, when a zero-crossing signal Z1 is generated, switching tubes Q1 and Q3 jump, wherein G1 is equal to 1, and G3 is equal to 0; the switching tube Q2 remains in the last state;
step 9, when a peak signal P1 is generated, switching tubes Q1, Q2 and Q3 jump, wherein G1 is 0, G2 is1, and G3 is 1;
step 10, when a peak signal P2 is generated, the switching tube Q2 jumps, G2 is equal to 0, the switching tube Q1 and the switching tube Q3 keep the previous state;
step 11, when the zero-crossing signal Z1 is generated again, step 8 is entered.
Further, the method for controlling the voltage mode in the discontinuous conduction mode specifically comprises the following steps:
step 1: sampling the voltage Ubus of the capacitor C1, and adjusting the difference between the value of the voltage Ubus and a reference value into an error voltage Ue1 through PI;
step 2: sampling the voltage Uout of the capacitor C2, and adjusting the difference between the value of the voltage Uout and a reference value into an error voltage Ue2 through PI;
and step 3: sampling voltage Ucs at two ends of a resistor Rcs, conditioning the voltage to extract a zero-crossing signal, and generating a zero-crossing signal ZCD;
and 4, step 4: the rising edge of the clock CLK starts rising of the sawtooth wave SW1, and the zero-crossing signal ZCD starts rising of the sawtooth wave SW 2;
and 5: and comparing the error voltage Ue1 obtained in the step 1 with a sawtooth wave SW 1. When the two values are equal, a peak signal P1 is generated;
step 6: comparing the error voltage Ue1 obtained in the step 2 with a sawtooth wave SW 2; when the two values are equal, a peak signal P2 is generated; the corresponding driving signal and inductance current waveform diagram of the switch are obtained by the following steps:
and 7: when the clock CLK rises, the switching tube Q1 and the switching tube Q3 jump, G1 is equal to 1, and G3 is equal to 0; the switching tube Q2 remains in the last state. The Np winding current ip starts to rise from zero;
and 8: when the peak signal P1 is generated, the switching tube Q1, the switching tube Q2 and the switching tube Q3 jump, G1 is 0, G2 is1 and G3 is 1; at this time, the Np winding current IP IS suddenly changed from the peak value IP to 0, the Ns winding current IS suddenly changed from 0 to IS1, and the current IS ready to start to fall; wherein IP/IS1 IS Ns/Np;
and step 9: when the peak signal P2 is generated, the switching tube Q2 jumps, G2 is equal to 0, the switching tube Q1 and the switching tube Q3 keep the previous state; at this time, Ns winding current iS has dropped to peak iS2 in the negative direction, ready to begin rising;
step 10: the Ns winding current iS rises to zero, the switching tube keeps the previous state unchanged, and the inductive current iS kept to zero; when the next rising edge of the clock CLK comes, step 7 is entered.
The invention has the beneficial effects that:
1. the invention provides a topological structure of an isolated single-inductor two-stage power factor correction converter and a voltage mode control method under a critical conduction mode (CRM) aiming at the problems that more main circuit devices are large in size, two sets of control circuits are needed, and the like of a traditional isolated two-stage PFC converter, in particular to a cascade structure of a FLYBACK converter and a BUCK converter, and only one inductive element, namely a transformer and a set of control circuit needed by the FLYBACK converter, is used for realizing power factor correction, low output ripple waves and quick dynamic response.
2. The invention also optimizes the control method of the traditional isolated two-stage PFC converter, and comprises the control method under the critical conduction mode, wherein the control method is based on the voltage mode control method, and the control key point is to generate the Pulse Width Modulation (PWM) wave of the corresponding FLYBACK converter and the BUCK converter which normally work.
Drawings
FIG. 1 is a block diagram of the topology of the correction converter of the present invention;
FIG. 2 is a graph showing the relationship between the inductor current, the trigger signal and the switch driving signal of the correction converter of the present invention in CRM;
FIG. 3 is a control block diagram of the correction converter of the present invention in voltage mode at CRM;
FIG. 4 is a graph showing the relationship between the output voltage Uout, the bus voltage Ubus, the input current Iin and the input voltage Uin of the correction converter of the present invention operating under the control of CRM voltage mode;
FIG. 5 is a diagram of the relationship between the inductor current, the trigger signal and the switch driving signal of the correction converter of the present invention in DCM.
FIG. 6 is a control block diagram of the correction converter of the present invention in voltage mode in DCM.
Fig. 7 is a topological structure of an isolated single-inductor two-stage power factor correction converter with boost output, which is derived from the correction converter of the present invention.
Fig. 8 is a topological structure of an isolated single-inductor two-stage power factor correction converter with buck-boost output, which is derived from the correction converter of the present invention.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention.
Example 1
As shown in fig. 1, the isolated single-inductor two-stage power factor correction converter of the present invention includes: an AC source having a filter arrangement; the unidirectional bridge type rectifying circuit is connected with the AC power supply and rectifies and outputs; the bridge structure comprises a FLYBACK converter circuit as a first stage and a BUCK converter circuit as a second stage, wherein the FLYBACK converter circuit is formed by connecting a switch tube Q1, a switch tube Q2, a switch tube Q3, a transformer L, a capacitor C1 and a diode D8, the BUCK converter circuit and the FLYBACK converter circuit share a switch tube Q2, a switch tube Q3 and a winding Ns and further comprise a capacitor C2 and a diode D7, and a secondary winding Ns of the FLYBACK converter L is used as an inductor by the BUCK converter circuit; the switching tube Q1, the switching tube Q2 and the switching tube Q3 are respectively driven and controlled by a signal G1, a signal G2 and a signal G3. A switching tube Q1 and a diode D5 are connected in series between a primary winding Np of the transformer L and the unidirectional bridge rectifier circuit, a switching tube Q2 is connected in series between a capacitor C1 and a winding Ns, and the anode of the diode D7 is connected with the anode of a capacitor C1, and the cathode of the diode D7 is connected with the collector of a switching tube Q2; the switching tube Q3 is connected with the winding Ns, and the resistor Rcs is connected in series with the resistor D8 and then connected between the switching tube Q3 and the capacitor C1; a circuit formed by connecting a resistor R with a capacitor C2 in parallel and then connecting a diode D6 in series is connected with two sides of resistors Rcs and D8 in parallel; the capacitor C2 and the resistor R form an output terminal, the output voltage is Uout, and the cathode of the capacitor C2 is grounded. The unidirectional bridge rectifier circuit is composed of a diode D1, a diode D2, a diode D3 and a diode D4.
The secondary side of the transformer is also provided with a winding Nt, the winding Nt is connected with a sampling circuit, the voltage state of the winding Np and the voltage state of the winding Ns are reflected by sampling the voltage Ut at the two ends of the winding Nt, and corresponding control signals are generated by a conditioning circuit through signals G1, G2 and G3.
The above topology forms a bridge structure at the ports of the two windings Np and Ns of the transformer L, so that the current on the winding Ns can flow from the positive direction or the negative direction, that is, the energy at the AC input end flows into the capacitor C1, the energy at the capacitor C1 flows into the capacitor C2, and the energy on the capacitor C2 is supplied to the load R. Wherein D5 and D6 are used for preventing current from flowing back. The structure is as follows: an input end alternating current source AC with a filter device, a diode D1, a diode D2, a diode D3 and a diode D4 form a unidirectional bridge type rectifying circuit; the transformer L is further provided with branch circuits where switching tubes Q1 and Q2, diodes D5, D6, D7 and D8 are respectively located, and the branch circuits and the transformer L form a bridge structure, and the bridge structure enables the current is on the secondary side Ns of the transformer L to be conducted from the positive direction or the negative direction respectively; the branch in series connection of the switching tube Q1 is an input end, the branch in series connection of the diode D6 is an output end, the branch in series connection of the switching tube Q2 is a bus capacitor end, the branch in which the diodes D7 and D8 are arranged is a ground end, and the switching tube Q3 is a master switch in which the branch connected with the diode D8 and the branch connected with the diode D6 are connected with the winding Ns. The diode D5 is connected in series with the unidirectional bridge rectifying circuit at the input end to prevent the current at other parts of the circuit from flowing back to the input end; the resistor R is connected with the capacitor C2 in parallel, the capacitor C2 and the resistor R form an output end, and the output voltage is Uout; a diode D6 is connected in series with the output terminal to prevent the current at the output terminal from flowing into the rest of the circuit; the capacitor C1 and the switching tube Q2 form a bus capacitor end, the capacitor C1 stores energy with large ripples, and the energy is stored in the capacitor C1 in the form of voltage Ubus; the signal G1, the signal G2, and the signal G3 are driving signals of the switching tube Q1, the switching tube Q2, and the switching tube Q3, respectively. The winding Nt is connected with the sampling circuit, the voltage state of the winding Np and the voltage state of the winding Ns are reflected by sampling the voltage Ut at the two ends of the winding Nt, and corresponding control signals are generated by the signal conditioning circuit. A circuit formed by connecting the switching tube Q1, the switching tube Q2, the switching tube Q3, the winding Np, the winding Ns, the capacitor C1 and the diode D8 is regarded as a FLYBACK converter circuit. A circuit formed by connecting the switching tube Q2, the switching tube Q3, the winding Ns, the capacitor C2 and the diode D7 is regarded as a BUCK converter circuit. The inverter is a two-stage inverter, the first stage is a FLYBACK inverter, the second stage is a BUCK inverter, and the second stage BUCK inverter utilizes a secondary winding Ns of the FLYBACK inverter as an inductor.
Example 2
Referring to fig. 2 and fig. 3, based on the circuit structure of embodiment 1, the critical conduction mode and the zero crossing point detection method of the voltage Ucs across the sampling resistor Rcs are adopted, and the voltage mode control method on the sampling capacitors C1 and C2 is as follows:
step 1, sampling a voltage Ubus of a capacitor 1, and adjusting the difference between the value and a reference value to be an error voltage Ue1 through a PI;
step 2: sampling the output voltage Uout of the capacitor 2, and regulating the difference between the value of the output voltage Uout and a reference value into an error voltage Ue2 through PI;
and step 3: sampling the voltage Ut of a secondary winding Nt of the transformer L, conditioning the value of the voltage Ut by signals, extracting a zero-crossing signal, and generating a zero-crossing signal Z1;
step 4, sampling voltage Ucs at two ends of a resistor Rcs, conditioning the voltage to extract a zero-crossing signal, and generating a zero-crossing signal Z2;
step 5, the zero-crossing signal Z1 makes the sawtooth wave SW1 set to zero and start to rise, and the zero-crossing signal Z2 makes the sawtooth wave SW2 set to zero and start to rise;
step 6, comparing the error voltage Ue1 obtained in the step 1 with a sawtooth wave SW 1; when the two values are equal, a peak signal P1 is generated;
step 7, comparing the error voltage Ue1 obtained in the step 2 with a sawtooth wave SW 2; when the two values are equal, a peak signal P2 is generated;
step 8, when a zero-crossing signal Z1 is generated, switching tubes Q1 and Q3 jump, wherein G1 is equal to 1, and G3 is equal to 0; the switching tube Q2 remains in the last state;
step 9, when a peak signal P1 is generated, switching tubes Q1, Q2 and Q3 jump, wherein G1 is 0, G2 is1, and G3 is 1;
step 10, when a peak signal P2 is generated, the switching tube Q2 jumps, G2 is equal to 0, the switching tube Q1 and the switching tube Q3 keep the previous state;
step 11, when the zero-crossing signal Z1 is generated again, step 8 is entered.
When the ratio of the windings Np and Ns is 1: at 1, when the input voltage is 220V50Hz ac, the output voltage is 200V, and the load is 80W, the output voltage Uout, the bus voltage Ubus, the input current Iin and the input voltage Uin of the converter are shown in fig. 4.
Example 3
As shown in fig. 5 and 6, based on the circuit structure of embodiment 1, the method for controlling the voltage mode in Discontinuous Conduction Mode (DCM) specifically includes the following steps:
step 1: sampling the voltage Ubus of the capacitor C1, and adjusting the difference between the value of the voltage Ubus and a reference value into an error voltage Ue1 through PI;
step 2: sampling the voltage Uout of the capacitor C2, and adjusting the difference between the value of the voltage Uout and a reference value into an error voltage Ue2 through PI;
and step 3: sampling voltage Ucs at two ends of a resistor Rcs, conditioning the voltage to extract a zero-crossing signal, and generating a zero-crossing signal ZCD;
and 4, step 4: the rising edge of the clock CLK starts rising of the sawtooth wave SW1, and the zero-crossing signal ZCD starts rising of the sawtooth wave SW 2;
and 5: and comparing the error voltage Ue1 obtained in the step 1 with a sawtooth wave SW 1. When the two values are equal, a peak signal P1 is generated;
step 6: comparing the error voltage Ue1 obtained in the step 2 with a sawtooth wave SW 2; when the two values are equal, a peak signal P2 is generated; the corresponding driving signal and inductance current waveform diagram of the switch are obtained by the following steps:
and 7: when the clock CLK rises, the switching tube Q1 and the switching tube Q3 jump, G1 is equal to 1, and G3 is equal to 0; the switching tube Q2 remains in the last state. The Np winding current ip starts to rise from zero;
and 8: when the peak signal P1 is generated, the switching tube Q1, the switching tube Q2 and the switching tube Q3 jump, G1 is 0, G2 is1 and G3 is 1; at this time, the Np winding current IP IS suddenly changed from the peak value IP to 0, the Ns winding current IS suddenly changed from 0 to IS1, and the current IS ready to start to fall; wherein IP/IS1 IS Ns/Np;
and step 9: when the peak signal P2 is generated, the switching tube Q2 jumps, G2 is equal to 0, the switching tube Q1 and the switching tube Q3 keep the previous state; at this time, Ns winding current iS has dropped to peak iS2 in the negative direction, ready to begin rising;
step 10: the Ns winding current iS rises to zero, the switching tube keeps the previous state unchanged, and the inductive current iS kept to zero; when the next rising edge of the clock CLK comes, step 7 is entered.
Example 4
Since the structure shown in fig. 1 is a cascade structure of the fly bank converter and the BUCK converter, the cascade structure belongs to a cascade structure of the fly bank converter and the basic converter. However, the basic converter has a BOOST converter and a BUCK-BOOST converter in addition to the BUCK converter, and since different basic converters have different characteristics, the combination thereof with the FLYBACK converter also has different structures and characteristics.
Such as: as shown in fig. 7, part of the elements in embodiment 1 are deleted and replaced, and a winding Ns, a capacitor C1, a resistor Rcs, a switching tube Q3 and a switching tube Q2 are sequentially connected to form a loop; the resistor R is connected in parallel with the capacitor C2, and then connected in series with the diode D6, and the circuit is connected in parallel with the resistor Rcs and the switch tube Q3 resistor Rcs, so as to form a boost output topological structure.
The isolated single-inductor two-stage power factor correction converter topology with boost output of fig. 7. The topological structure forms a bridge structure at the ports of two windings Np and Ns of the transformer L, so that the current on the winding Ns can flow from the positive direction or the negative direction, i.e. firstly, the energy of the AC input end flows into the capacitor C1, then the energy of the capacitor C1 flows into the capacitor C2, and the energy on the capacitor C2 is supplied to the load R. Wherein D5 and D6 are used for preventing current from flowing back. The structure is as follows: an input end alternating current source AC with a filter device, a diode D1, a diode D2, a diode D3 and a diode D4 form a unidirectional bridge type rectifying circuit; the transformer L is connected with a branch circuit of the switching tubes Q1 and Q3, the diodes D5 and D6 and the capacitor C1 respectively to form a bridge structure with the transformer L, and the bridge structure enables the current is on the secondary side Ns of the transformer L to be conducted from the positive direction or the negative direction respectively; the branch in series connection of the switching tube Q1 is an input end, the capacitor C1 independently forms a bus capacitor end, the branch in series connection of the diode D6 is an output end, the branch in series connection of the switching tube Q3 is a ground end, and the switching tube Q2 is a total switch of the branch connected with the diode D6 and the branch connected with the diode Q3. The diode D5 is connected in series with the unidirectional bridge rectifying circuit at the input end to prevent the current at other parts of the circuit from flowing back to the input end; the resistor R is connected with the capacitor C2 in parallel, the capacitor C2 and the resistor R form an output end, and the output voltage is Uout; a diode D6 is connected in series with the output terminal to prevent the current at the output terminal from flowing into the rest of the circuit; the capacitor C1 solely forms a bus capacitor end, the capacitor C1 stores energy with large ripple, and the energy is stored in the capacitor C1 in the form of voltage Ubus; the signal G1, the signal G2, and the signal G3 are driving signals of the switching tube Q1, the switching tube Q2, and the switching tube Q3, respectively. The winding Nt is connected with the sampling circuit, the voltage state of the winding Np and the voltage state of the winding Ns are reflected by sampling the voltage Ut at the two ends of the winding Nt, and corresponding control signals are generated by the signal conditioning circuit. A circuit formed by connecting a switching tube Q1, a switching tube Q2, a switching tube Q3, a winding Np, a winding Ns and a capacitor C1 is regarded as a FLYBACK converter circuit. The circuit connected with the switching tube Q2, the switching tube Q3, the winding Ns and the capacitor C2 is regarded as a BOOST converter circuit. The BOOST converter is a two-stage converter, the first stage is a FLYBACK converter, the second stage is a BOOST converter, and the secondary winding Ns of the FLYBACK converter is used as an inductor by the BOOST converter of the second stage. The control method is similar to the second and third embodiments.
Example 5
As shown in fig. 8, part of the elements in embodiment 1 are replaced, and a switching tube Q4 is replaced by a diode D8, so as to form a topology of the buck-boost type output.
Fig. 8 is a topological structure of an isolated single-inductor two-stage power factor correction converter with buck-boost output according to the present invention. The topological structure forms a bridge structure at the ports of two windings Np and Ns of the transformer L, so that the current on the winding Ns can flow from the positive direction or the negative direction, i.e. firstly, the energy of the AC input end flows into the capacitor C1, then the energy of the capacitor C1 flows into the capacitor C2, and the energy on the capacitor C2 is supplied to the load R. Wherein D5 and D6 are used for preventing current from flowing back. The structure is as follows: an input end alternating current source AC with a filter device, a diode D1, a diode D2, a diode D3 and a diode D4 form a unidirectional bridge type rectifying circuit; the transformer L is further provided with switching tubes Q1, Q2, Q3, Q4, and diodes D6 and D7, wherein the branches are respectively connected with the transformer L to form a bridge structure, and the bridge structure enables the current is on the secondary side Ns of the transformer L to be conducted from the positive direction or the negative direction; the branch in series of the switching tube Q1 is an input end, the branch in series of the switching tube Q2 is a bus capacitor end, the branch in series of the diode D6 is an output end, and the branch in which the switching tube Q4 and the diode D7 are arranged is a ground end. The diode D5 is connected in series with the unidirectional bridge rectifying circuit at the input end to prevent the current at other parts of the circuit from flowing back to the input end; the resistor R is connected with the capacitor C2 in parallel, the capacitor C2 and the resistor R form an output end, and the output voltage is Uout; a diode D6 is connected in series with the output terminal to prevent the current at the output terminal from flowing into the rest of the circuit; the capacitor C1 and the switching tube Q2 form a bus capacitor end, the capacitor C1 stores energy with large ripples, and the energy is stored in the capacitor C1 in the form of voltage Ubus; the signal G1, the signal G2, the signal G3 and the signal G4 are driving signals of the switching tube Q1, the switching tube Q2, the switching tube Q3 and the switching tube Q4, respectively. The winding Nt is connected with the sampling circuit, the voltage state of the winding Np and the voltage state of the winding Ns are reflected by sampling the voltage Ut at the two ends of the winding Nt, and corresponding control signals are generated by the signal conditioning circuit. A circuit formed by connecting the switching tube Q1, the switching tube Q2, the switching tube Q3, the switching tube Q4, the winding Np, the winding Ns and the capacitor C1 is regarded as a FLYBACK converter circuit. A circuit formed by connecting the switching tube Q2, the switching tube Q3, the switching tube Q4, the winding Ns, the capacitor C2, the diode D6 and the diode D7 is regarded as a BUCK-BOOST converter circuit. The inverter is a two-stage inverter, the first stage is a FLYBACK inverter, the second stage is a BUCK-BOOST inverter, and the second stage BUCK-BOOST inverter utilizes a secondary winding Ns of the FLYBACK inverter as an inductor. The control method is similar to the second and third embodiments.
The foregoing examples are provided for clarity of illustration only and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are intended to be within the scope of the invention.

Claims (7)

1. An isolated single-inductor two-stage power factor correction converter is characterized by comprising:
an AC source having a filter arrangement;
the unidirectional bridge type rectifying circuit is connected with the AC power supply and rectifies and outputs;
a bridge structure including a FLYBACK converter circuit as a first stage circuit and a BUCK converter circuit, a BOOST converter circuit or a BUCK-BOOST converter circuit as a second stage circuit using a secondary winding Ns of a transformer L of the FLYBACK converter as an inductance; the FLYBACK converter circuit is formed by connecting a switching tube Q1, a switching tube Q2, a switching tube Q3, a transformer L, a capacitor C1 and a diode D8, wherein the switching tube Q1, the switching tube Q2 and the switching tube Q3 are respectively driven and controlled by a signal G1, a signal G2 and a signal G3, the BUCK converter circuit and the FLYBACK converter circuit share the switching tube Q2, the switching tube Q3 and a winding and further comprise a capacitor C2 and a diode D7, the switching tube Q1 and the diode D5 are connected in series between a primary winding Np of the transformer L and a unidirectional bridge rectification circuit, the switching tube Q2 is connected in series between the capacitor C1 and the winding Ns, and the anode of the diode D7 is connected with the anode of the capacitor C1 and the cathode of the collector of the switching tube Q2; the switching tube Q3 is connected with the winding Ns, and the resistor Rcs is connected in series with the resistor D8 and then connected between the switching tube Q3 and the capacitor C1; a circuit formed by connecting a resistor R with a capacitor C2 in parallel and then connecting a diode D6 in series is connected with two sides of resistors Rcs and D8 in parallel; the capacitor C2 and the resistor R form an output terminal, the output voltage is Uout, and the cathode of the capacitor C2 is grounded.
2. The isolated single-inductor two-stage power factor correcting converter of claim 1, wherein the first derivative structure is as follows: on the secondary side of the transformer L, a winding Ns, a capacitor C1, a resistor Rcs, a switching tube Q3 and a switching tube Q2 are sequentially connected to form a loop; the resistor R is connected in parallel with the capacitor C2, and then the circuit connected in series with the diode D6 is connected in parallel with the resistor Rcs and the switching tube Q3, so as to form a boost output topology structure.
3. The isolated single-inductor two-stage power factor correcting converter of claim 1, wherein the second derivative structure is as follows: on the secondary side of the transformer L, the diode D8 is replaced by a switching tube Q4 to form a topology of the buck-boost type output.
4. An isolated single-inductor two-stage power factor correcting converter as claimed in any one of claims 1 to 3, wherein the unidirectional bridge rectifier circuit is composed of a diode D1, a diode D2, a diode D3 and a diode D4.
5. The isolated single-inductor two-stage power factor correcting converter according to claim 4, wherein a winding Nt is further provided on the secondary side of the transformer, the winding Nt is connected to a sampling circuit, and the voltage state of the winding Np and the winding Ns is reflected by sampling the voltage Ut across the winding Nt, so as to generate corresponding control signals through the conditioning circuits of signals G1, G2 and G3.
6. The isolated single-inductor two-stage power factor correction converter as claimed in any of claims 1-3, wherein the critical conduction mode and the zero crossing detection of voltage Ucs across the sampling resistor Rcs are used, and the voltage mode control on the sampling capacitors C1 and C2 is as follows:
step 1, sampling a voltage Ubus of a capacitor C1, and adjusting the difference between the value and a reference value to be an error voltage Ue1 through PI;
step 2: sampling the voltage Uout of the capacitor C2, and adjusting the difference between the value of the voltage Uout and a reference value into an error voltage Ue2 through PI;
and step 3: sampling the voltage Ut of a secondary winding Nt of the transformer L, conditioning the value of the voltage Ut by signals, extracting a zero-crossing signal, and generating a zero-crossing signal Z1;
and 4, step 4: sampling voltage Ucs at two ends of a resistor Rcs, conditioning the voltage to extract a zero-crossing signal, and generating a zero-crossing signal Z2;
and 5: the zero-crossing signal Z1 zeroes and begins to rise the sawtooth wave SW1, and the zero-crossing signal Z2 zeroes and begins to rise the sawtooth wave SW 2;
step 6: comparing the error voltage Ue1 obtained in the step 1 with a sawtooth wave SW 1; when the two values are equal, a peak signal P1 is generated;
and 7: comparing the error voltage Ue1 obtained in the step 2 with a sawtooth wave SW 2; when the two values are equal, a peak signal P2 is generated;
and 8: when the zero-crossing signal Z1 is generated, the switching tube Q1 and the switching tube Q3 jump, G1 is1, and G3 is 0; the switching tube Q2 remains in the last state;
and step 9: when the peak signal P1 is generated, the switching tube Q1, the switching tube Q2 and the switching tube Q3 jump, G1 is 0, G2 is1 and G3 is 1;
step 10: when the peak signal P2 is generated, the switching tube Q2 jumps, G2 is equal to 0, the switching tube Q1 and the switching tube Q3 keep the previous state;
step 11: when the zero-cross signal Z1 is generated again, step 8 is entered.
7. The isolated single-inductor two-stage power factor correction converter as claimed in any one of claims 1 to 3, wherein the method for controlling the voltage mode in discontinuous conduction mode comprises the following steps:
step 1: sampling the voltage Ubus of the capacitor C1, and adjusting the difference between the value of the voltage Ubus and a reference value into an error voltage Ue1 through PI;
step 2: sampling the voltage Uout of the capacitor C2, and adjusting the difference between the value of the voltage Uout and a reference value into an error voltage Ue2 through PI;
and step 3: sampling voltage Ucs at two ends of a resistor Rcs, conditioning the voltage to extract a zero-crossing signal, and generating a zero-crossing signal ZCD;
and 4, step 4: the rising edge of the clock CLK starts rising of the sawtooth wave SW1, and the zero-crossing signal ZCD starts rising of the sawtooth wave SW 2;
and 5: comparing the error voltage Ue1 obtained in step 1 with a sawtooth wave SW1, and generating a peak signal P1 when the values of the error voltage Ue1 and the sawtooth wave SW1 are equal;
step 6: comparing the error voltage Ue1 obtained in the step 2 with a sawtooth wave SW 2; when the two values are equal, a peak signal P2 is generated; the corresponding driving signal and inductance current waveform diagram of the switch are obtained by the following steps:
and 7: when the clock CLK rises, the switching tube Q1 and the switching tube Q3 jump, G1 is equal to 1, and G3 is equal to 0; the switching tube Q2 keeps the last state, and the Np winding current ip rises from zero;
and 8: when the peak signal P1 is generated, the switching tube Q1, the switching tube Q2 and the switching tube Q3 jump, G1 is 0, G2 is1 and G3 is 1; at this time, the Np winding current IP IS suddenly changed from the peak value IP to 0, the Ns winding current IS suddenly changed from 0 to IS1, and the current IS ready to start to fall; wherein IP/IS1 IS Ns/Np;
and step 9: when the peak signal P2 is generated, the switching tube Q2 jumps, G2 is equal to 0, the switching tube Q1 and the switching tube Q3 keep the previous state; at this time, Ns winding current iS has dropped to peak iS2 in the negative direction, ready to begin rising;
step 10: the Ns winding current iS rises to zero, the switching tube keeps the previous state unchanged, and the inductive current iS kept to zero; when the next rising edge of the clock CLK comes, step 7 is entered.
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