Background
In the existing electronic load product, a constant current CC (constant current) control loop always has an offset error, that is, when an input control voltage is 0V, the CC control loop does not output 0A, but always outputs a small current value, which may be several milliamperes or several tens of milliamperes. In order for the CC control loop to output current accurately, the offset current in the loop must be eliminated by calibration so that the CC control loop can output 0A when the control voltage is 0V. Fig. 1 is a schematic diagram of a CC control loop in a conventional electronic load product, where Iout in fig. 1 is an output current, and DC represents an externally input DC power supply.
Currently, all electronic load manufacturers eliminate the offset current by manually adjusting the potentiometer. The basic structure of a general CC control loop offset current cancellation scheme is shown in fig. 2. This prior art scheme is described below in conjunction with fig. 2.
Firstly, inside the electronic load, a potentiometer for eliminating offset current is added in the current summation unit, and during calibration, a constant voltage source and a current calibration resistor need to be connected externally, and the voltage of the current calibration resistor needs to be detected by an external high-precision voltmeter.
Secondly, when calibrating, it is necessary to configure the CC control voltage to 0V, then manually trim the potential, and at the same time, read the voltage on the current calibration resistor from the voltmeter. The potentiometer is finally adjusted until the voltage read from the voltmeter is 0V (meaning that the output current is 0A). Therefore, the offset current of the CC control loop is eliminated, and once the potentiometer is adjusted to finish offset current zero calibration, the adjusting knob is sealed by glue to determine the knob position of the potentiometer.
The principle underlying this method is described below.
The offset current of the CC control loop mainly depends on the error generated by the feedback signal, the main source of the error caused in the feedback signal link is the offset voltage of the operational amplifier, and the basic principle of adding a potentiometer in the summation unit to calibrate the offset current is as follows: by injecting a bias voltage into the summing point at the inverting terminal of the operational amplifier, the offset voltage generated at the non-inverting terminal of the operational amplifier is cancelled, so that the final output feedback voltage signal of the operational amplifier is 0V, the output current of the loop is also 0A, and the related schematic diagram is shown in fig. 3.
Specifically, in the circuit unit of the summing amplifier, the potentiometer R536 is first shielded, and four input resistors R532, R533, R534, and R535 may be equivalent to one resistor Rin. The operational amplifier U106 generally has a small offset voltage Vos at the non-inverting terminal, and the equivalent circuit is shown in fig. 4, Vout1 ═ Vos × (R531+ Rin)/Rin. This output voltage eventually results in an offset current of the loop.
A potentiometer is added to a summing point at the inverting terminal of the operational amplifier, the potentiometer is equivalent to an adjustable voltage Vbs which is injected to the inverting terminal of the operational amplifier through an adjustable resistor Rbs, and the equivalent circuit of the potentiometer is shown in FIG. 5.
Based on the principle of superposition,
by adjusting Vbs and Rbs, Vout finally outputs 0V, thereby eliminating the offset current of the loop.
In summary, the conventional method has the following disadvantages: in the process of producing the electronic load, a possible human error exists in the step of calibrating the offset current, automatic production cannot be realized, and the calibration precision and the production efficiency are low.
Disclosure of Invention
The embodiment of the invention provides a calibration offset circuit of an electronic load constant current control loop, which is used for automatically and accurately calibrating the offset of the electronic load constant current control loop in the production process of an electronic load product, and comprises the following steps: calibrating the DAC unit, the offset resistor and the control device; wherein,
a calibration DAC unit for outputting a voltage according to a control of the control device;
one end of the bias resistor is connected with the output end of the calibration DAC unit, and the other end of the bias resistor is connected with the electronic load constant current control loop; the voltage output by the DAC unit is calibrated to be used for offsetting offset current generated by offset voltage in the constant current control loop;
the control device is connected with the input end of the calibration DAC unit and the output end of a voltmeter for reading the voltage value of the calibration resistor externally, and is used for adjusting the voltage value output by the calibration DAC unit according to the variation trend of the voltage value output by the voltmeter when the input voltage of the constant current control loop is 0 volt and the voltage value of the voltmeter is not 0 volt until the measured value of the voltmeter is 0 volt; when the voltmeter measured value is 0 volt, the code value of the DAC in the DAC unit is calibrated to be the offset calibration value of the electronic load constant current control loop.
In one embodiment, the control device is a PC host computer, a PLC programmable logic controller, or an embedded microcontroller MCU.
In one embodiment, the bias resistor is connected to an inverting terminal of a current summing operational amplifier in a current summing unit of the electronic load constant current control loop.
In one embodiment, the bias resistor is connected to an inverting terminal of a differential operational amplifier in the electronic load constant current control loop current differential amplification unit.
In one embodiment, the bias resistor is connected to an inverting terminal of an inverting operational amplifier in an inverting amplification unit of the electronic load constant current control loop.
In one embodiment, the bias resistor is connected to an inverting terminal of an error operational amplifier in the electronic load constant current control loop constant current error amplification unit.
In one embodiment, calibrating the DAC cell comprises: a calibration DAC and a non-inverting amplifier connected to the calibration DAC.
In one embodiment, the voltmeter is a six-digit multimeter.
The embodiment of the invention also provides a calibration offset method of the electronic load constant current control loop, which is used for automatically and accurately calibrating the offset of the electronic load constant current control loop in the production process of an electronic load product, and comprises the following steps:
the control device controls the input of 0V control voltage to the constant current control loop;
the control device controls the output voltage of the calibration DAC unit, and the voltage output by the calibration DAC unit is input into the electronic load constant current control loop through the bias resistor; the voltage output by the DAC unit is calibrated to be used for offsetting offset current generated by offset voltage in the constant current control loop;
the control device adjusts the voltage value output by the DAC unit according to the variation trend of the voltmeter output voltage value of the external read calibration resistor voltage value until the measured value is 0V; when the voltmeter measured value is 0 volt, the code value of the DAC in the DAC unit is calibrated to be the offset calibration value of the electronic load constant current control loop.
In one embodiment, the control device is a PC host computer, a PLC programmable logic controller, or an embedded microcontroller MCU.
Compared with a potentiometer in a manual regulation current summation unit in the prior art for offset calibration of a constant current control loop, the technical scheme provided by the embodiment of the invention adjusts and calibrates the voltage value output by the DAC unit through the control device according to the variation trend of the voltage value output by the voltmeter when the input voltage of the constant current control loop is 0 volt and the voltage value of the voltmeter is not 0 volt until the voltmeter outputs 0 volt; when the voltage value of the voltmeter is 0 volt, the code value of the DAC in the DAC unit is calibrated to be the offset calibration value of the electronic load constant current control loop, so that the offset calibration of the electronic load constant current control loop is automatically, rapidly and accurately realized in the production process of an electronic load product, and the calibration precision and the production efficiency are improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:
FIG. 1 is a schematic diagram of a constant current control loop in a prior art electronic load product;
FIG. 2 is a schematic diagram of a prior art calibration de-tuning scheme for an electronic load constant current control loop;
FIG. 3 is a schematic diagram of the basic principle of a potentiometer to calibrate the offset current in the prior art;
FIG. 4 is a schematic diagram of an equivalent circuit of the offset voltage generation principle in the prior art;
FIG. 5 is a schematic diagram of an equivalent circuit of a prior art potentiometer to calibrate the offset current;
FIG. 6 is a schematic diagram of a calibration offset circuit of the constant current control loop of the electronic load according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of an embodiment of an offset calibration circuit for an electronic load constant current control loop according to the present invention;
FIG. 8 is an equivalent circuit diagram of the calibration offset of the offset circuit of the constant current control loop of the electronic load according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of another embodiment of an offset calibration circuit for an electronic load constant current control loop according to an embodiment of the present invention;
FIG. 10 is a schematic diagram of an example of an electronic load constant current control loop in an embodiment of the present invention;
FIG. 11 is a schematic diagram of an embodiment of a calibration offset circuit of the constant current control loop of the electronic load according to the present invention;
FIG. 12 is a schematic diagram of the connection between the calibration DAC unit and the operational amplifier in the inverse amplification unit according to the embodiment of the present invention;
FIG. 13 is a schematic diagram of an alternative embodiment of the offset calibration circuit of the constant current control loop of the electronic load according to the present invention;
FIG. 14 is a schematic diagram of the connection between the calibration DAC unit and the operational amplifier of the CC error amplifier unit according to the embodiment of the present invention;
FIG. 15 is a schematic diagram of a structure of a calibration DAC unit according to an embodiment of the present invention;
fig. 16 is a flowchart illustrating a method for tuning a calibration offset of an electronic load constant current control loop according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the following embodiments and accompanying drawings. The exemplary embodiments and descriptions of the present invention are provided to explain the present invention, but not to limit the present invention.
The traditional method for calibrating the offset of the constant current control loop of the electronic load has the defects that: in the process of producing electronic load products, possible human errors exist in the step of misalignment, automatic production cannot be achieved, and production efficiency cannot be improved. Therefore, the inventor provides a calibration offset scheme of the electronic load constant current control loop, so that the calibration offset link of the electronic load product in the production process can be quickly and accurately zeroed, and the automation of the whole process is realized. This scheme is described in detail below.
In embodiments of the invention and the accompanying drawings: cc (constant current), dac (digital to analog converter) and dc (direct current) are all constant currents.
Fig. 6 is a schematic diagram of a calibration offset circuit of an electronic load constant current control loop according to an embodiment of the present invention, and as shown in fig. 6, the calibration offset circuit includes: calibrating the DAC unit, the offset resistor and the control device; wherein,
a calibration DAC unit for outputting a voltage according to a control of the control device;
one end of the bias resistor is connected with the output end of the calibration DAC unit, and the other end of the bias resistor is connected with the electronic load constant current control loop; the voltage output by the DAC unit is calibrated to be used for offsetting offset current generated by offset voltage in the constant current control loop;
the control device is connected with the input end of the calibration DAC unit and the output end of a voltmeter for reading the voltage value of the calibration resistor externally, and is used for adjusting the voltage value output by the calibration DAC unit according to the variation trend of the voltage value output by the voltmeter when the input voltage of the constant current control loop is 0 volt and the voltage value of the voltmeter is not 0 volt until the measured value of the voltmeter is 0 volt; when the voltmeter measured value is 0 volt, the code value of the DAC in the DAC unit is calibrated to be the offset calibration value of the electronic load constant current control loop.
Compared with a potentiometer in a manual regulation current summation unit in the prior art for offset calibration of a constant current control loop, the technical scheme provided by the embodiment of the invention adjusts and calibrates the voltage value output by the DAC unit according to the variation trend of the output voltage value of the voltmeter when the control voltage of the constant current control loop is 0V, the actual output current is not 0A and the voltage value reflected in the voltmeter is not 0V through the control device until the output current is 0A and the measured value reflected in the voltmeter is 0V; when the voltage value of the voltmeter is 0 volt, the code value of the DAC in the DAC unit is calibrated to be the offset calibration value of the electronic load constant current control loop, so that the offset calibration of the electronic load constant current control loop is automatically, rapidly and accurately realized in the production process of an electronic load product, and the calibration precision and the production efficiency are improved.
In specific implementation, one end of the bias resistor is connected with the output end of the calibration DAC unit, and the other end of the bias resistor is connected with the reverse end of an operational amplifier in a feedback signal circuit of the electronic load constant current control loop; the voltage output by the calibration DAC unit is used for offsetting offset current generated by offset voltage at the same-direction end of the operational amplifier in the constant current control loop.
In one embodiment, the control device can be a PC host computer, a PLC programmable logic controller or an embedded microcontroller MCU, and the control device is an apparatus with information processing capability.
Fig. 7 is a schematic structural diagram of an embodiment of a calibration offset circuit of an electronic load constant current control loop according to an embodiment of the present invention, as shown in fig. 7, in a specific implementation, a PC upper computer may be connected to a calibration DAC unit through a data processing unit of the electronic load, the data processing unit in the electronic load is responsible for communicating with the outside and controlling the DAC unit and the calibration DAC unit, and the calibration DAC unit injects a voltage into a current summing unit through a bias resistor, and fig. 7 illustrates that the bias resistor is connected to an inverting terminal of a current summing operational amplifier in the current summing unit of the electronic load constant current control loop.
The specific process of performing offset calibration by using the offset calibration circuit of the electronic load constant current control loop provided by the embodiment of the invention can be as follows: the PC upper computer sends a command to enable the DAC unit of the electronic load to output 0V voltage to the CC control loop, and simultaneously, the PC upper computer reads a voltage value on the current calibration resistor through the six-bit half-multimeter (the voltage value is generated after loop offset current flows through the current calibration resistor). And the PC upper computer controls the DAC unit of the electronic load according to the voltage value read by the multimeter, and adjusts the output of the DAC unit in proper steps (for example, the minimum step of the DAC value) according to the voltage change trend read by the multimeter, so that the voltage value read by the multimeter is 0V finally. When the voltage value read by the multimeter is 0V, recording a code value of the calibration DAC in the calibration DAC unit at the moment, wherein the code value is the calibration value of the imbalance of the CC control loop, and outputting the code value to the calibration DAC unit after the electronic load system is started every time.
Fig. 8 is an equivalent circuit schematic diagram of the calibration offset circuit calibration offset of the electronic load constant current control loop according to the embodiment of the present invention, and based on the principle described above, the calibration DAC unit may adjust the output voltage of the constant current control loop to 0V by injecting the voltage of the offset resistor R538 at the inverting terminal of the operational amplifier in the current summing unit.
In another embodiment of the present invention, as shown in fig. 9, the calibration DAC unit may inject a voltage into the error operational amplifier in the constant current error amplifying unit through a bias resistor to perform offset calibration, and the specific circuit structure is shown in fig. 14.
In another embodiment of the present invention, as shown in fig. 10, in the constant current control loop of the electronic load, the constant current control voltage is compared with the feedback signal of the inverting amplifying unit through the error operational amplifier in the constant current error amplifying unit, and outputs a control signal to a driving unit, the driving unit increases driving capability for driving a plurality of power units, the power units are basic units for controlling current (here, a plurality of power units are connected in parallel), a differential amplifying unit differentially amplifies a voltage obtained by converging the current of the plurality of power units connected in parallel to a current sampling resistor, a reverse amplifying unit reversely amplifies the differential amplified signal again, and then feeding back the reversely amplified signal to the constant current error amplifying unit, thereby realizing negative feedback control of the whole constant current control loop.
In this embodiment, the advantages of the constant current control loop of the electronic load as shown in fig. 10 compared to the prior art are:
in the prior art, the voltage of the current sampling resistor in each power unit is differentially amplified by a differential amplifier, the operational amplifier of the differential amplifier generates offset voltage, a plurality of power units are connected in parallel by a current summing unit, and the current summing is realized by an adder, so that errors are accumulated, and the integral constant current control precision is deviated.
In the constant current control circuit of the electronic load provided in the embodiment shown in fig. 10, the power unit has no differential amplifier, the current output by the power unit group is summed through a precision sampling resistor, the voltage on the resistor is differentially amplified, the voltage feedback signal is compared with the constant current control signal, and the control signals for the multiple groups of parallel power units are output.
Meanwhile, normalization processing is also realized on the dynamics of the control loop, because the feedback signal realizes summation of all parallel power unit currents, the dynamic characteristics of the constant current control loop are concentrated on the dynamic parameters of the constant current error amplifying unit, and the consistency of dynamic waveforms established by the power units after the power units are connected in parallel is increased.
For the CC control loop in the embodiment shown in fig. 10, when performing calibration mismatch, the connection modes of the calibration DAC unit and the offset resistor to the constant current control loop mainly include two types, which are described below.
First, as shown in fig. 11 and 12, the bias resistor is connected to the inverting terminal of the inverting operational amplifier of the constant current control loop of the electronic load. In this embodiment, the calibration DAC unit injects a bias voltage from the inverting operational amplifier of the inverting amplification unit. In fig. 12, R539(10k0) is a bias resistor, one end of which is connected to the output terminal of the calibration DAC unit, and the other end of which is connected to the inverting input terminal of the inverting operational amplifier in the inverting amplification unit.
Based on fig. 12, the non-inverting terminal (pin 3) of the inverting operational amplifier U16 in the inverting amplifying unit generates an offset voltage, which results in an offset deviation at the feedback terminal in the CC control loop, and let the input offset voltage at the non-inverting terminal of U16 be Vos, an output offset voltage Vos _ out is generated at the output terminal 6 (1+ R123/R128), a bias resistor R539 is connected to the inverting terminal (pin 2), and a calibration voltage Vcal is injected at R539, and based on the superposition theorem, Vos _ out is Vos (1+ R123/R128) -Vcal R123/R539. When the calibration voltage Vcal is set to a value such that Vcal × R123/R539 is Vos × 1+ R123/R128, Vos _ out is 0, which makes it possible to calibrate the output offset current to 0A.
Second, as shown in fig. 13 and 14, the bias resistor is connected to the inverting input terminal of the error operational amplifier in the constant current error amplifying unit of the electronic load constant current control loop. The calibration DAC unit may inject an offset voltage from an error operational amplifier in the constant current error amplifying unit in addition to the offset voltage from the inverting amplifier unit to calibrate the offset current of the constant current control loop. In fig. 14, one end of R539 is connected to the output terminal of the calibration DAC cell, and the other end of R539 is connected to the inverting input terminal of the error operational amplifier in the constant current error amplifying cell.
As shown in fig. 14, the offset current generated by the constant current control loop may cause the second input terminal (i.e., the feedback terminal, the terminal of the inverting amplifying unit connected to R125) of the error operational amplifier in the constant current error amplifying unit to generate an offset voltage Vos _ out, the offset resistor R539 is connected to the inverting terminal of the error operational amplifier in the constant current error amplifying unit, and the offset voltage Vcal is injected into R539, so that when Vcal × R125/R539 is-Vos _ out, the offset voltage may be cancelled, and the offset current in the constant current control loop may be calibrated to 0A.
In addition, in the control loop shown in fig. 10, if the number of power cells to be driven is small, the driving unit circuit can be omitted. If the power unit adopts a feedback mode of an inverting terminal, the reverse amplification unit in the control loop can be omitted according to a negative feedback principle. When there is no reverse amplification unit, one end of the bias resistor is connected to the output end of the calibration DAC unit, and the other end of the bias resistor may be connected to the inverting input end of the differential amplifier in the current differential amplification unit, or may be connected to the inverting input end of the error operational amplifier in the constant current error amplification unit.
As shown in fig. 15, in one embodiment, the calibration DAC cell includes: a calibration DAC and a non-inverting amplifier connected to the calibration DAC.
In specific implementation, the calibration DAC unit also comprises a non-inverting amplifier added with 2.5V offset voltage besides the calibration DAC, so that the calibration DAC unit can output voltage ranging from-2.5V to + 2.5V.
In one embodiment, the voltmeter is a six-digit multimeter.
Based on the same inventive concept, the embodiment of the present invention further provides a method for misalignment calibration of an electronic load constant current control loop, as described in the following embodiments. The principle of solving the problem of the electronic load constant current control loop calibration offset method is similar to that of the electronic load constant current control loop calibration offset circuit, so the implementation of the electronic load constant current control loop calibration offset method can be referred to the implementation of the electronic load constant current control loop calibration offset circuit, and repeated parts are not repeated. As used hereinafter, the term "unit" or "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated.
Fig. 16 is a schematic flowchart of a method for misalignment calibration of an electronic load constant current control loop according to an embodiment of the present invention, as shown in fig. 16, the method includes the following steps:
step 101: the control device controls the input of 0V control voltage to the constant current control loop;
step 102: the control device controls the output voltage of the calibration DAC unit, and the voltage output by the calibration DAC unit is input into the electronic load constant current control loop through the bias resistor; the voltage output by the DAC unit is calibrated to be used for offsetting offset current generated by offset voltage in the constant current control loop;
step 103: the control device adjusts the voltage value output by the DAC unit according to the variation trend of the voltmeter output voltage value of the external read calibration resistance voltage value until the voltmeter measured value is 0V; when the voltmeter measured value is 0 volt, the code value of the DAC in the DAC unit is calibrated to be the offset calibration value of the electronic load constant current control loop.
In one embodiment, the control device is a PC host computer, a PLC programmable logic controller, or an embedded microcontroller MCU.
The embodiment of the invention realizes the following technical effects: the calibration of the electronic load product in the production process is disordered, so that the electronic load product can be quickly and accurately zeroed, and the automation of the whole process is realized.
It will be apparent to those skilled in the art that the modules or steps of the embodiments of the invention described above may be implemented by a general purpose computing device, they may be centralized on a single computing device or distributed across a network of multiple computing devices, and alternatively, they may be implemented by program code executable by a computing device, such that they may be stored in a storage device and executed by a computing device, and in some cases, the steps shown or described may be performed in an order different than that described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple ones of them may be fabricated into a single integrated circuit module. Thus, embodiments of the invention are not limited to any specific combination of hardware and software.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes may be made to the embodiment of the present invention by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.