CN108448882A - A kind of anti-biasing circuit and method for inverter - Google Patents

A kind of anti-biasing circuit and method for inverter Download PDF

Info

Publication number
CN108448882A
CN108448882A CN201810189139.3A CN201810189139A CN108448882A CN 108448882 A CN108448882 A CN 108448882A CN 201810189139 A CN201810189139 A CN 201810189139A CN 108448882 A CN108448882 A CN 108448882A
Authority
CN
China
Prior art keywords
signal
pulse
width
wave
magnetic bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201810189139.3A
Other languages
Chinese (zh)
Other versions
CN108448882B (en
Inventor
齐铂金
张伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beihang University
Original Assignee
Beihang University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beihang University filed Critical Beihang University
Priority to CN201810189139.3A priority Critical patent/CN108448882B/en
Publication of CN108448882A publication Critical patent/CN108448882A/en
Application granted granted Critical
Publication of CN108448882B publication Critical patent/CN108448882B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/122Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters
    • H02H7/1225Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters responsive to internal faults, e.g. shoot-through
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/40Means for preventing magnetic saturation

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses a kind of anti-biasing circuit and method for inverter, which includes:PWM module is configured as output to pulse synchronous signal and two original half-wave pulse-width signals;Whether comparison module, configuration determination inverter main transformer occur magnetic bias;PWM output control modules are configured to when magnetic bias occurs for inverter main transformer, and based on the comparison result that pulse synchronous signal and comparison module export, pwm control signal is exported to PWM module;PWM pulse-width regulated modules are configured to generate the anti-magnetic bias pulse-width signal for the pulsewidth that pulsewidth is more than original half-wave pulse-width signal, and export to the inverter circuit of inverter, to control the magnetic bias state of inverter.The present invention can inhibit main transformer magnetic bias state and realize overcurrent protection to main power tube.

Description

A kind of anti-biasing circuit and method for inverter
Technical field
The invention belongs to electronic power inversion power technique fields, specifically, more particularly to a kind of for inverter Anti- biasing circuit and method.
Background technology
Inverter technology due to it is energy-efficient, small, light-weight, have excellent performance the features such as, in Arc Welding Power, straight The fields such as stream regulated power supply, charger are widely used, it has also become the mainstream technology in current large power supply.Mesh Before, most of large power supplies are all made of full-bridge or half-bridge converter main circuit realizes inversion transformation, typical circuit pattern As shown in Figure 1.
Bridge circuit in the process of running, since pulsewidth modulation and circuit parameter can not possibly absolute symmetry be consistent, voltage wave The reasons such as dynamic will cause its positive and negative half-wave voltage Flux consumption uneven.The imbalance of the Flux consumption will cause main transformer to run There is magnetic bias in imbalance.When magnetic bias situation is serious, main transformer work will be caused to enter magnetic saturation region.Main transformer is saturated It is equivalent to short-circuit condition, is sharply increased so as to cause the electric current for flowing through switching tube, the electric current for easily leading to flow through power tube is more than Its allowable current makes its disabling damage.
One of the main reason for magnetic bias of bridge circuit is current inverter power tube damage.To improve inverter Reliability, it is necessary to take measures to inhibit the generation of magnetic bias.Traditional theory thinks half-bridge converter circuit due to half-bridge capacitance In the presence of having the effect of certain anti-magnetic bias, full-bridge type main circuit can also have certain anti-magnetic bias by capacitance of connecting Effect.Really, half bridge circuit and the full bridge circuit for concatenating capacitance have the function of certain resistance magnetic bias, resist The ability power of magnetic bias is directly related with its capacitance selection, and capacitance is smaller, and the effect of anti-magnetic bias is stronger.But capacitance is smaller, Voltage drop is then bigger thereon, which transmits the efficient transformation for influencing inverter energy.Therefore, in the inversion of conventional design In power supply, the selection of the capacitance is unsuitable too small.It, then can only be to slowly varying positive and negative half-wave Flux consumption if the capacitance is excessive Imbalance can just play the effect of anti-magnetic bias;For change faster positive and negative half-wave Flux consumption it is unbalanced in the case of, such as arc Power supply is welded, load variation is violent, to realize the control of power supply characteristic, is necessarily adjusted on a large scale by pulsewidth to realize.This The large-scale pulsewidth of kind quickly adjusts the imbalance for the positive and negative half-wave Flux consumption for easily causing moment, to easily bridge-type be caused to become The magnetic bias of circuit is changed, and the capacitance of bridge circuit is almost for the unbalanced inhibiting effect of fast-changing Flux consumption at this time Zero.Practical application and experiment test show that the case where magnetic bias often occurs in the process of running in Arc Welding Power, so as to cause flowing through The electric current of power tube increased dramatically.
Fig. 2 is primary current waveform when certain Arc Welding Power is run, hence it is evident that there are current spikes, to the peace of Arc Welding Power Full reliably working is totally unfavorable, easily causes power tube overcurrent, damages power tube.Therefore, when occurring how magnetic bias effectively disappears Except magnetic bias becomes the research hotspot of inverter technology.However, how to realize that the detection of online magnetic bias in real time is a problem, because The detection of magnetic bias is on condition that will be detected the magnetic flux of the main transformer in Arc Welding Power, the direct magnetic flux of measurement main transformer Change hardly possible.
The magnetic bias for measuring main transformer indirectly by primary current is a kind of feasible program.There is scholar to propose such as lower section Case:Using transformer measurement main transformer primary current, when overcurrent occurs in primary side, power switch tube is closed to realize to work( The protection of rate pipe.However, the program has two, first, the program cannot eliminate magnetic bias, next period is it is possible to go out Existing magnetic bias;Second, closing power tube needs the regular hour, power tube is typically all to be driven by isolated drive circuit. Typical case's driving for 100~200A IGBT, the turn-off time generally delay reach 1~2us, or even up to 2~3us.And as master When transformer bias is more serious, the time delayed turn-off of 1~2us will be such that the primary current of main transformer sharply increases, and di/dt is up to several Ten A/us.That is 1~2us time-delay closings, electric current will sharply increase tens amperes of even hundreds of amperes, and easily cause main work( Rate pipe overcurrent damage.Therefore, if control circuit cannot inhibit main circuit magnetic bias, although can be to power in the period 1 Pipe is protected, but when next period magnetic bias depth further increases, and easily causes the damage of main power tube.Therefore, it is necessary to When finding main transformer magnetic bias, effectively existing magnetic bias is corrected, reduces magnetic bias, controls the depth of its magnetic bias, in turn It prevents power tube overcurrent and damages.
Invention content
In order to solve the above technical problem, the present invention provides a kind of anti-biasing circuit and method for inverter, To inhibit main transformer magnetic bias state and realize overcurrent protection to main power tube.
According to an aspect of the invention, there is provided a kind of anti-biasing circuit for inverter, including:
PWM module is configured as output to pulse synchronous signal and two original half-wave pulsewidth tune of 180 ° of phase difference Signal processed;
Comparison module, be configured to inverter main transformer primary current signal and predetermined voltage signals judge it is inverse Whether variable power source main transformer occurs magnetic bias;
PWM output control modules are configured to, when magnetic bias occurs for inverter main transformer, be based on the impulsive synchronization The comparison result of signal and comparison module output exports pwm control signal so that the PWM module to the PWM module Stop exporting original half-wave pulse-width signal;
PWM pulse-width regulated modules are configured to the failing edge of the pwm control signal, next pulse synchronous signal With next original half-wave pulse-width signal, the anti-magnetic bias that pulsewidth is more than the pulsewidth of the original half-wave pulse-width signal is generated Pulse-width signal is simultaneously exported to the inverter circuit of inverter, to control the magnetic bias state of the inverter.
According to one embodiment of present invention, the PWM pulse-width regulateds module further comprises:
First trigger is configured to first input end and inputs the first original half-wave pulse-width signal, the second input terminal Input the pulse synchronous signal, output end output the first triggering half-wave pulse-width signal;
Second trigger is configured to first input end and inputs the second original half-wave pulse-width signal, the second input terminal Input the pulse synchronous signal, output end output the second triggering half-wave pulse-width signal;
Monostable sub-circuit, is configured to the failing edge signal of the pwm control signal, and output predetermined pulse width is monostable Signal;
Third trigger, be configured to first input end input predetermined pulse width single steady signal, the second input terminal input described in Pulse synchronous signal, output end export the monostable trigger signal of predetermined pulse width;
First and door, it is configured to first input end input the first triggering half-wave pulse-width signal, the second input End inputs the predetermined pulse width single steady signal, first anti-magnetic bias pulse-width signal of the output end output with predetermined pulse width;
Second and door, it is configured to first input end input the second triggering half-wave pulse-width signal, the second input End inputs the predetermined pulse width single steady signal, second anti-magnetic bias pulse-width signal of the output end output with predetermined pulse width.
According to one embodiment of present invention, the PWM output control modules further comprise:
4th trigger is configured to the comparison result that first input end inputs the comparison module output, the second input End inputs the pulse synchronous signal, and output end exports the pwm control signal.
According to one embodiment of present invention, further include output module, including:
First or door, it is configured to first input end and inputs the first original half-wave pulse modulated signal, the second input End inputs the predetermined pulse width single steady signal, and output end exports the first anti-magnetic bias pulse-width signal or the first original half-wave Pulse-modulated signal;
Second or door, it is configured to first input end and inputs the second original half-wave pulse modulated signal, the second input End inputs the predetermined pulse width single steady signal, and output end exports the second anti-magnetic bias pulse-width signal or the second original half-wave Pulse-modulated signal.
According to one embodiment of present invention, further include isolation power driver module, be configured to input terminal and described the One or door connected with the input terminal of described second or door, the connection of the input terminal of output end and inverter.
According to one embodiment of present invention, further include current acquisition module, be configured to acquisition inverter main transformer pressure Device primary current signal.
According to one embodiment of present invention, the predetermined pulse width is equal to a half-wave pulsewidth tune in a pulse width modulation cycle The maximum pulse width that signal processed reaches.
According to another aspect of the present invention, a kind of anti-bias magnetic method for inverter is additionally provided, including:
Acquire inverter main transformer primary current signal;
Judge that inverter main transformer is based on inverter main transformer primary current signal and predetermined voltage signals No generation magnetic bias;
When magnetic bias occurs for inverter main transformer, in current half-wave pulse width period, stop exporting original half-wave arteries and veins Wide modulated signal;
In next half-wave pulse width period, the failing edge, pulse synchronous signal based on the pwm control signal and original half Wave pulse-width signal generates the anti-magnetic bias pulse-width signal that pulsewidth is more than the pulsewidth of original half-wave pulse-width signal, and It exports to the inverter circuit of inverter, to control the magnetic bias state of inverter.
According to one embodiment of present invention, output pwm control signal to stop exporting original half-wave pulse-width signal, Further comprise:
Based on pulse synchronous signal and magnetic bias as a result, generating pwm control signal;
The pwm control signal is sent to PWM module, stops exporting original half-wave pulsewidth to control the PWM module Modulated signal.
According to one embodiment of present invention, the anti-magnetic bias that pulsewidth is more than the pulsewidth of original half-wave pulse-width signal is generated Pulse-width signal further comprises:
In current half-wave pulse width period, when the failing edge of pwm control signal arrives, predetermined pulse width single steady signal is exported;
In next half-wave pulse width period, predetermined arteries and veins is generated according to the predetermined pulse width single steady signal and pulse synchronous signal The monostable trigger signal of width, while the first triggering half-wave is generated according to the first original half-wave pulse-width signal and pulse synchronous signal Pulse-width signal or the second original half-wave pulse-width signal and pulse synchronous signal generate the second triggering half-wave pulsewidth modulation Signal;
The first anti-magnetic bias pulsewidth is generated according to the monostable trigger signal of predetermined pulse width and the first triggering half-wave pulse-width signal Modulated signal, or the second anti-magnetic bias arteries and veins is generated according to the monostable trigger signal of predetermined pulse width and the second triggering half-wave pulse-width signal Wide modulated signal.
Advantageous effect in the present invention:
The anti-biasing circuit and method for inverter provided through the invention, when detecting inverter main circuit When magnetic bias occurs, it is momentarily turned off power tube, the excessive damage power tube of electric current can be prevented.Increase leading for power tube in next half-wave The logical time, magnetic bias is enable to correct, to inhibit main transformer magnetic bias state and realize overcurrent protection to main power tube.
Other features and advantages of the present invention will be illustrated in the following description, and partly becomes from specification It is clear that understand through the implementation of the invention.The purpose of the present invention and other advantages can be by wanting in specification, right Specifically noted structure is sought in book and attached drawing to realize and obtain.
Description of the drawings
Attached drawing is used to provide further understanding of the present invention, and a part for constitution instruction, the reality with the present invention It applies example and is used together to explain the present invention, be not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is full-bridge type and half bridge inverter circuit Structure Comparison schematic diagram in the prior art;
Primary side current of transformer comparison of wave shape when Fig. 2 is when Arc Welding Power works normally in the prior art and magnetic bias work Schematic diagram;
Fig. 3 is a kind of desired voltage waveform schematic diagram;
Fig. 4 is the ideal transformer magnetic flux working state schematic representation of corresponding diagram 3;
Fig. 5 is the transformer bias working state schematic representation of corresponding diagram 3;
Fig. 6 is the anti-magnetic bias working state schematic representation of transformer according to an embodiment of the invention;
Fig. 7 is the anti-biasing circuit structural schematic diagram according to an embodiment of the invention for inverter;
Fig. 8 is the circuit work wave schematic diagram of corresponding diagram 7;
Fig. 9 is the anti-bias magnetic method flow chart according to an embodiment of the invention for inverter.
Specific implementation mode
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings and examples, how to be applied to the present invention whereby Technological means solves technical problem, and the realization process for reaching technique effect can fully understand and implement.It needs to illustrate As long as not constituting conflict, each embodiment in the present invention and each feature in each embodiment can be combined with each other, It is formed by technical solution within protection scope of the present invention.
In ideal inverter, it is such as loaded into voltage waveform such as Fig. 3 of its transformer, then corresponding ideal main transformer magnetic Working condition such as Fig. 4, magnetic flux work around origin symmetry;If magnetic bias occurs, magnetic working condition is as shown in figure 5, magnetic flux is put down Weigh work centre point secundly.If continuing up deviation, transformer will make main transformer enter saturation due to magnetic bias.Main transformer If depressor is saturated, the exciting current of primary side will sharply increase, and corresponding current waveform is as shown in Figure 2.From there through primary side electricity Flow measurement, it is known that whether magnetic bias and its magnetic bias direction can be momentarily turned off power tube to main transformer after detecting magnetic bias overcurrent. Meanwhile in order to correct magnetic bias, increase its turn-on time in next hemiwave time, magnetic bias can be enable to correct, as shown in Figure 6.
In figure 6, although 1 transformer of work period occurs magnetic bias, but its operating magnetic field flux is less than saturation flux, can also be just Often work.With that is, positive half-wave in the work period 2, the Flux consumption of transformer forward direction excitation due to being adjusted etc. control circuit Increase so that operating magnetic field flux increases and reach saturation, and primary side exciting current sharply increases.When control circuit is examined by primary current When measuring magnetic bias, suitably increasing turn-on time in next negative half-wave makes operating magnetic field flux move down, and makes the magnetic work of transformer Make state recovery, to achieve the effect that anti-magnetic bias.Currently, inverter is to be based on dedicated PWM chip (such as SG2525 mostly Equal chips) realize PWM modulation control, it to realize above-mentioned control, then need to design the special above-mentioned function of auxiliary circuit realization.
Therefore, the present invention is based on existing PWM chips, provide a kind of anti-biasing circuit and method for inverter, Its operation principle is:By detect main transformer primary current come judge main transformer whether magnetic bias and its magnetic bias direction, work as inspection After measuring magnetic bias overcurrent, it is momentarily turned off power tube, while in order to correct magnetic bias, increases its turn-on time in next half-wave, made partially Magnetic is corrected, to inhibit main transformer magnetic bias state and realize overcurrent protection to main power tube.
According to an aspect of the invention, there is provided a kind of anti-biasing circuit for inverter, as shown in fig. 7, packet Include PWM module 11, comparison module 12, PWM output control modules 13 and PWM pulse-width regulateds module 14.
Wherein, PWM module 11 is configured as output to pulse synchronous signal and two original half-wave arteries and veins of 180 ° of phase difference Wide modulated signal.Specifically, the chips such as SG2525 may be selected to send out PWM modulation signal in PWM module 11.PWM modulation signal packet It includes P1 and the original half-wave signas of P2 two (original half-wave pulse-width signal), in a PWM cycle, sends out opposite in phase successively Two original half-wave signas, P1 and P2 phases differ 180 °, and asynchronously export, referring to voltage pulse signal u in Fig. 6. PWM module also exports a pulse synchronous signal, for the half-wave signa needed for synchronism output.
Comparison module 12 is configured to inverter main transformer primary current signal and predetermined voltage signals judge it is inverse Whether variable power source main transformer occurs magnetic bias.Specifically, acquisition inverter main transformer primary current signal, and be converted For voltage signal.Transformed voltage signal is compared with predetermined voltage, such as exceeds the range of predetermined voltage, then judges inverse Magnetic bias occurs for variable power source main transformer.
PWM output control modules 13 are connect with PWM module 11 and comparison module 12, are configured in inverter main transformer When magnetic bias occurs, based on the comparison result that pulse synchronous signal and comparison module 12 export, PWM controls are exported to PWM module 11 Signal, so that PWM module 11 stops exporting original half-wave pulse-width signal.Specifically, in the comparison exported by comparison module When as a result learning generation magnetic bias, while when the output pulse synchronous signal of PWM module 11, PWM output control modules 13 export PWM controls Signal processed.The pwm control signal can make PWM module 11 stop exporting original half-wave pulse-width signal.
PWM pulse-width regulateds module 14 is connect with PWM output control modules 13 and PWM module 11, is configured to PWM controls The failing edge of signal processed, next pulse synchronous signal and next original half-wave pulse-width signal generate pulsewidth and are more than original half The anti-magnetic bias pulse-width signal of the pulsewidth of wave pulse-width signal, and export to inverter inverter circuit (such as full-bridge or Half bridge inverter circuit), to control the magnetic bias state of inverter.Specifically, being exported in PWM output control modules 13 When pwm control signal, PWM module 11 stops output half-wave signa.PWM module 11 normally exports pulse synchronous signal at this time, At the end of the half-wave signa corresponds to pulse width time, PWM module 11 stops exporting corresponding pulse synchronous signal.PWM is exported at this time Control module 13 also stops exporting pwm control signal, and when stopping exporting pwm control signal, the failing edge of pwm control signal arrives Come.The failing edge of pwm control signal arrives when being arrived simultaneously with, next half-wave signa and next pulse synchronous signal, generates arteries and veins It is wider than the anti-magnetic bias pulse-width signal of the pulsewidth of original half-wave pulse-width signal.
In the present invention, when detecting that magnetic bias occurs for inverter main circuit, it is momentarily turned off power tube, electricity can be prevented Flow through big damage power tube.Increase the turn-on time of power tube in next half-wave, so that magnetic bias is corrected, to inhibit main transformer pressure Device magnetic bias state and to main power tube realize overcurrent protection.
In one embodiment of the invention, PWM pulse-width regulateds module 14 further comprises the first trigger 141, second Trigger 142, monostable sub-circuit 143, third trigger 144, first and door 145 and second and door 146, as shown in Figure 7.The One trigger 141 is configured to first input end and inputs the first original half-wave pulse-width signal P1, the second input terminal input pulse Synchronizing signal P, the first triggering half-wave of output end output pulse-width signal/P1.Second trigger 142 is configured to first input end It inputs the second original half-wave pulsewidth modulation and believes No. P2, the second input terminal input pulse synchronizing signal P, the second triggering of output end output Half-wave pulse-width signal/P2.Monostable sub-circuit 143 is configured to the failing edge signal of pwm control signal S2, and output is pre- Determine pulsewidth single steady signal S3.Third trigger 144 is configured to first input end input predetermined pulse width single steady signal S3, the second input Input pulse synchronizing signal P, output end is held to export the monostable trigger signal S4 of predetermined pulse width.First with door 145 to be configured to first defeated Enter the first triggering half-wave of end input pulse-width signal/P1, the second input terminal inputs predetermined pulse width single steady signal S4, and output end is defeated Provide the first anti-magnetic bias pulse-width signal //P1 of predetermined pulse width.Second is configured to first input end input the with door 146 Two triggering half-wave pulse-width signals/P2, the second input terminal input predetermined pulse width single steady signal S4, and output end output has predetermined The second anti-magnetic bias pulse-width signal //P2 of pulsewidth.In synchronization, among the first trigger 141 and the second trigger 142, Trigger sends out signal there are one only, and correspondingly, first is anti-there are one being exported with door among door 145 and second and door 146 Magnetic bias pulse-width signal.
In one embodiment of the invention, PWM output control modules 13 further comprise the 4th trigger 131, match It is set to the comparison result that first input end input comparison module 12 exports, the second input terminal input pulse synchronizing signal P, output end Export pwm control signal S2.
In one embodiment of the invention, which further includes output module 15, including first or door 151 and second or Door 152.First or door 151 be configured to first input end and input the first original half-wave pulse modulated signal P1, the second input terminal is defeated Enter predetermined pulse width single steady signal S4, output end exports the first anti-magnetic bias pulse-width signal/original half-wave pulse tune of/P1 or first Signal P1 processed.Second or door 152 be configured to first input end and input the second original half-wave pulse modulated signal, the second input terminal is defeated Enter predetermined pulse width single steady signal, output end exports the original half-wave pulse modulation of the second anti-magnetic bias pulse-width signal //P2 or second Signal P2.Both anti-magnetic bias pulse-width signal and original half-wave pulse modulated signal signal amplitude are identical, only signal pulsewidth Difference, the pulsewidth of anti-magnetic bias pulse-width signal are more than the pulsewidth of original half-wave pulse modulated signal, first or door 151 herein It is with retention time longer signal in anti-magnetic bias pulse-width signal and original half-wave pulse modulated signal with second or door 152 Benchmark exports.
Due to practical measurement obtain the magnetic bias amount of inverter number it is more difficult, in one embodiment of the invention, will Predetermined pulse width is equal to the maximum pulse width that a half-wave pulse-width signal reaches in a pulse width modulation cycle, i.e., one The 45%-48% of PWM cycle.According to the maximum pulse width, the retention time of the steady-state signal of the output of monostable sub-circuit is set, So that the pulsewidth of the predetermined pulse width single steady signal of the output of monostable sub-circuit is equal to the maximum pulse width, circuit can be simplified and set It counts, is easier to realize in engineering.
In one embodiment of the invention, which further includes isolation power driver module 16, is configured to Input terminal with first or door 151 and second or the input terminal of door 152 connect, the input terminal connection of output end and inverter.
In one embodiment of the invention, which further includes current acquisition module 17, is configured to acquire Inverter main transformer primary current signal.
Comparison module 12 includes comparator 121, comparator 122, signal amplifier 123 and interlock circuit, for being based on Inverter main transformer primary current signal and predetermined voltage signals judge whether inverter main transformer occurs magnetic bias.
When circuit work shown in Fig. 7, P is the pulse synchronous signal that SG2525 is generated, P1、P2For 180 DEG C of pulsewidth of difference Modulated signal, unless under light condition, binary signal P1、P2Full pulsewidth state ,/P will not be generally operated in1,/P2For P1With P2Point Do not merge the full pulse-width signal of 180 DEG C of difference generated, the turn-on time for increasing half-wave by rest-set flip-flop with P.If For main primary side current of transformer signal, which is AC signal, passes through the comparison circuit of positive and negative threshold.When overcurrent occurs in electric current When, make S1Send out pulse signal, S1With P signal by RS trigger circuits, work as S1When being high, even if S2For height, S2It can be used for immediately The output of SG2525 is closed, namely closes main power tube.It is resetted by P signal at the end of this pulse width period, makes S2It sets low, terminates Protection, by S2Failing edge trigger monostable circuit, generate with the single steady signal of fixed pulse width (tp).The pulsewidth will make when designing It is slightly larger than the pulsewidth (td) of P signal, S3S is generated by rest-set flip-flop with P signal4Signal, S4Signal is in this period for opening Logical/P1Or/P2Full pulse width signal is used to increase half-wave turn-on time, P signal is still as reset signal.It is tied when the period Shu Hou resets S4Signal is allowed to set low, to shield/P1Or/P2Output close increase half-wave pulsewidth function, G1、G2For work( The drive signal of the positive and negative half-wave of rate pipe after the binary signal is by being isolated power amplified drive circuit, drives half-bridge or full-bridge work( The work of rate pipe, circuit each point waveform logic figure shown in Figure 8.
According to another aspect of the present invention, a kind of anti-bias magnetic method for inverter is additionally provided, as shown in Figure 9 According to the anti-bias magnetic method flow chart for inverter of one embodiment of the present of invention, to come to we below with reference to Fig. 9 Method is described in detail.
First, in step s 110, inverter main transformer primary current signal is acquired.It is adopted specifically, may be used Collect the electric current that module 17 acquires inverter main transformer primary side.
In the step s 120, it is based on inverter main transformer primary current signal and predetermined voltage signals judges inversion electricity Whether source main transformer occurs magnetic bias.Specifically, by inverter main transformer primary current signal IfVoltage signal is converted to, The voltage signal and scheduled voltage signal (+12, -12) are compared, judge whether inverter main transformer occurs partially Magnetic.
In step s 130, when magnetic bias occurs for inverter main transformer, in current half-wave pulse width period, stop defeated Go out original half-wave pulse-width signal.Specifically, in output pwm control signal to stop exporting original half-wave pulse-width signal When, pulse synchronous signal and magnetic bias are primarily based on as a result, generating pwm control signal.Then pwm control signal is sent to PWM Module stops exporting original half-wave pulse-width signal to control PWM module.
In step S140, in next half-wave pulse width period, failing edge, impulsive synchronization letter based on pwm control signal Number and original half-wave pulse-width signal, generate pulsewidth be more than original half-wave pulse-width signal pulsewidth anti-magnetic bias pulsewidth tune Signal processed, and export to the inverter circuit of inverter, to control the magnetic bias state of inverter.Specifically, generating When pulsewidth is more than the anti-magnetic bias pulse-width signal of the pulsewidth of original half-wave pulse-width signal, first, in current half-wave pulsewidth In period, when the failing edge of pwm control signal arrives, predetermined pulse width single steady signal is exported.Then, in next half-wave pulse width period It is interior, the monostable trigger signal of predetermined pulse width is generated according to predetermined pulse width single steady signal and pulse synchronous signal, while according to the first original Beginning half-wave pulse-width signal and pulse synchronous signal generate the first triggering half-wave pulse-width signal or the second original half-wave arteries and veins Wide modulated signal and pulse synchronous signal generate the second triggering half-wave pulse-width signal.Finally, it is touched according to predetermined pulse width is monostable It signals and the first triggering half-wave pulse-width signal generates the first anti-magnetic bias pulse-width signal, or is monostable according to predetermined pulse width Trigger signal and the second triggering half-wave pulse-width signal generate the second anti-magnetic bias pulse-width signal.By the first anti-magnetic bias pulsewidth Modulated signal or the second anti-magnetic bias pulse-width signal are exported to the input terminal of inverter circuit.
While it is disclosed that embodiment content as above but described only to facilitate understanding the present invention and adopting Embodiment is not limited to the present invention.Any those skilled in the art to which this invention pertains are not departing from this Under the premise of the disclosed spirit and scope of invention, any modification and change can be made in the implementing form and in details, But protection scope of the present invention still should be subject to the scope of the claims as defined in the appended claims.

Claims (10)

1. a kind of anti-biasing circuit for inverter, including:
PWM module is configured as output to pulse synchronous signal and two original half-wave pulsewidth modulations letters of 180 ° of phase difference Number;
Comparison module, is configured to inverter main transformer primary current signal and predetermined voltage signals judge inversion electricity Whether source main transformer occurs magnetic bias;
PWM output control modules are configured to, when magnetic bias occurs for inverter main transformer, be based on the pulse synchronous signal With the comparison result of comparison module output, pwm control signal is exported to the PWM module so that the PWM module stops Export original half-wave pulse-width signal;
PWM pulse-width regulated modules, be configured to the failing edge of the pwm control signal, next pulse synchronous signal and under One original half-wave pulse-width signal generates the anti-magnetic bias pulsewidth that pulsewidth is more than the pulsewidth of the original half-wave pulse-width signal Modulated signal is simultaneously exported to the inverter circuit of inverter, to control the magnetic bias state of the inverter.
2. anti-biasing circuit according to claim 1, which is characterized in that the PWM pulse-width regulateds module further comprises:
First trigger is configured to first input end and inputs the first original half-wave pulse-width signal, the input of the second input terminal The pulse synchronous signal, output end output the first triggering half-wave pulse-width signal;
Second trigger is configured to first input end and inputs the second original half-wave pulse-width signal, the input of the second input terminal The pulse synchronous signal, output end output the second triggering half-wave pulse-width signal;
Monostable sub-circuit is configured to the failing edge signal of the pwm control signal, exports the monostable letter of predetermined pulse width Number;
Third trigger, is configured to first input end input predetermined pulse width single steady signal, and the second input terminal inputs the pulse Synchronizing signal, output end export the monostable trigger signal of predetermined pulse width;
First and door, it is configured to first input end input the first triggering half-wave pulse-width signal, the second input terminal is defeated Enter the predetermined pulse width single steady signal, first anti-magnetic bias pulse-width signal of the output end output with predetermined pulse width;
Second and door, it is configured to first input end input the second triggering half-wave pulse-width signal, the second input terminal is defeated Enter the predetermined pulse width single steady signal, second anti-magnetic bias pulse-width signal of the output end output with predetermined pulse width.
3. anti-biasing circuit according to claim 2, which is characterized in that the PWM output control modules further comprise:
4th trigger, is configured to the comparison result that first input end inputs the comparison module output, and the second input terminal is defeated Enter the pulse synchronous signal, output end exports the pwm control signal.
4. anti-biasing circuit according to claim 3, which is characterized in that further include output module, including:
First or door, it is configured to first input end and inputs the first original half-wave pulse modulated signal, the second input terminal is defeated Enter the predetermined pulse width single steady signal, output end exports the first anti-magnetic bias pulse-width signal or the first original half-wave pulse Modulated signal;
Second or door, it is configured to first input end and inputs the second original half-wave pulse modulated signal, the second input terminal is defeated Enter the predetermined pulse width single steady signal, output end exports the second anti-magnetic bias pulse-width signal or the second original half-wave pulse Modulated signal.
5. anti-biasing circuit according to claim 4, which is characterized in that further include isolation power driver module, configuration For input terminal with described first or door and described second or the input terminal of door connect, the input terminal of output end and inverter connects It connects.
6. anti-biasing circuit according to claim 1, which is characterized in that further include current acquisition module, be configured to adopt Collect inverter main transformer primary current signal.
7. anti-biasing circuit according to claim 2, which is characterized in that the predetermined pulse width is equal to a pulse width modulation cycle The maximum pulse width that an interior half-wave pulse-width signal reaches.
8. a kind of anti-bias magnetic method for inverter, including:
Acquire inverter main transformer primary current signal;
Judge whether inverter main transformer is sent out based on inverter main transformer primary current signal and predetermined voltage signals Raw magnetic bias;
When magnetic bias occurs for inverter main transformer, in current half-wave pulse width period, stop exporting original half-wave pulsewidth tune Signal processed;
In next half-wave pulse width period, the failing edge, pulse synchronous signal based on the pwm control signal and original half-wave arteries and veins Wide modulated signal generates the anti-magnetic bias pulse-width signal that pulsewidth is more than the pulsewidth of original half-wave pulse-width signal, and exports To the inverter circuit of inverter, to control the magnetic bias state of inverter.
9. according to the method described in claim 8, it is characterized in that, output pwm control signal is to stop exporting original half-wave arteries and veins Wide modulated signal, further comprises:
Based on pulse synchronous signal and magnetic bias as a result, generating pwm control signal;
The pwm control signal is sent to PWM module, stops exporting original half-wave pulsewidth modulation to control the PWM module Signal.
10. according to the method described in claim 9, it is characterized in that, generating pulsewidth is more than original half-wave pulse-width signal The anti-magnetic bias pulse-width signal of pulsewidth, further comprises:
In current half-wave pulse width period, when the failing edge of pwm control signal arrives, predetermined pulse width single steady signal is exported;
In next half-wave pulse width period, predetermined pulse width list is generated according to the predetermined pulse width single steady signal and pulse synchronous signal Steady trigger signal, while the first triggering half-wave pulsewidth is generated according to the first original half-wave pulse-width signal and pulse synchronous signal Modulated signal or the second original half-wave pulse-width signal and pulse synchronous signal generate the second triggering half-wave pulsewidth modulation letter Number;
The first anti-magnetic bias pulsewidth modulation is generated according to the monostable trigger signal of predetermined pulse width and the first triggering half-wave pulse-width signal Signal, or the second anti-magnetic bias pulsewidth tune is generated according to the monostable trigger signal of predetermined pulse width and the second triggering half-wave pulse-width signal Signal processed.
CN201810189139.3A 2018-03-08 2018-03-08 Anti-bias circuit and method for inverter power supply Active CN108448882B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810189139.3A CN108448882B (en) 2018-03-08 2018-03-08 Anti-bias circuit and method for inverter power supply

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810189139.3A CN108448882B (en) 2018-03-08 2018-03-08 Anti-bias circuit and method for inverter power supply

Publications (2)

Publication Number Publication Date
CN108448882A true CN108448882A (en) 2018-08-24
CN108448882B CN108448882B (en) 2020-01-17

Family

ID=63193732

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810189139.3A Active CN108448882B (en) 2018-03-08 2018-03-08 Anti-bias circuit and method for inverter power supply

Country Status (1)

Country Link
CN (1) CN108448882B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110912430A (en) * 2019-11-23 2020-03-24 上海沪工焊接集团股份有限公司 Method for improving magnetic bias of inverter transformer
CN112701937A (en) * 2020-12-16 2021-04-23 河南海格经纬信息技术有限公司 Method for inhibiting DC magnetic bias of DC converter transformer
WO2021259218A1 (en) * 2020-06-23 2021-12-30 中兴通讯股份有限公司 Pulse width compensation method and apparatus, storage medium, and electronic apparatus

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102794547A (en) * 2012-08-04 2012-11-28 深圳市瑞凌实业股份有限公司 Pilot arc chopped wave control circuit and cutting machine
CN203151379U (en) * 2012-12-19 2013-08-21 扬州森源电气有限公司 Phase-shift full bridge converter having bias suppression used for photovoltaic power generation
CN105817738A (en) * 2016-02-03 2016-08-03 深圳市普耐尔科技有限公司 Novel electric welding machine PWM control system
CN106685229A (en) * 2015-12-08 2017-05-17 国网山东省电力公司临沂供电公司 DC biasing digital inhibition system and method based on bidirectional full-bridge converter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102794547A (en) * 2012-08-04 2012-11-28 深圳市瑞凌实业股份有限公司 Pilot arc chopped wave control circuit and cutting machine
CN203151379U (en) * 2012-12-19 2013-08-21 扬州森源电气有限公司 Phase-shift full bridge converter having bias suppression used for photovoltaic power generation
CN106685229A (en) * 2015-12-08 2017-05-17 国网山东省电力公司临沂供电公司 DC biasing digital inhibition system and method based on bidirectional full-bridge converter
CN105817738A (en) * 2016-02-03 2016-08-03 深圳市普耐尔科技有限公司 Novel electric welding machine PWM control system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110912430A (en) * 2019-11-23 2020-03-24 上海沪工焊接集团股份有限公司 Method for improving magnetic bias of inverter transformer
WO2021259218A1 (en) * 2020-06-23 2021-12-30 中兴通讯股份有限公司 Pulse width compensation method and apparatus, storage medium, and electronic apparatus
CN112701937A (en) * 2020-12-16 2021-04-23 河南海格经纬信息技术有限公司 Method for inhibiting DC magnetic bias of DC converter transformer
CN112701937B (en) * 2020-12-16 2023-09-26 河南海格经纬信息技术有限公司 Method for inhibiting DC magnetic bias of DC converter transformer

Also Published As

Publication number Publication date
CN108448882B (en) 2020-01-17

Similar Documents

Publication Publication Date Title
US9531185B2 (en) Current limiting control method for diode neutral-point-clamped three-level inverter and related circuit
CN108448882A (en) A kind of anti-biasing circuit and method for inverter
CN103368143B (en) Current mode switch power supply overpower-protection circuit
US20180301995A1 (en) Power converter and control method thereof
CN104821708A (en) Circuit structure improving EFT noise immunity of primary-side feedback power supply system
CN108039822A (en) A kind of transient current control method of double active full-bridge direct current converters
Zhang et al. A novel IGBT gate driver to eliminate the dead-time effect
WO2017020644A1 (en) Method and apparatus for reducing excitation current of transformer during bypass conducted by isolated ups
CN108011506A (en) A kind of Current limited Control method and system of inverter
CN108512426A (en) Switching Power Supply control method, device and switch power controller
CN106849662A (en) A kind of DC DC Switching Power Supplies method of works and control circuit based on FCCM
CN113138354A (en) Self-checking method and system of I-type three-level inverter
CN102207531A (en) Silicon controlled rectifier state detection method, apparatus and circuit for adjusting AC load power
CN105242149A (en) IGCT phase module circuit with inductor voltage state detection
CN103066967B (en) A kind of drive circuit
CN104836444B (en) The control method and circuit of a kind of self adaptation blanking time
CN104506038A (en) Optical coupling detection based Buck convertor soft-switching control method
CN107196272A (en) A kind of continuous protection device of Switching Power Supply armature winding peak point current depth
CN104702090A (en) Quick discharging method for bus capacitor of convertor
CN102957133A (en) IGBT (Insulated Gate Bipolar Translator) over-current withdraw protection circuit of frequency converter
EP2815491A2 (en) Gate driver for a power converter
CN103280816A (en) Thyristor zero-crossing triggering device based on non-linear sampling
Baocheng et al. Phase multilevel inverter fault diagnosis and tolerant control technique
Fu et al. Research on short circuit operation mechanism and current limiting strategy of single phase inverter
CN216696547U (en) Integrated circuit device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant