CN108430095B - Device and method for reducing power consumption of terminal chip - Google Patents
Device and method for reducing power consumption of terminal chip Download PDFInfo
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- CN108430095B CN108430095B CN201710078015.3A CN201710078015A CN108430095B CN 108430095 B CN108430095 B CN 108430095B CN 201710078015 A CN201710078015 A CN 201710078015A CN 108430095 B CN108430095 B CN 108430095B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/02—Power saving arrangements
- H04W52/0209—Power saving arrangements in terminal devices
- H04W52/0212—Power saving arrangements in terminal devices managed by the network, e.g. network or access point is master and terminal is slave
- H04W52/0216—Power saving arrangements in terminal devices managed by the network, e.g. network or access point is master and terminal is slave using a pre-established activity schedule, e.g. traffic indication frame
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
A device and a method for reducing power consumption of a terminal chip are provided. The device comprises a voltage/clock control module, a voltage/clock module, a first protocol layer unit and a second protocol layer unit, wherein the first protocol layer unit respectively presets the working voltage and the working frequency of the first protocol layer unit and the second protocol layer unit; the second protocol layer unit respectively processes the received downlink data and the transmitted uplink data; and the voltage/clock control module controls the voltage/clock module to provide voltage and clock for the first protocol layer unit and the second protocol layer unit. The method comprises the steps of receiving downlink and/or uplink scheduling resource information; and respectively presetting the working voltage and frequency of the first protocol layer unit and the second protocol layer unit according to the downlink and/or uplink scheduling resource information. The invention achieves the purpose of reducing the power consumption of the terminal chip by reducing the power consumption of each unit in the chip.
Description
Technical Field
The present invention relates to a communication terminal, and more particularly, to a device and method for reducing chip power consumption of a communication terminal.
Background
In the field of communications, particularly in the field of mobile communications, terminal standby time requirements are increasing. The standby time of the terminal is mainly related to the power consumption of the terminal chip, so that the key point for prolonging the standby time of the terminal is to reduce the power consumption of the terminal chip, especially the power consumption during uplink and downlink data services.
In the prior art, a DVFS (Dynamic Voltage and Frequency Scaling) technology provides a method for reducing chip power consumption, which specifically includes: and predicting the operation load required by the chip in the next unit time nearest to the current unit time, matching the working voltage and the working frequency required by the chip in the next unit time according to the operation load, informing a voltage management module and a clock management module, and adjusting the working voltage and the working frequency supplied to the chip in the next unit time, so that the working voltage and the working frequency of the chip are dynamically adjusted to reduce the power consumption of the chip. The method is mainly used for setting the working frequency and voltage of the chip according to the state (scene) of the terminal state, such as an idle state and a connection state. The terminal chip sets a higher working voltage and a higher working frequency in a connection state, and sets a lower working voltage and a lower working frequency in an idle state.
The method for reducing the power consumption of the chip has the following technical defects: the working voltage and the working frequency of the terminal chip set according to the terminal state are not accurate enough, on one hand, the DVFS is targeted to the whole chip and is not targeted to different processing units in the chip, and the working voltage and the working frequency requirements of different processing units in different chips are different actually; in addition, in order to ensure that the chip can work normally, a large margin is left for the working voltage and the working frequency of the chip, and the margin is set to be high. This also results in unnecessary power consumption waste.
Disclosure of Invention
In order to solve the defects of the prior art, the invention aims to provide a device and a method for reducing the power consumption of a chip, which can more accurately reduce the power consumption of a terminal chip by controlling the working voltage and the working frequency of each processing unit in the chip.
In order to achieve the above object, the present invention provides an apparatus for reducing power consumption of a terminal chip, comprising a voltage/clock control module, a voltage/clock module, a first protocol layer unit, and a second protocol layer unit, wherein,
the first protocol layer unit respectively presets the working voltage and the working frequency of the first protocol layer unit and the second protocol layer unit;
the second protocol layer unit respectively processes the received downlink data and the transmitted uplink data;
and the voltage/clock control module controls the voltage/clock module to provide voltage and clock for the first protocol layer unit and the second protocol layer unit.
Further, the first protocol layer unit calculates an operation load of the unit required to receive data and/or an operation load of the unit required to send data according to the received downlink and/or uplink scheduling resource information, and presets a working voltage and a working frequency of the unit; and determining the data operation load of the second protocol layer unit according to the data volume required to be received and/or the data volume required to be sent by the second protocol layer unit, and presetting the working voltage and the working frequency of the second protocol layer unit.
Further, the first protocol layer unit further includes a physical channel parameter detection module, a downlink data channel processing module, and a downlink data decoding module, wherein,
the physical channel parameter detection module receives downlink scheduling resource information sent by a wireless network side and analyzes downlink data;
the first protocol layer unit respectively calculates the computation amounts of downlink data which are required to be processed by the downlink data channel processing module, the downlink data decoding module and the second protocol layer unit according to downlink scheduling resource information; respectively setting working voltage and working frequency of the downlink data channel processing module, the downlink data decoding module and the second protocol layer unit according to the calculation amount and the time delay requirement of the downlink data to be processed;
the downlink data channel processing module performs channel processing on downlink data and then forwards the downlink data to the downlink data decoding module;
the downlink data decoding module decodes the downlink data and then sends the decoded downlink data to the second protocol layer unit;
and the second protocol layer unit receives and processes the downlink data decoded by the downlink data decoding module.
Further, the second protocol layer unit further includes a downlink data processing module, which processes downlink data according to the set working voltage and working frequency.
Further, the first protocol layer unit further includes a physical channel parameter detection module, an uplink data channel processing module, and an uplink data coding module, wherein,
the physical channel parameter detection module receives uplink scheduling resource information sent by a wireless network side;
the first protocol layer unit respectively calculates the computation amounts of uplink data which are required to be processed by the uplink data channel processing module, the uplink data decoding module and the second protocol layer unit according to the uplink scheduling resource information; respectively setting working voltage and working frequency of the uplink data channel processing module, the uplink data decoding module and the second protocol layer unit according to the required computation amount and time delay requirement;
and the uplink data coding module codes the uplink data processed by the second protocol layer unit and then sends the coded uplink data to the uplink data channel processing module for channel processing.
Furthermore, the second protocol layer unit further includes an uplink data processing module, which processes uplink data according to the set working voltage and working frequency.
In order to achieve the above object, the method for reducing power consumption of a terminal chip provided by the present invention comprises the following steps:
1) receiving downlink and/or uplink scheduling resource information;
2) and respectively presetting the working voltage and frequency of the first protocol layer unit and the second protocol layer unit according to the downlink and/or uplink scheduling resource information.
Further, the downlink and/or uplink scheduling resource information includes a transmission mode of a physical channel, a modulation mode, and a number of physical resource blocks.
Further, the step of presetting the operating voltage and frequency of the first protocol layer unit and the second protocol layer unit according to the downlink and/or uplink scheduling resource information further includes:
calculating the operation load of a first protocol layer unit which needs to receive data and/or the operation load of the first protocol layer unit which needs to send data according to downlink and/or uplink scheduling resource information, and presetting the working voltage and frequency of the first protocol layer unit;
and determining the operation load of the second protocol layer unit for processing data according to the data volume required to be received and/or the data volume required to be sent by the second protocol layer unit, and presetting the working voltage and the working frequency of the second protocol layer unit.
Further, the step of presetting the operating voltage and frequency of the first protocol layer unit and the second protocol layer unit according to the downlink and/or uplink scheduling resource information further includes:
calculating the operation amount of a downlink data channel processing module, the operation amount of a downlink data decoding module and the operation amount required by the downlink data processing module according to the downlink scheduling resource information;
setting working voltage and frequency according to the calculated operation amount and time delay requirement of the downlink data channel processing module;
setting working voltage and frequency of the downlink data decoding module according to the operation amount and the time delay requirement of the downlink data decoding module;
and setting the working voltage and frequency of the downlink data processing module according to the calculation amount and the time delay requirement of the downlink data processing module.
The downlink data channel processing module carries out channel processing of downlink data according to the set working voltage and frequency;
the downlink data decoding module decodes the downlink data according to the set working voltage and frequency;
and the downlink data processing module processes downlink data according to the set working voltage and frequency.
Further, the step of presetting the operating voltage and frequency of the first protocol layer unit and the second protocol layer unit according to the downlink and/or uplink scheduling resource information further includes:
calculating the calculation amount of an uplink data channel processing module, the calculation amount of an uplink data coding module and the calculation amount required by the uplink data processing module according to the uplink scheduling resource information;
setting working voltage and frequency according to the calculated operation amount and time delay requirement of the uplink data channel processing module;
setting working voltage and frequency of the uplink data coding module according to the operation amount and the time delay requirement of the uplink data coding module;
and setting the working voltage and frequency of the uplink data processing module according to the calculation amount and the time delay requirement of the uplink data processing module.
The uplink data processing module is used for processing data of an uplink transmission channel/a logic channel according to the set working voltage and working frequency;
the uplink data coding module is used for coding uplink data according to the set working voltage and working frequency;
and the uplink channel processing module is used for processing an uplink data channel according to the set working voltage and working frequency.
The method and the device for reducing the power consumption of the terminal chip adjust the working voltage and the working frequency of the first protocol layer unit and the second protocol layer unit in real time according to the scheduling condition of each TTI resource of a wireless network, and accurately reduce the power consumption of the first protocol layer unit and the second protocol layer unit of the terminal, thereby effectively reducing the power consumption of the whole terminal chip.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic block diagram of an apparatus for reducing power consumption of a terminal chip according to the present invention;
FIG. 2 is a flow chart of a method for reducing power consumption of a terminal chip according to the present invention;
FIG. 3 is a schematic block diagram of an apparatus according to embodiment 1 of the present invention;
FIG. 4 is a flowchart of a method according to example 1 of the present invention;
FIG. 5 is a schematic block diagram of an apparatus according to embodiment 2 of the present invention;
FIG. 6 is a flowchart of a method according to embodiment 2 of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
In a mobile communication system, the first protocol layer may be a physical layer and the second protocol layer may be a protocol stack layer. The terminal chip comprises a first protocol layer unit and a second protocol layer unit. And the second protocol layer unit of the terminal processes the downlink data output by the first protocol layer unit. And the first protocol layer unit of the terminal processes the uplink data output by the second protocol layer unit. One unit Time may be one or more TTIs (Transmission Time Interval).
According to the invention, the working voltage and the working frequency of the first protocol layer unit and the second protocol layer unit are configured according to the uplink and downlink resource condition of each TTI scheduled by the network for the terminal, and the power consumption of the chip is accurately controlled.
Fig. 1 is a schematic block diagram of an apparatus for reducing power consumption of a terminal chip according to the present invention, and as shown in fig. 1, the apparatus for reducing power consumption of a terminal chip of the present invention includes a voltage/clock control module 101, a voltage/clock module 102, a first protocol layer unit 103, and a second protocol layer unit 104, wherein,
a first protocol layer unit 103, configured to receive downlink and/or uplink scheduling resource information sent by a wireless network side, and send the downlink and/or uplink scheduling resource information to the voltage/clock control module 101; according to the downlink and/or uplink scheduling resource information, calculating the operation load of the unit which needs to receive data and/or the operation load which needs to send data in the subsequent unit time, and presetting the working voltage and frequency of the unit in the subsequent unit time; determining the operation load of the second protocol layer unit 104 for processing data in the subsequent unit time according to the data volume required to be received and/or the data volume required to be sent by the second protocol layer unit 104, and presetting the working voltage and the working frequency of the second protocol layer unit 104 in the subsequent unit time according to the operation load; coding and decoding the data and processing a physical channel;
a second protocol layer unit 104, configured to process the received downlink data and the transmitted uplink data;
a voltage/clock control module 101, which controls the voltage/clock module 102 to provide voltage and clock for the first protocol layer unit 103 and the second protocol layer unit 104 according to the received downlink and/or uplink scheduling resource information.
And a voltage/clock module 102, which is controlled by the voltage/clock control module 101, and provides voltage and clock for the first protocol layer unit 103 and the second protocol layer unit 104.
Fig. 2 is a flowchart of a method for reducing power consumption of a terminal chip according to the present invention, and the method for reducing power consumption of a terminal chip according to the present invention will be described in detail with reference to fig. 2.
First, in step 201, the first protocol layer unit 103 receives downlink and/or uplink scheduling resource information sent by the wireless network side, and sends the downlink and/or uplink scheduling resource information to the voltage/clock control module 101;
in step 202, the first protocol layer unit 103 calculates, according to the downlink and/or uplink scheduling resource information, an operation load required by the first protocol layer unit 103 to receive data and/or an operation load required by the first protocol layer unit 103 to transmit data in a subsequent unit time;
in step 203, the first protocol layer unit 103 presets the operating voltage and frequency of the first protocol layer unit 103 in the subsequent unit time according to the calculation load of the first protocol layer unit 103 that needs to receive data and/or the calculation load of the first protocol layer unit 103 that needs to transmit data in the subsequent unit time;
in step 204, the first protocol layer unit 103 determines the data operation load of the second protocol layer unit 104 in the subsequent unit time according to the data amount required to be received and/or the data amount required to be sent by the second protocol layer unit 104, and then presets the working voltage and the working frequency of the second protocol layer unit 104 in the subsequent unit time;
in step 205, the first protocol layer unit 103 sets the operating voltage and the operating frequency of the first protocol layer unit 103 and the second protocol layer unit 104 according to the operating voltage and the operating frequency of the first protocol layer unit 103 and the second protocol layer unit 104 in the preset subsequent unit time.
Example one
Fig. 3 is a schematic block diagram of an apparatus according to embodiment 1 of the present invention, and as shown in fig. 3, the apparatus according to embodiment 1 of the present invention includes a voltage/clock control module 101, a voltage/clock module 102, a first protocol layer unit 103, and a second protocol layer unit 104, wherein,
the first protocol layer unit 103 further comprises a physical channel parameter detection module 301, a downlink data channel processing module 302, and a downlink data decoding module 303,
a physical channel parameter detection module 301, which detects downlink scheduling resource information to be processed by a chip in a first unit time sent by a wireless network side, and sends the downlink scheduling resource information to the voltage/clock control module 101; sending the analyzed downlink data to a downlink data channel processing module 302; the downlink scheduling resource information at least comprises a transmission mode, a modulation mode and the number of physical resource blocks of a physical channel.
The downlink data channel processing module 302 sends the received downlink data to the downlink data decoding module 303 after new arrival processing.
The downlink data decoding module 303 decodes the downlink data and sends the decoded downlink data to the second protocol layer unit 104.
The second protocol layer unit 104 further includes a downlink data processing module 401, which receives and processes the decoded downlink data sent by the downlink data decoding module 303.
A first protocol layer unit 103, which calculates the calculation amount of downlink data required to be processed by the downlink data channel processing module 302, the downlink data decoding module 303, and the downlink data processing module 401 according to the downlink scheduling resource information, and sets the operating voltage and the operating frequency thereof according to the calculation amount and the delay requirement of the downlink data channel processing module 302; setting the working voltage and working frequency according to the calculation amount and delay requirement of the downlink data decoding module 303; the working voltage and working frequency of the downlink data processing module 401 are set according to the amount of downlink data to be processed and the delay requirement.
And the voltage/clock control module 101 controls the operation of the voltage/clock module 102 according to the received downlink scheduling resource information.
And a voltage/clock module 102, which receives the control of the voltage/clock control module 101 and provides voltage and clock for the physical channel parameter detection module 301, the downlink data channel processing module 302, the downlink data decoding module 303 of the first protocol layer unit 103 and the downlink data processing module 401 of the second protocol layer unit 104.
Fig. 4 is a flowchart of a method according to embodiment 1 of the present invention, and the method of embodiment 1 of the present invention will be described in detail with reference to fig. 4.
Firstly, in step 401, the physical channel parameter detection module 301 of the first protocol layer unit 103 sends the received downlink scheduling resource information, which is sent by the wireless network side and needs to be processed by detecting the chip in the unit time within the first unit time, to the voltage/clock control module 101, and analyzes the downlink scheduling resource information;
in step 402, the first protocol layer unit 103 calculates the computation of the downlink data channel processing module 302, the computation of the downlink data decoding module 303, and the computation required by the downlink data processing module 401 in the second protocol layer unit according to the downlink scheduling resource information;
in step 403, the first protocol layer unit 103 sets the operating voltage and frequency according to the calculated computation amount and delay requirement of the downlink data channel processing module 302; setting the working voltage and frequency according to the calculation amount and the time delay requirement of the downlink data decoding module 303;
in step 404, the first protocol layer unit 103 sets the operating voltage and frequency thereof according to the calculated computation amount and delay requirement required by the downlink data processing module 401;
in step 405, the downlink data channel processing module 302 performs channel processing on downlink data according to the working voltage and frequency set by the first protocol layer unit 103;
in step 406, the downlink data decoding module 303 decodes the downlink data according to the working voltage and frequency set by the first protocol layer unit 103;
in step 407, the downlink data processing module 401 performs processing on the downlink data according to the operating voltage and frequency set by the first protocol layer unit 103.
In this embodiment, the first protocol layer unit 103 parses downlink data according to scheduling resource information sent by the wireless network, and sends the data to the second protocol layer unit 104. The second protocol layer unit 104 processes the received downlink data. The first protocol layer unit 103 and the second protocol layer unit 104 can reduce the power consumption of the terminal chip by the method provided by the embodiment, so as to reduce the power consumption of the whole terminal.
Example two
Fig. 5 is a schematic block diagram of an embodiment 2 device according to the present invention, and as shown in fig. 5, the embodiment 2 device of the present invention includes a voltage/clock control module 101, a voltage/clock module 102, a first protocol layer unit 103, and a second protocol layer unit 104, wherein,
the first protocol layer unit 103 further comprises a physical channel parameter detection module 301, an uplink data channel processing module 304, and an uplink data coding module 305,
the physical channel parameter detection module 301 is configured to send uplink resource scheduling information, which is sent by the wireless network side and needs to be processed by the chip in the nth unit time when the (N + K) th unit time is detected, to the voltage/clock control module 101; the uplink resource scheduling information at least comprises a transmission mode, a modulation mode and the number of physical resource blocks of a physical channel.
The uplink data channel processing module 304 is configured to send the encoded uplink data sent by the uplink data encoding module 305 to the physical channel parameter detecting module 301 after performing channel processing.
The uplink data encoding module 305 encodes the uplink data sent by the second protocol layer unit 104 and sends the encoded uplink data to the uplink data channel processing module 304.
The second protocol layer unit 104 further includes an uplink data processing module 402, which processes the uplink data and sends the processed uplink data to the uplink data encoding module 305.
The first protocol layer unit 103 calculates, according to the uplink scheduling resource information, an amount of computation required by the uplink data processing module 402 to process uplink data in the (N + K) th unit time, and an amount of computation required by the uplink data channel processing module 304 and the uplink data encoding module 305 to process uplink data; setting the working voltage and working frequency according to the operation amount and the time delay requirement of the uplink data channel processing module 304; setting the working voltage and working frequency according to the calculation amount and delay requirement of the uplink data encoding module 305; the working voltage and working frequency are set according to the computation and delay requirements of the uplink data processing module 402 for processing downlink data.
And a voltage/clock control module 101 for controlling the operation of the voltage/clock module 102 according to the received uplink scheduling resource information.
And a voltage/clock module 102, which is controlled by the voltage/clock control module 101, and provides voltage and clock for the physical channel parameter detection module 301, the uplink data channel processing module 304, the uplink data encoding module 305, and the uplink data processing module 402.
Fig. 6 is a flowchart of a method according to embodiment 2 of the present invention, and the method of embodiment 2 of the present invention will be described in detail with reference to fig. 6.
First, in step 601, the module 301 for detecting physical channel parameters of the first protocol layer unit 103 detects uplink resource scheduling information to be processed by a chip in the (N + K) th unit time in the nth unit time, where the resource scheduling parameters at least include a transmission mode, a modulation scheme, and a number of physical resource blocks of a physical channel.
In step 602, the voltage/clock control module 101 calculates an operation amount of the uplink data processing module 402 required to process the uplink data in the (N + K) th unit time according to the uplink scheduling resource information;
in step 603, the first protocol layer unit 103 calculates the computation load of the uplink data coding module and the uplink channel processing module according to the uplink scheduling resource information;
in step 604, the first protocol layer unit 103 sets the operating voltage and operating frequency of the uplink data processing module 402 according to the computation and delay requirement of the uplink data processing module 402;
in step 605, the first protocol layer unit 103 sets the working voltage and the working frequency of the uplink data encoding module 304 and the uplink channel processing module 305 according to the computation and the delay requirement of the uplink data encoding module 305 and the uplink channel processing module 304;
in step 606, the uplink data processing module 402 performs uplink transport channel/logical channel data processing according to the set working voltage and working frequency;
in step 607, the uplink data encoding module performs uplink data encoding processing according to the set working voltage and working frequency;
in step 608, the uplink channel processing module performs uplink data channel processing according to the set working voltage and working frequency.
In this embodiment, the first protocol layer unit 103 sends the uplink resource scheduling information sent by the wireless network to the second protocol layer unit 104; the second protocol layer unit 104 sends the uplink data to the first protocol layer chip 103 in the specified TTI according to the resource scheduling information; the first protocol layer chip 103 performs transmission processing on the uplink data sent by the second protocol layer unit 104 according to the uplink physical channel parameter in the uplink resource scheduling information. The first protocol layer unit 103 and the second protocol layer unit 104 can reduce the power consumption of the terminal chip by the method provided by the embodiment, so as to reduce the power consumption of the whole terminal.
The first embodiment and the second embodiment are described with respect to downlink reception and uplink transmission processing in a wireless communication system, respectively. The method provided in this embodiment may also be specifically implemented to various wireless communication System terminals, including uplink and downlink processing of LTE (Long Term Evolution), CDMA (Code Division Multiple Access), WCDMA (Wideband Code Division Multiple Access), WiMAX (Worldwide interoperability for Microwave Access), and GSM (Global System of Mobile communication) System terminals. In addition, the method provided in this embodiment may also be specifically implemented to measurement and CQI (channel Quality indication) processing of various wireless communication system terminals, that is, the terminal acquires an operation amount required for measurement and/or CQI processing in unit time according to measurement and CQI parameters configured in a semi-static state of the network, so as to further adjust the operating voltage/frequency of each chip unit in combination with the operation amounts for uplink and/or downlink processing in unit time of the first protocol unit and the second protocol unit.
Those of ordinary skill in the art will understand that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (9)
1. An apparatus for reducing power consumption of a terminal chip, comprising a voltage/clock control module, a voltage/clock module, a first protocol layer unit, and a second protocol layer unit,
the first protocol layer unit respectively presets the working voltage and the working frequency of the first protocol layer unit and the second protocol layer unit;
the second protocol layer unit respectively processes the received downlink data and the transmitted uplink data;
the voltage/clock control module controls the voltage/clock module to provide voltage and clock for the first protocol layer unit and the second protocol layer unit;
the first protocol layer unit calculates the operation load of the unit needing to receive data and/or the operation load needing to send data according to the received downlink and/or uplink scheduling resource information, and presets the working voltage and the working frequency of the unit; determining the data operation load of the second protocol layer unit according to the data volume required to be received and/or the data volume required to be sent by the second protocol layer unit, and presetting the working voltage and the working frequency of the second protocol layer unit;
the first protocol layer unit further comprises a physical channel parameter detection module, a downlink data channel processing module, and a downlink data decoding module, wherein,
the physical channel parameter detection module receives downlink scheduling resource information sent by a wireless network side and analyzes downlink data;
the first protocol layer unit respectively calculates the computation amounts of downlink data which are required to be processed by the downlink data channel processing module, the downlink data decoding module and the second protocol layer unit according to downlink scheduling resource information; respectively setting working voltage and working frequency of the downlink data channel processing module, the downlink data decoding module and the second protocol layer unit according to the calculation amount and the time delay requirement of the downlink data to be processed;
the downlink data channel processing module performs channel processing on downlink data and then forwards the downlink data to the downlink data decoding module;
the downlink data decoding module decodes the downlink data and then sends the decoded downlink data to the second protocol layer unit;
and the second protocol layer unit receives and processes the downlink data decoded by the downlink data decoding module.
2. The apparatus of claim 1, wherein the second protocol layer unit further includes a downlink data processing module, which processes downlink data according to the set operating voltage and operating frequency.
3. The apparatus for reducing power consumption of a terminal chip according to claim 1, wherein the first protocol layer unit further comprises a physical channel parameter detection module, an uplink data channel processing module, and an uplink data coding module, wherein,
the physical channel parameter detection module receives uplink scheduling resource information sent by a wireless network side;
the first protocol layer unit respectively calculates the computation amounts of uplink data which are required to be processed by the uplink data channel processing module, the uplink data decoding module and the second protocol layer unit according to the uplink scheduling resource information; respectively setting working voltage and working frequency of the uplink data channel processing module, the uplink data decoding module and the second protocol layer unit according to the required computation amount and time delay requirement;
and the uplink data coding module codes the uplink data processed by the second protocol layer unit and then sends the coded uplink data to the uplink data channel processing module for channel processing.
4. The apparatus for reducing power consumption of a terminal chip according to claim 3, wherein the second protocol layer unit further includes an uplink data processing module, which processes uplink data according to the set operating voltage and operating frequency.
5. A method for reducing power consumption of a terminal chip comprises the following steps:
receiving downlink and/or uplink scheduling resource information;
respectively presetting working voltage and frequency of a first protocol layer unit and a second protocol layer unit according to the downlink and/or uplink scheduling resource information;
the step of presetting the working voltage and frequency of the first protocol layer unit and the second protocol layer unit respectively according to the downlink and/or uplink scheduling resource information further comprises:
calculating the operation load of a first protocol layer unit which needs to receive data and/or the operation load of the first protocol layer unit which needs to send data according to downlink and/or uplink scheduling resource information, and presetting the working voltage and frequency of the first protocol layer unit;
determining the operation load of a second protocol layer unit for processing data according to the data volume required to be received and/or the data volume required to be sent by the second protocol layer unit, and presetting the working voltage and the working frequency of the second protocol layer unit;
the step of presetting the working voltage and frequency of the first protocol layer unit and the second protocol layer unit respectively according to the downlink and/or uplink scheduling resource information further comprises:
calculating the operation amount of a downlink data channel processing module, the operation amount of a downlink data decoding module and the operation amount required by the downlink data processing module according to the downlink scheduling resource information;
setting working voltage and frequency according to the calculated operation amount and time delay requirement of the downlink data channel processing module;
setting working voltage and frequency of the downlink data decoding module according to the operation amount and the time delay requirement of the downlink data decoding module;
and setting the working voltage and frequency of the downlink data processing module according to the calculation amount and the time delay requirement of the downlink data processing module.
6. The method of claim 5, wherein the downlink and/or uplink scheduling resource information includes a transmission mode, a modulation scheme, and a number of physical resource blocks of a physical channel.
7. The method for reducing power consumption of a terminal chip according to claim 5, further comprising the steps of:
the downlink data channel processing module carries out channel processing of downlink data according to the set working voltage and frequency;
the downlink data decoding module decodes the downlink data according to the set working voltage and frequency;
and the downlink data processing module processes downlink data according to the set working voltage and frequency.
8. The method for reducing power consumption of a terminal chip according to claim 5, wherein the step of presetting the operating voltage and frequency of the first protocol layer unit and the second protocol layer unit according to the downlink scheduling resource information and/or the uplink scheduling resource information further comprises:
calculating the calculation amount of an uplink data channel processing module, the calculation amount of an uplink data coding module and the calculation amount required by the uplink data processing module according to the uplink scheduling resource information;
setting working voltage and frequency according to the calculated operation amount and time delay requirement of the uplink data channel processing module;
setting working voltage and frequency of the uplink data coding module according to the operation amount and the time delay requirement of the uplink data coding module;
and setting the working voltage and frequency of the uplink data processing module according to the calculation amount and the time delay requirement of the uplink data processing module.
9. The method for reducing power consumption of a terminal chip according to claim 8, further comprising the steps of:
the uplink data processing module is used for processing data of an uplink transmission channel/a logic channel according to the set working voltage and working frequency;
the uplink data coding module is used for coding uplink data according to the set working voltage and working frequency;
and the uplink channel processing module is used for processing an uplink data channel according to the set working voltage and working frequency.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101044778A (en) * | 2004-09-01 | 2007-09-26 | 英特尔公司 | Performance optimization of a wireless network at different protocol layers by adjusting communication parameters simultaneously |
| CN102171972A (en) * | 2009-04-08 | 2011-08-31 | 思科技术公司 | Power consumption management in a network device |
| CN102893675A (en) * | 2010-02-19 | 2013-01-23 | 高通股份有限公司 | Protocol stack power optimization for wireless communications devices |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9323311B2 (en) * | 2006-06-22 | 2016-04-26 | Broadcom Corporation | Method and system for packet based signaling between A Mac and A PHY to manage energy efficient network devices and/or protocols |
| US20160182257A1 (en) * | 2014-12-23 | 2016-06-23 | Intel Corporation | Data rate detection to simplify retimer logic |
-
2017
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101044778A (en) * | 2004-09-01 | 2007-09-26 | 英特尔公司 | Performance optimization of a wireless network at different protocol layers by adjusting communication parameters simultaneously |
| CN102171972A (en) * | 2009-04-08 | 2011-08-31 | 思科技术公司 | Power consumption management in a network device |
| CN102893675A (en) * | 2010-02-19 | 2013-01-23 | 高通股份有限公司 | Protocol stack power optimization for wireless communications devices |
Non-Patent Citations (2)
| Title |
|---|
| Low-power LVDS receiver for 1.3Gbps physical layer (PHY) interface;G. Mandal等;《IEEE》;20050725;全文 * |
| 基于IEEE1588协议的工业以太网控制芯片的设计;曹煜;《中国优秀硕士学位论文全文数据库 信息科技辑》;20130331;全文 * |
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