CN108363636B - Embedded fault-tolerant system and fault-tolerant method thereof - Google Patents

Embedded fault-tolerant system and fault-tolerant method thereof Download PDF

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CN108363636B
CN108363636B CN201810208261.0A CN201810208261A CN108363636B CN 108363636 B CN108363636 B CN 108363636B CN 201810208261 A CN201810208261 A CN 201810208261A CN 108363636 B CN108363636 B CN 108363636B
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CN108363636A (en
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谭庆平
李盼盼
徐建军
邵则铭
曾平
张南
孟宪凯
张浩宇
颜颖
谢勤政
周歆星
韩沛宇
沈桂竹
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National University of Defense Technology
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0736Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant

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Abstract

The invention belongs to the technical field of computer software, and discloses an embedded fault-tolerant system and a fault-tolerant method thereof. The invention adopts the external special configuration chip to control the fault recovery means, avoids that the self-conversion can not be carried out when the first special system or the second special system has uncontrollable fault, ensures the stability and the safety of the system, can realize the switching of the standby system under the condition of not stopping the working state of the system when the system has fault, and has high working efficiency.

Description

Embedded fault-tolerant system and fault-tolerant method thereof
Technical Field
The invention belongs to the technical field of computer software, and particularly relates to an embedded fault-tolerant system and a fault-tolerant method thereof.
Background
At present, the application range of the embedded fault-tolerant system is wide, and the embedded fault-tolerant system is widely applied to a plurality of fields such as military, industry, communication, transportation, electronics and the like. The development prospect is huge, and based on the development prospect, the required embedded fault-tolerant system is required to be more accurate. The internal fault regulation efficiency of the existing fault-tolerant system is not high, and the stability of the system is poor.
In summary, the problems of the prior art are as follows: most of the existing fault-tolerant systems are non-embedded, the internal fault regulation efficiency of the fault-tolerant systems is not high, and the stability of the systems is poor.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides an embedded fault-tolerant system and a fault-tolerant method thereof.
The invention is realized in such a way, and provides an embedded fault-tolerant system and a fault-tolerant method thereof.
Central processing unit passes through the right side top of welded fastening in circuit integration mainboard, the right side below of heat dissipation screen panel through the screw fastening in circuit integration mainboard, the magnetism track passes through the left side edge of welded fastening in circuit integration mainboard, it is inboard that first private system passes through the magnetism track of screw fastening in circuit integration mainboard, the first private system below of second private system in circuit integration mainboard left side through welded fastening, the magnetic controller passes through the draw-in groove and installs in the magnetism track, the magnetism tablet is located first private system and second private system through the welding.
Further, the first dedicated system and the second dedicated system each include: the system comprises a synchronous software module, a fault management module and a client virtual machine module;
when the embedded fault-tolerant system runs, the synchronous software module, the fault management module and the client virtual machine module of the first special system and the second special system all run on the virtualization kernel and respectively correspond to the synchronous software process, the fault management process and the client virtual machine on the virtualization kernel;
the client virtual machine is used for realizing the running of the application program; the guest virtual machines of the first private system are in a running state and the guest virtual machines of the second private system are in a synchronously running but inaccessible management state.
Another objective of the present invention is to provide an embedded fault tolerant method, which comprises the following steps:
(1) detecting the program states of the first special system and the second special system through a central processing unit, and determining whether to perform system switching according to a detection result;
the signal-to-noise ratio estimation method of the central processing unit comprises the following steps:
step one, a measurement signal is formed by mixing N component signals and Gaussian white noise, and the normalized fourth-order cumulant of the measurement signal is solved
Figure BDA0001596478720000021
Normalized sixth order cumulant
Figure BDA0001596478720000022
Normalized eighth order cumulant
Figure BDA0001596478720000023
Waiting for N +1 normalized high-order cumulants;
step two, constructing a normalized high-order cumulant equation set;
traversing the modulation type combination of the N signals, looking up the table to obtain the normalized high-order cumulant of each modulation type signal, substituting the normalized high-order cumulant into the first N equations in the equation set, and calculating to obtainRatio of power of each component signal to total signal
Figure BDA0001596478720000024
Substituting the result into the (N + 1) th equation, and screening out a correct modulation type combination;
step four, obtaining the correct modulation type and the power ratio of each component signal to the total signal
Figure BDA0001596478720000025
Figure BDA0001596478720000026
According to the formula of signal-to-noise ratio estimation
Figure BDA0001596478720000027
Estimating a signal-to-noise ratio;
(2) the synchronous software process is used for presetting a trigger condition of virtual memory synchronization, and when the trigger condition occurs, the central processing unit suspends the running of the client virtual machine of the first special system and synchronizes the client virtual machine of the second special system;
(3) the central processing unit controls the magnetic induction plate on the upper side of the first special system to lose efficacy and separate from the magnetic controller, the magnetic controller slides to the second special system through the magnetic track to be connected with the magnetic induction plate, and the second special system continues to work;
the magnetic signal model of the signal amplification time-frequency overlap MASK of the magnetic controller is expressed as follows:
Figure BDA0001596478720000031
wherein N is the number of magnetic signal components of the time-frequency overlapped magnetic signal, N (t) is additive white Gaussian noise, si(t) is the magnetic signal component of the time-frequency superposed magnetic signal, expressed as
Figure BDA0001596478720000032
In the formula AiRepresenting the amplitude of the magnetic signal component, ai(m) symbol symbols representing magnetic signal components, p (T) a shaping filter function, TiSymbol period, f, representing a magnetic signal componentciRepresenting the carrier frequency of the magnetic signal component,
Figure BDA0001596478720000033
representing the phase of the magnetic signal component; the diagonal slice spectrum of the cyclic bispectrum of the MASK magnetic signal is represented as:
Figure BDA0001596478720000034
wherein y (t) represents the MASK magnetic signal, α is the cycle frequency of y (t), fcDenotes the carrier frequency of the magnetic signal, T is the symbol period of the magnetic signal, k is an integer,
Figure BDA0001596478720000035
Ca,3represents the third order cumulant of the random sequence a, δ () is an impulse function, p (f) is a shaped pulse function, and the expression is:
Figure BDA0001596478720000036
taking a section f of the diagonal slice spectrum of the cycle bispectrum to be 0 to obtain:
Figure BDA0001596478720000037
for the MASK magnetic signal, f of a diagonal slice spectrum of a cyclic bispectrum is equal to 0 section, a peak value exists at the section, and carrier frequency information of the magnetic signal is carried; because the diagonal slice spectrum of the cyclic bispectrum satisfies the linear superposition, the expression of the diagonal slice spectrum of the time-frequency overlapped MASK magnetic signal cyclic bispectrum is as follows:
Figure BDA0001596478720000041
wherein the content of the first and second substances,
Figure BDA0001596478720000042
is constant and depends on the modulation scheme of the ith magnetic signal component, TiIs the symbol period of the ith magnetic signal component;
(4) restarting a client virtual machine of the first special system to run, wherein the client virtual machine of the first special system completes I/O read-write operation contained in the virtual memory synchronization, and ensures that the disk data of the first special system is consistent with the disk data of the second special system;
(5) the fault management process is used for realizing management and fault recovery of hardware, a client virtual machine and a synchronous software process of the first special system and the second special system.
Further, in step (2), the first dedicated system determines a virtual memory page whose page content in the client virtual machine has changed since the occurrence of the last trigger condition until the occurrence of the current trigger condition, and synchronizes the virtual memory page whose page content has changed, so that the content of the corresponding virtual memory page of the client virtual machine in the second dedicated system is consistent with the content of the virtual memory page whose page content has changed in the first dedicated system; meanwhile, the first special system and the second special system write the memory page content into respective logic disk volumes, and then release the I/O buffer area;
further, in the step (4), the synchronization software process of the first special system is in a running state, and the synchronization software process of the second special system is in a synchronous running but inaccessible management state;
further, in the step (5), the fault management process of the first special system is in a running state, and the fault management process of the second special system is in a synchronous running but inaccessible management state.
The invention has the advantages and positive effects that: the embedded fault-tolerant system is embedded into a computer system through a circuit integrated mainboard, a special system is controlled through a central processing unit, special system statement operation is carried out, the magnetic controller is connected with the magnetic induction plate, when the first special system breaks down, the magnetic induction plate fails to be separated from the magnetic controller, the magnetic controller slides to the second special system to be connected with the magnetic induction plate, and a standby special system is started to continue working;
the invention adopts the external special configuration chip to control the fault recovery means, avoids that the self-conversion can not be carried out when the first special system or the second special system has uncontrollable fault, ensures the stability and the safety of the system, can realize the switching of the standby system under the condition of not stopping the working state of the system when the system has fault, and has high working efficiency.
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FIG. 1 is a schematic structural diagram of an embedded fault tolerant system according to an embodiment of the present invention;
FIG. 2 is a flowchart of an embedded fault tolerance method according to an embodiment of the present invention;
in the figure: 1. a circuit integrated motherboard; 2. a central processing unit; 3. a heat dissipation mesh enclosure; 4. a magnetic track; 5. a first dedicated system; 6. a second dedicated system; 7. a magnetic controller; 8. a magnetic induction plate.
Detailed Description
In order to further understand the contents, features and effects of the present invention, the following embodiments are illustrated and described in detail with reference to the accompanying drawings.
The structure of the present invention will be described in detail below with reference to the accompanying drawings.
As shown in fig. 1, an embedded fault tolerant system provided in an embodiment of the present invention includes: the circuit comprises a circuit integrated mainboard 1, a central processing unit 2, a heat dissipation mesh enclosure 3, a magnetic track 4, a first special system 5, a second special system 6, a magnetic controller 7 and a magnetic induction board 8.
Central processing unit 2 is fixed in circuit integrated motherboard 1's right side top through the welding, 3 covers of radiator-grid are fixed in circuit integrated motherboard 1's right side below through the screw, magnetism track 4 is fixed in circuit integrated motherboard 1's left side edge through the welding, first special system 5 is inboard through the magnetism track 4 of screw fixation in circuit integrated motherboard 1, second special system 6 is fixed in circuit integrated motherboard 1 left side first special system 5 below through the welding, magnetic controller 7 installs in magnetism track 4 through the draw-in groove, magnetism tablet 8 is located first special system 5 and second special system 6 through the welding, first special system 5 and second special system 6 all include: the system comprises a synchronous software module, a fault management module and a client virtual machine module;
when the embedded fault-tolerant system runs, the synchronous software module, the fault management module and the client virtual machine module of the first special system 5 and the second special system 6 run on the virtualization kernel and respectively correspond to the synchronous software process, the fault management process and the client virtual machine on the virtualization kernel;
the client virtual machine is used for realizing the running of the application program; the guest virtual machines of the first private system 5 are in a running state and the guest virtual machines of the second private system 6 are in a synchronously running but inaccessible management state.
As shown in fig. 2, an embedded fault tolerance method includes the following steps:
s101: detecting the program states of the first special system and the second special system through a central processing unit, and determining whether to perform system switching according to a detection result;
s102: the synchronous software process is used for presetting a trigger condition of virtual memory synchronization, and when the trigger condition occurs, the central processing unit suspends the running of the client virtual machine of the first special system and synchronizes the client virtual machine of the second special system;
s103: the central processing unit controls the magnetic induction plate on the upper side of the first special system to lose efficacy and separate from the magnetic controller, the magnetic controller slides to the second special system through the magnetic track to be connected with the magnetic induction plate, and the second special system continues to work;
s104: restarting a client virtual machine of the first special system to run, wherein the client virtual machine of the first special system completes I/O read-write operation contained in the virtual memory synchronization, and ensures that the disk data of the first special system is consistent with the disk data of the second special system;
s105: the fault management process is used for realizing management and fault recovery of hardware, a client virtual machine and a synchronous software process of the first special system and the second special system;
the signal-to-noise ratio estimation method of the central processing unit comprises the following steps:
step one, a measurement signal is formed by mixing N component signals and Gaussian white noise, and the normalized fourth-order cumulant of the measurement signal is solved
Figure BDA0001596478720000061
Normalized sixth order cumulant
Figure BDA0001596478720000062
Normalized eighth order cumulant
Figure BDA0001596478720000063
Waiting for N +1 normalized high-order cumulants;
step two, constructing a normalized high-order cumulant equation set;
traversing the modulation type combination of the N signals, looking up the table to obtain the normalized high-order cumulant of each modulation type signal, substituting the normalized high-order cumulant into the first N equations in the equation set, and calculating to obtain the power ratio of each component signal to the total signal
Figure BDA0001596478720000064
Substituting the result into the (N + 1) th equation, and screening out a correct modulation type combination;
step four, obtaining the correct modulation type and the power ratio of each component signal to the total signal
Figure BDA0001596478720000071
Figure BDA0001596478720000072
According to the formula of signal-to-noise ratio estimation
Figure BDA0001596478720000073
Estimating a signal-to-noise ratio;
the magnetic signal model of the signal amplification time-frequency overlap MASK of the magnetic controller is expressed as follows:
Figure BDA0001596478720000074
wherein N is the number of magnetic signal components of the time-frequency overlapped magnetic signal, N (t) is additive white Gaussian noise, si(t) is the magnetic signal component of the time-frequency superposed magnetic signal, expressed as
Figure BDA0001596478720000075
In the formula AiRepresenting the amplitude of the magnetic signal component, ai(m) symbol symbols representing magnetic signal components, p (T) a shaping filter function, TiSymbol period, f, representing a magnetic signal componentciRepresenting the carrier frequency of the magnetic signal component,
Figure BDA0001596478720000076
representing the phase of the magnetic signal component; the diagonal slice spectrum of the cyclic bispectrum of the MASK magnetic signal is represented as:
Figure BDA0001596478720000077
wherein y (t) represents the MASK magnetic signal, α is the cycle frequency of y (t), fcDenotes the carrier frequency of the magnetic signal, T is the symbol period of the magnetic signal, k is an integer,
Figure BDA0001596478720000078
Ca,3represents the third order cumulant of the random sequence a, δ () is an impulse function, p (f) is a shaped pulse function, and the expression is:
Figure BDA0001596478720000079
taking a section f of the diagonal slice spectrum of the cycle bispectrum to be 0 to obtain:
Figure BDA00015964787200000710
for the MASK magnetic signal, f of a diagonal slice spectrum of a cyclic bispectrum is equal to 0 section, a peak value exists at the section, and carrier frequency information of the magnetic signal is carried; because the diagonal slice spectrum of the cyclic bispectrum satisfies the linear superposition, the expression of the diagonal slice spectrum of the time-frequency overlapped MASK magnetic signal cyclic bispectrum is as follows:
Figure BDA0001596478720000081
wherein the content of the first and second substances,
Figure BDA0001596478720000082
is constant and depends on the modulation scheme of the ith magnetic signal component, TiIs the symbol period of the ith magnetic signal component.
The embedded fault-tolerant system is embedded into a computer system through a circuit integrated mainboard 1, a special system is controlled through a central processing unit 2 to carry out special system statement operation, the magnetic controller 7 is connected with a magnetic induction board 8, when a first special system 5 breaks down, the magnetic induction board 8 fails and is separated from the magnetic controller 7, the magnetic controller 7 slides to a second special system 6 to be connected with the magnetic induction board 8, and a standby special system is started to continue working.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the present invention in any way, and all simple modifications, equivalent changes and modifications made to the above embodiment according to the technical spirit of the present invention are within the scope of the technical solution of the present invention.

Claims (5)

1. An embedded fault-tolerant system is characterized in that the embedded fault-tolerant system is provided with a circuit integrated mainboard, a central processing unit, a heat dissipation mesh enclosure, a magnetic track, a first special system, a second special system, a magnetic controller and a magnetic induction plate;
the central processing unit is fixed above the right side of the circuit integration mainboard in a welding manner, the heat dissipation mesh enclosure is fixed below the right side of the circuit integration mainboard in a screw manner, the magnetic track is fixed at the left side edge of the circuit integration mainboard in a welding manner, the first special system is fixed at the inner side of the magnetic track of the circuit integration mainboard in a screw manner, the second special system is fixed below the first special system on the left side of the circuit integration mainboard in a welding manner, the magnetic controller is installed in the magnetic track through a clamping groove, and the magnetic induction plate is positioned on the first special system and the second special system in a welding manner;
the central processing unit controls the magnetic induction plate on the upper side of the first special system to lose efficacy and separate from the magnetic controller, the magnetic controller slides to the second special system through the magnetic track to be connected with the magnetic induction plate, and the second special system continues to work;
the first dedicated system and the second dedicated system each include: the system comprises a synchronous software module, a fault management module and a client virtual machine module;
when the embedded fault-tolerant system runs, the synchronous software module, the fault management module and the client virtual machine module of the first special system and the second special system all run on the virtualization kernel and respectively correspond to the synchronous software process, the fault management process and the client virtual machine on the virtualization kernel;
the client virtual machine is used for realizing the running of the application program; the guest virtual machines of the first private system are in a running state and the guest virtual machines of the second private system are in a synchronously running but inaccessible management state.
2. An embedded fault tolerant method using the embedded fault tolerant system of claim 1, wherein the embedded fault tolerant method comprises the steps of:
(1) detecting the program states of the first special system and the second special system through a central processing unit, and determining whether to perform system switching according to a detection result;
the signal-to-noise ratio estimation method of the central processing unit comprises the following steps:
step one, a measurement signal is formed by mixing N component signals and Gaussian white noise, and the normalized high-order cumulant of the measurement signal is solved
Figure FDA0003350646750000021
Step two, constructing a normalized high-order cumulant equation set;
traversing the modulation type combination of the N signals, looking up the table to obtain the normalized high-order cumulant of each modulation type signal, substituting the normalized high-order cumulant into the first N equations in the equation set, and calculating to obtain the power ratio of each component signal to the total signal
Figure FDA0003350646750000022
Substituting the result into the (N + 1) th equation, and screening out a correct modulation type combination;
step four, obtaining the correct modulation type and the power ratio of each component signal to the total signal
Figure FDA0003350646750000023
Figure FDA0003350646750000024
According to the formula of signal-to-noise ratio estimation
Figure FDA0003350646750000025
Estimating a signal-to-noise ratio;
(2) the synchronous software process is used for presetting a trigger condition of virtual memory synchronization, and when the trigger condition occurs, the central processing unit suspends the running of the client virtual machine of the first special system and synchronizes the client virtual machine of the second special system;
(3) the central processing unit controls the magnetic induction plate on the upper side of the first special system to lose efficacy and separate from the magnetic controller, the magnetic controller slides to the second special system through the magnetic track to be connected with the magnetic induction plate, and the second special system continues to work;
the magnetic signal model of the signal amplification time-frequency overlap MASK of the magnetic controller is expressed as follows:
Figure FDA0003350646750000026
wherein N is the number of magnetic signal components of the time-frequency overlapped magnetic signal, N (t) is additive white Gaussian noise, si(t) is the magnetic signal component of the time-frequency superposed magnetic signal, expressed as
Figure FDA0003350646750000027
In the formula AiRepresenting the amplitude of the magnetic signal component, ai(m) symbol symbols representing magnetic signal components, p (T) a shaping filter function, TiSymbol period, f, representing a magnetic signal componentciRepresenting the carrier frequency of the magnetic signal component,
Figure FDA0003350646750000028
representing the phase of the magnetic signal component; the diagonal slice spectrum of the cyclic bispectrum of the MASK magnetic signal is represented as:
Figure FDA0003350646750000031
wherein y (t) represents the MASK magnetic signal, α is the cycle frequency of y (t), fcDenotes the carrier frequency of the magnetic signal, T is the symbol period of the magnetic signal, k is an integer,
Figure FDA0003350646750000032
Ca,3represents the third order cumulant of the random sequence a, δ () is an impulse function, p (f) is a shaped pulse function, and the expression is:
Figure FDA0003350646750000033
taking a section f of the diagonal slice spectrum of the cycle bispectrum to be 0 to obtain:
Figure FDA0003350646750000034
for the MASK magnetic signal, f of a diagonal slice spectrum of a cyclic bispectrum is equal to 0 section, a peak value exists at the section, and carrier frequency information of the magnetic signal is carried; because the diagonal slice spectrum of the cyclic bispectrum satisfies the linear superposition, the expression of the diagonal slice spectrum of the time-frequency overlapped MASK magnetic signal cyclic bispectrum is as follows:
Figure FDA0003350646750000035
wherein the content of the first and second substances,
Figure FDA0003350646750000036
is constant and depends on the modulation scheme of the ith magnetic signal component, TiIs the symbol period of the ith magnetic signal component;
(4) restarting a client virtual machine of the first special system to run, wherein the client virtual machine of the first special system completes I/O read-write operation contained in the virtual memory synchronization, and ensures that the disk data of the first special system is consistent with the disk data of the second special system;
(5) the fault management process is used for realizing management and fault recovery of hardware, a client virtual machine and a synchronous software process of the first special system and the second special system.
3. The embedded fault-tolerant method according to claim 2, wherein in step (2), the first dedicated system determines the virtual memory page whose page content changes in the client virtual machine from the last occurrence of the trigger condition to the occurrence of the current trigger condition, and synchronizes the virtual memory page whose page content changes, so that the content of the corresponding virtual memory page of the client virtual machine in the second dedicated system is consistent with the content of the virtual memory page whose page content changes in the first dedicated system; at the same time, the first and second dedicated systems write the contents of the memory pages to their respective logical disk volumes, and then release the I/O buffers.
4. An embedded fault-tolerant method according to claim 2, characterized in that in step (4) the synchronization software process of the first dedicated system is in a running state and the synchronization software process of the second dedicated system is in a synchronously running but inaccessible management state.
5. An embedded fault-tolerant method according to claim 2, characterized in that in step (5) the fault management process of the first dedicated system is in a running state and the fault management process of the second dedicated system is in a synchronously running but inaccessible management state.
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