CN108363362A - Semiconductor board productivity simulation method and semiconductor board productivity simulation system - Google Patents

Semiconductor board productivity simulation method and semiconductor board productivity simulation system Download PDF

Info

Publication number
CN108363362A
CN108363362A CN201710057590.5A CN201710057590A CN108363362A CN 108363362 A CN108363362 A CN 108363362A CN 201710057590 A CN201710057590 A CN 201710057590A CN 108363362 A CN108363362 A CN 108363362A
Authority
CN
China
Prior art keywords
production line
semi
conducting material
semiconductor board
simulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201710057590.5A
Other languages
Chinese (zh)
Other versions
CN108363362B (en
Inventor
杨凯珽
柯力仁
沈香吟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiwan Semiconductor Manufacturing Co TSMC Ltd
Original Assignee
Taiwan Semiconductor Manufacturing Co TSMC Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Manufacturing Co TSMC Ltd filed Critical Taiwan Semiconductor Manufacturing Co TSMC Ltd
Priority to CN201710057590.5A priority Critical patent/CN108363362B/en
Publication of CN108363362A publication Critical patent/CN108363362A/en
Application granted granted Critical
Publication of CN108363362B publication Critical patent/CN108363362B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/418Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
    • G05B19/41885Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by modeling, simulation of the manufacturing system
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/30Nc systems
    • G05B2219/32Operator till task planning
    • G05B2219/32301Simulate production, process stages, determine optimum scheduling rules
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • General Factory Administration (AREA)

Abstract

This exposure provides a kind of semiconductor board productivity simulation method and semiconductor board productivity simulation system, wherein the semiconductor board productivity simulation method includes:The technique information of multiple semiconductor boards is obtained respectively;The specification information of multiple semi-conducting material posting devices is obtained respectively;Selection is a part of to establish production line model respectively from the semiconductor board and the semi-conducting material posting device;And using the technique information and specification information corresponding to the selected semiconductor board and the semi-conducting material posting device, to carry out the simulation of the production line model on a processor.

Description

Semiconductor board productivity simulation method and semiconductor board productivity simulation system
Technical field
This exposure is related to the field of semiconductor, espespecially a kind of semiconductor board productivity simulation method and semiconductor board production capacity Simulation system.
Background technology
World market forces the manufacturer of large-tonnage product to provide the product of high quality at a low price at present.It is therefore important that Yield and process efficiency are improved, so that production cost to be preferably minimized.Such situation occurs especially in semiconductor manufacturing Field, this is because the field is combined sophisticated technology (cutting edge technology) with mass production technology.Cause This, semiconductor maker's aims at the consumption for reducing raw material and consumables and the utilization rate for improving process tool simultaneously.Afterwards It is even more important in terms of person, this is because it is quite high and represent the modern times of the major part of total cost of production to need cost Semiconductor tools equipment.
In view of this, the purpose of the present invention is to provide a kind of production line semiconductor-on-insulator board production capacity simulation method and Related system can reduce and calculate the time, and can optimize production line scheduling, to achieve the purpose that production capacity optimizes.
Invention content
Some embodiments of this exposure provide a kind of semiconductor board productivity simulation method, it includes:It obtains respectively multiple The technique information of semiconductor board;The specification information of multiple semi-conducting material posting devices is obtained respectively;From the semiconductor machine Selection is a part of to establish production line model respectively in platform and the semi-conducting material posting device;And utilize selected institute State the technique information and specification information corresponding to semiconductor board and the semi-conducting material posting device, come on a processor into The simulation of the row production line model.
Some embodiments of this exposure provide a kind of semiconductor board productivity simulation method, it includes:Production is obtained respectively The technical recipe operating time of multiple semiconductor boards of line;Multiple semi-conducting material postings dress of the production line is obtained respectively The specification information set;And according to the technical recipe behaviour corresponding to the semiconductor board and the semi-conducting material posting device Make time and specification information, to carry out the simulation of the production line on a processor.
Some embodiments of this exposure provide a kind of semiconductor board productivity simulation system, it includes:Database, including it is more A semiconductor board model and multiple semi-conducting material posting mounted casts, wherein the semiconductor board model includes technique letter Breath, the semi-conducting material posting mounted cast includes specification information;Edition interface, for allowing user according to needs, from described A part is selected to build respectively in the semiconductor board model and the semi-conducting material posting mounted cast in database Vertical production line model:And computing unit, it is used for according to the production line model in the edition interface, to call the number According in library the semiconductor board model and the semi-conducting material posting mounted cast, to carry out the production line model Simulation.
The semiconductor board productivity simulation method and related semiconductor board production capacity simulation system that this exposure is proposed, can It is whole complete quickly to simulate with the combination of semiconductor board and semi-conducting material posting device according to user's self-defining Production line.
Description of the drawings
To assist reader to reach best understanding effect, it is proposed that when reading this exposure with reference to attachment schema and its in detail Word describes explanation.It please notes that follow the industrywide standard practice, the schema in patent specification is not necessarily according to correct ratio Example is drawn.In certain schemas, size may be zoomed in or out deliberately, to assist reader to have a clear understanding of content of the discussions therein.
Fig. 1 is the schematic diagram of the embodiment of the semiconductor board productivity simulation system of this exposure;
Fig. 2 is the signal of the database of the semiconductor board productivity simulation system of this exposure and the embodiment of edition interface Figure;
Fig. 3 is the schematic diagram of the embodiment of the computing unit of the semiconductor board productivity simulation system of this exposure;And
Fig. 4 is that the semiconductor board productivity simulation system of this exposure applies the signal that the embodiment of production line is engaged in mixing Figure.
Specific implementation mode
This exposure provides several different implementations or embodiment, can be used for realizing the different characteristic of the present invention.For For the sake of simplifying explanation, this exposure also describes specific spare part and the example of arrangement simultaneously.It please notes that and these particular examples is provided Purpose be only that demonstration, rather than give any restrictions.For example, illustrate fisrt feature how in second feature following May include some embodiments or in the narration of top, wherein fisrt feature is in direct contact with second feature, and in describing It may also include other different embodiments, wherein separately have other feature among fisrt feature and second feature, so that first is special Sign with second feature and be not directly contacted with.In addition, the various examples in this exposure may use the reference number and/or text repeated Word annotation so that file simplerization and clear, these reference numbers repeated do not represented from annotation different embodiments and Relevance between arrangement.
In addition, this is disclosed in the narration vocabulary used with space correlation, such as " ... under ", " low ", "lower", " top ", " on ", "lower", "top", when "bottom" and similar vocabulary, for ease of narration, usage be to describe in schema an element or The relativeness of feature and another (or multiple) elements or features.Other than angle direction shown in schema, these are empty Between with respect to vocabulary also be used for describe described device in use and operation when possibility angle and direction.The angle of described device Direction may different (are rotated by 90 ° or other orientation), and describe can same sample prescription for these space correlations used in this exposures Formula is explained.
Although this exposure proposes that the numberical range of wide scope and parameter are rough value, the number proposed in particular example Value is as accurate as possible.However, any numerical value essence is included in some caused by the standard deviation obtained during individual tests measure Necessary error.Similarly, as used herein, " about " word typically refer to given value or range 10%, 5%, 1% or Within 0.5%.Alternatively, when one of ordinary skill in the art consider, " about " word refers to the acceptable mark of average value Quasi- error.In addition in operation/work example, or unless stated otherwise, otherwise the amount of such as material, during the time, temperature, All numberical ranges, quantity, value and the percentage of operating condition, the ratio of amount and fellow disclosed herein are answered It is understood in all examples by the modification of institute's predicate " about ".Accordingly, unless the contrary indication, otherwise this exposure and institute The numerical parameter that attached claims are provided is rough value, and can optionally be changed.It at least, should be according at least to report Number of significant digit and the conventional carry technology of application and understand each numerical parameter.Herein, range is represented by from one Endpoint is to another endpoint or between two-end-point.Unless specifically stated, all ranges disclosed herein include endpoint.
The manufacturing process of integrated circuit is typically to come by many processing steps in automation or semi-automatic workshop It completes.The number and type for the processing step wherein having to pass through depend on the function and specification for the integrated circuit to be manufactured. The general flow of integrated circuit may include multiple photoetching (photolithography) step, to by the circuit of specific device layer Pattern is imaged in resist layer (resist), then patterns the resist layer, to form resist shade (resist Mask), for for example to etch or whens device layers that the process development of ion implantation technology etc. is considered makees further place Reason.Therefore, in a manner of one layer then another layer, multiple technique steps are executed according to specified each layer specific lithography mask Suddenly.For example, complicated CPU needs hundreds of processing steps, and must be in specified process tolerant (process margin) Each processing step is executed, to meet the specification of considered device.
The special process parameter setting values of particular semiconductor board can be usually known as to technical recipe (recipe), or simple Ground is known as being formulated.Accordingly, it may be desirable to a large amount of different technical recipe, when manufacturing different types of integrated circuit, to incite somebody to action The different technical recipe is applied to the semiconductor board.It is more to deal with due to being frequently necessary to quickly to change technical recipe The technique of change, so the sequence and technical recipe of semiconductor board must be frequently changed.In addition, between semiconductor board Semi-conducting material posting device, as the combination between mechanical arm and semiconductor board may also need to change at any time to promote production Energy.
Since the simulation system that the supplier of each semiconductor board and semi-conducting material posting device is provided does not have usually It is provided with the too big elasticity of user, user is caused arbitrarily not adjust semiconductor board and semi-conducting material posting according to actual demand The parameters of device, and have the problem of compatibility between each supplier more, have the shortcomings that integrated with one another be not easy.Therefore it originally takes off A kind of semiconductor board productivity simulation method of dew proposition and related semiconductor board production capacity simulation system, can be according to user certainly The combination of the semiconductor board and semi-conducting material posting device of row definition, quickly to simulate whole complete production line.
Fig. 1 is the schematic diagram of the embodiment of the semiconductor board productivity simulation system 100 of this exposure.Semiconductor board production capacity Simulation system 100 includes database 102, edition interface 104 and computing unit 106.Database 102 includes multiple semiconductors Board model and multiple semi-conducting material posting mounted casts are chosen for user.In the present embodiment, user can be according to production The needs of line are selected through edition interface 104 from the semiconductor board and the semi-conducting material posting device respectively A part, to be combined into the production line model of the corresponding production line.And computing unit 106 then can be according in edition interface 104 The production line model, to call the semiconductor board in database 102 and the semi-conducting material posting device Information is to carry out the simulation of the production line model.
About the details of database 102, edition interface 104 and computing unit 106, please refer to Fig.2 and Fig. 3.Fig. 2 is The schematic diagram of the database 102 of the semiconductor board productivity simulation system 100 of this exposure and the embodiment of edition interface 104. The database 102 of semiconductor board productivity simulation system 100 in Fig. 1 includes semi-conducting material posting device data in fig. 2 Library 1022, semiconductor board database 1024 and scheduler module database 1026.Semi-conducting material posting facility database 1022 include the specification information of any device for being used for transmitting, loading, controlling semi-conducting material (such as chip).In embodiment, Semi-conducting material posting facility database 1022 includes the specification information of mechanical arm, such as grips the time, movement speed etc.. For example, the mechanical arm that semi-conducting material posting facility database 1022 includes can be any type of mechanical arm, Such as single mechanical arm or double transformation mechanical arms, 3 axis or 4 shaft mechanical arms etc.;In addition, semi-conducting material posting The mechanical arm that facility database 1022 includes can be the mechanical arm being suitable under any environment, such as atmospheric robot Or vacuum robot.In another embodiment, specification of the semi-conducting material posting facility database 102 in addition to mechanical arm Outside information, the specification information of the wafer orientation instrument for the positioning function that high precision is provided is further comprised, such as needed for positioning Time.In another embodiment, semi-conducting material posting facility database 102 further comprises the specification of overhead crane system Information, for example, overhead crane system travelling speed etc..
In embodiment, semiconductor board database 1024 includes any is used for semi-conducting material (such as chip) progress The equipment of processing.For example, in embodiment, semiconductor board database 1024 include for chip coating apparatus, The technique information of developing apparatus, etching machines, cleaning equipment, Equipment for Heating Processing, measuring apparatus, exposure sources, storage equipment etc., Such as parameter setting values (including technical recipe) and the corresponding processing time of special process.User can be according to the need of production line It wants, through edition interface 104, the semi-conducting material posting device and semiconductor board used required for the production line is distinguished It is found out from semi-conducting material posting facility database 1022 and semiconductor board database 1024, is subject to arrange parameter and puts It sets in the picture of edition interface 104, graphical interface as shown in Figure 2, to constitute a production line model, however the present invention is not As limit, in other embodiments, other interface manifestation modes, such as textual interface can also be used.
In the present embodiment, the base map of the edition interface 104 in Fig. 2 can have the ruling of a plurality of X-direction and Y-direction, The ruling of the X-direction and Y-direction constitutes multiple grids, wherein the ruling of the X-direction is equally spaced from each other, distance is dY, and dY multiplies A upper special ratios are actual distance;The ruling of the Y-direction is also equidistant each other, and distance is dX, and dX is multiplied by described specific Ratio is also actual distance.User can the position according to each semiconductor board in the actually described production line and phase according to this It adjusts the distance the production line model come in edition interface 104.Correctly to fall into a trap in semiconductor board productivity simulation system 100 It calculates chip and transports the required time between different semiconductor boards.
In user's construction and it is provided with including semi-conducting material posting facility database 1022 and semiconductor board data After the hardware in library 1024, it is also necessary to which the information in relation to dispatching is set.On the production line of semiconductor wafer factories, the manufacture of chip can Generally it is divided into two periods:Operating time (run time) and queuing time (queue time).Operating time is referring to product The time carried out on machine;In semiconductor wafer factories, as a piece of chip is from board is entered to the step for completing the execution The time of board is left after rapid.When firstling just carries out a step on a board, it is intended to carry out the second of the step Criticizing product must wait in advance, and after the completion of waiting firstlings, second batch product could carry out the step into this board, This second batch product waiting last consignment of product completes the time of the step, as queuing time.And between every batch of product, Because semi-conducting material posting device is often shared, it is often impossible to perfect linking, therefore queuing time also needs to add Wait for the time of semi-conducting material posting device.
Scheduler module database 1026 in Fig. 2 also belongs to one of the content of database 102, scheduler module database 1026 In include a variety of different scheduling modes, can flexibly be arranged and correspond to specific half in specific semi-conducting material posting device The occasion of conductor board, such as the chip of general tandem pick and place, or extract chip in advance to save the time, or are adjusting It is added the factor of semiconductor board scavenging period in degree or the continuous of multiple same semiconductor boards is picked and placeed, overtaken other vehicles etc. Setting.By selecting scheduling appropriate from scheduler module database 1026, queuing time can be reduced.
Fig. 3 is the schematic diagram of the embodiment of the computing unit 106 of the semiconductor board productivity simulation system 100 of this exposure. The computing unit 106 of semiconductor board productivity simulation system 100 in Fig. 1, which includes deadlock (deadlock) in figure 3, prevents list Member 1062 and multithreading (multi-thread) execution unit 1026.In embodiment, edition interface 104 is penetrated in user, By the semi-conducting material posting mounted cast used required for the production line and semiconductor board model respectively from semiconductor material It is found out in material posting facility database 1022 and semiconductor board database 1024, is subject to arrange parameter and from scheduler module number Scheduling appropriate is selected according to library 1026 instantly, and edition interface 104 can in real time pass the production line model set by user It is sent to deadlock prevention unit 1062.Deadlock prevention unit 1062 can preliminary verification is carried out on line to the production line model, If there is can obviously clash or when the case where predictable deadlock, prompt user.In other embodiments, deadlock Prevention unit 1062 can also provide setting of the user compared with optimization.It the prompt opportunity of above-mentioned deadlock prevention unit 1062, can also It is the non real-time prompt when the setting of the entire production line model is completed in user.
By deadlock prevention unit 1062, and after the setting of the entire production line model is completed in user, multithreading executes Unit 1064 can be directed to each semi-conducting material posting device and each semiconductor board in the production line model and establish one Independent thread.Such as edition interface 104 in figure 3 includes two semi-conducting material posting mounted casts and a semiconductor Board model, thread first correspond to the semi-conducting material posting mounted cast (such as first robotic arm) on the left side, and thread second corresponds to Intermediate semiconductor board model (such as wafer case carrier), thread third correspond to the semi-conducting material posting mounted cast on the right (such as second robotic arm).Thread first carries out independent simulation, solid arrow on the basis of same time shaft respectively to third It indicates in operation, dotted arrow then indicates the communication between thread.In the present embodiment, the first mechanical hand corresponding to thread first Arm starts to start in time point B, and chip is transmitted to the wafer case carrier corresponding to thread second, the third institute of thread in time point C Corresponding second robotic arm starts to start in time point A, and waits until that time point D takes out chip from wafer case carrier.
Multi-thread execution unit 1064 in the present embodiment can be filled with being higher than semiconductor board and semi-conducting material posting The faster speed of true operation speed is set to be simulated, to save the time, in certain embodiments, multi-thread execution unit 1064 analog rate can be 30 to 100 times of true operation speed.In certain embodiments, multi-thread execution unit 1064 Specific algorithm can be penetrated, come the method for helping user to obtain improving the production capacity of the production line model, or is not being influenced Under the premise of production capacity, the method for reducing cost, such as change the setting of scheduling, or change semiconductor board and/or semiconductor The arrangement of material posting device.
Fig. 4 is that the semiconductor board productivity simulation system of this exposure is applied in mixing engagement (Hybrid Bonding) production The schematic diagram of the embodiment of line 400.Mixing engagement production line 400 is by user setting in the semiconductor board production capacity mould of this exposure Include load port (load port) 402, storage chamber 404, surface treating machine in the edition interface 104 of quasi- system 100 Platform 406, clean tank 408, pre- engagement processor platform 410, annealing board 412.Mixing engagement production line 400 can be according to user's Setting is arranged in atmospheric environment, or may also be arranged in nitrogen environment;User can directly use load port 402, storage The default ginseng of chamber 404, surface treatment board 406, clean tank 408, pre- engagement processor platform 410, annealing board 412 etc. The details of several and formula etc. also can pass through edition interface 104 and come from edlin.Edition interface 104 can be shown according to actual ratio Above-mentioned selected board and profile, and should be apparent that the area shared by board and the relative position of each other.Certain In embodiment, edition interface 104 may also display the finer complexion of selected board to promote the understanding of user, such as more than The visual angle of view shows the practical external form of selected board, but invention is not limited thereto.
Load port 402 is for storing multiple semiconductor wafers in semiconductor fabrication, and having can automatic switch Hatch door.As shown, including at least three chip feeders (Front Opening Unified in load port 402 Pod) 402a to 402c.Chip feeder 402a is to be used to store multiple first semiconductor wafers;Chip feeder 402b is to use To store multiple second semiconductor wafers;Chip feeder 402c is then to be used to store completion processing (i.e. by the first semiconductor die Piece and the second semiconductor wafer engage obtained third semiconductor wafer group in advance) multiple third semiconductor wafer groups.Mechanical hand Arm 403a is for multiple first semiconductor wafers are sent into storage chamber 404 in the method for tandem, that is, confirm storage chamber When room 404 can be used, just start multiple first semiconductor wafers being sent into storage chamber 404;Robotic arm 403b be for Multiple second semiconductor wafers are sent into storage chamber 404 by the method for tandem.Storage chamber 404 can be with positive pressure simultaneously Fill the airtight chamber of inert gas.
Robotic arm 405 is for the chip in storage chamber 404 to be sequentially sent into surface treatment board 406, mechanical hand Arm 405 can shift to an earlier date grips a piece of first semiconductor wafer and a piece of second semiconductor wafer respectively from storage chamber 404, waits for When surface treatment board 406 can be used, above-mentioned two panels semiconductor wafer will be once sent into.In the present embodiment, it is surface-treated Board 406 can carry out to carry out the first semiconductor wafer and the second semiconductor wafer with plasma the activation of semiconductor wafer surface (activation) it handles, such as plasma is generated using the gas including hydrogen, but not limited to this.
Robotic arm 407 is to complete the chip of surface activation process for that will be surface-treated in board 406 with tandem Mode is sent into clean tank 408, and clean tank 408 can wash away the impurity of semiconductor die on piece.Robotic arm 409 can complete cleaning Semiconductor wafer afterwards is sent into pre- engagement processor platform 410 to be engaged to the first semiconductor wafer and the second semiconductor wafer It handles and obtains above-mentioned third semiconductor wafer group, in embodiment, the pre- processor platform 410 that engages operates in about 30Mpa In pressure below and about 100 to 500 degrees Celsius of environment full of nitrogen.Robotic arm 411 can be by the after the completion of engagement Three semiconductor wafer groups are transmitted to annealing board 412, such as are made annealing treatment with about 300 to 400 degrees Celsius of temperature, And after annealing to be done, the chip feeder 402c storages of load port 402 are sent back by robotic arm 411.
Some embodiments of this exposure provide a kind of semiconductor board productivity simulation method, including:Multiple half are obtained respectively The technique information of conductor board;The specification information of multiple semi-conducting material posting devices is obtained respectively;From the semiconductor board With in the semi-conducting material posting device respectively selection a part to establish production line model;And it utilizes selected described Technique information and specification information corresponding to semiconductor board and the semi-conducting material posting device, to carry out on a processor The simulation of the production line model.
Some embodiments of this exposure provide a kind of semiconductor board productivity simulation method, including:Production line is obtained respectively Multiple semiconductor boards the technical recipe operating time;Multiple semi-conducting material posting devices of the production line are obtained respectively Specification information;And according to the technical recipe operation corresponding to the semiconductor board and the semi-conducting material posting device Time and specification information, to carry out the simulation of the production line on a processor.
Some embodiments of this exposure provide a kind of semiconductor board productivity simulation system, including:Database, including it is multiple Semiconductor board model and multiple semi-conducting material posting mounted casts, wherein the semiconductor board model includes technique letter Breath, the semi-conducting material posting mounted cast includes specification information;Edition interface, for allowing user according to needs, from described A part is selected to build respectively in the semiconductor board model and the semi-conducting material posting mounted cast in database Vertical production line model:And computing unit, it is used for according to the production line model in the edition interface, to call the number According in library the semiconductor board model and the semi-conducting material posting mounted cast, to carry out the production line model Simulation.
Foregoing teachings summarize the feature of some embodiments, thus those skilled in the art can more understand this exposure Various aspects.Those skilled in the art will appreciate that based on this exposure can be used easily, it is other for designing or modifying Technique and structure and realizing with present application the embodiment described has identical purpose and/or reaches same advantage.Fields Technical staff should also be understood that spirit and scope of this impartial framework without departing from this exposure disclosure, and fields Technical staff can carry out various change, substitution and replacement, without departing from the spirit and scope of this exposure.
Symbol description
100 semiconductor board productivity simulation systems
102 databases
104 edition interfaces
106 computing units
1022 semi-conducting material posting facility databases
1024 semiconductor board databases
1026 scheduler module databases
1062 deadlock prevention units
400 mixing engagement production lines
402 load ports
402a chip feeders
402b chip feeders
402c chip feeders
403a robotic arms
403b robotic arms
405 robotic arms
407 robotic arms
409 robotic arms
411 robotic arms
413 robotic arms
404 storage chambers
406 surface treatment boards
408 clean tanks
410 pre- engagement processor platforms
412 annealing boards

Claims (10)

1. a kind of semiconductor board productivity simulation method, it includes:
The technique information of multiple semiconductor boards is obtained respectively;
The specification information of multiple semi-conducting material posting devices is obtained respectively;
Selection is a part of to establish production line model respectively from the semiconductor board and the semi-conducting material posting device; And
Utilize the technique information and specification corresponding to the selected semiconductor board and the semi-conducting material posting device Information, to carry out the simulation of the production line model on a processor.
2. according to the method described in claim 1, wherein utilizing the selected semiconductor board and the semi-conducting material Technique information corresponding to posting device and specification information, to carry out the simulation packet of the production line model on the processor Contain:
Scheduling information between the semiconductor board and the semi-conducting material posting device is set;And
Corresponding to the scheduling information and the selected semiconductor board and the semi-conducting material posting device Technique information and specification information, to carry out the simulation of the production line model on the processor.
3. according to the method described in claim 2, it is further included:
Change the production line model using the processor, to obtain with another higher than the production capacity of the production line model Production line model.
4. according to the method described in claim 1, the simulation for wherein carrying out the production line model on the processor includes:
On the processor, when contracting in a manner of carry out the simulation of the production line model.
5. according to the method described in claim 1, wherein utilizing the selected semiconductor board and the semi-conducting material Technique information corresponding to posting device and specification information, to carry out the simulation packet of the production line model on the processor Contain:
Utilize the technique information and specification corresponding to the selected semiconductor board and the semi-conducting material posting device Information, to detect whether the production line model can occur deadlock (deadlock) on the processor.
6. a kind of semiconductor board productivity simulation method, it includes:
The technical recipe operating time of multiple semiconductor boards of production line is obtained respectively;
The specification information of multiple semi-conducting material posting devices of the production line is obtained respectively;And
According to corresponding to the semiconductor board and the semi-conducting material posting device the technical recipe operating time and specification Information, to carry out the simulation of the production line on a processor.
7. according to the method described in claim 6, wherein according to the semiconductor board and the semi-conducting material posting device Corresponding technical recipe operating time and specification information, the simulation to carry out the production line on the processor include:
According to corresponding to the semiconductor board and the semi-conducting material posting device the technical recipe operating time and specification Information, to detect whether the production line can occur deadlock on the processor.
8. according to the method described in claim 6, wherein according to the semiconductor board and the semi-conducting material posting device Corresponding technical recipe operating time and specification information, the simulation to carry out the production line on the processor include:
According to corresponding to the semiconductor board and the semi-conducting material posting device the technical recipe operating time and specification Information, to optimize the production line on the processor.
9. a kind of semiconductor board productivity simulation system, it includes:
Database comprising multiple semiconductor board models and multiple semi-conducting material posting mounted casts, wherein described partly lead Body board model includes technique information, and the semi-conducting material posting mounted cast includes specification information;
Edition interface is used for allowing user according to needs, the semiconductor board model from the database and described half A part is selected to establish production line model respectively in conductor material posting mounted cast:And
Computing unit is used for according to the production line model in the edition interface, to call the institute in the database Semiconductor board model and the semi-conducting material posting mounted cast are stated, to carry out the simulation of the production line model.
10. system according to claim 9, wherein the computing unit includes:
Deadlock prevention unit is used for analyzing whether the production line model that the user is established can occur deadlock;
And
Computing unit is used for according to the selected semiconductor board model of the user and the semi-conducting material posting Technique information corresponding to mounted cast and specification information carry out speed simulation to the production line model.
CN201710057590.5A 2017-01-26 2017-01-26 Semiconductor machine productivity simulation method and semiconductor machine productivity simulation system Active CN108363362B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710057590.5A CN108363362B (en) 2017-01-26 2017-01-26 Semiconductor machine productivity simulation method and semiconductor machine productivity simulation system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710057590.5A CN108363362B (en) 2017-01-26 2017-01-26 Semiconductor machine productivity simulation method and semiconductor machine productivity simulation system

Publications (2)

Publication Number Publication Date
CN108363362A true CN108363362A (en) 2018-08-03
CN108363362B CN108363362B (en) 2022-04-19

Family

ID=63011432

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710057590.5A Active CN108363362B (en) 2017-01-26 2017-01-26 Semiconductor machine productivity simulation method and semiconductor machine productivity simulation system

Country Status (1)

Country Link
CN (1) CN108363362B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020125672A1 (en) * 2018-12-20 2020-06-25 北京北方华创微电子装备有限公司 Deadlock determination method and semiconductor device
CN113608503A (en) * 2020-05-04 2021-11-05 和硕联合科技股份有限公司 Method for determining productivity parameters and productivity parameter generation system

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1508732A (en) * 2002-12-14 2004-06-30 鸿富锦精密工业(深圳)有限公司 Production capacity simulating system and method
CN1766916A (en) * 2004-10-29 2006-05-03 力晶半导体股份有限公司 Working model simulating production process and simulating method thereof
CN101128786A (en) * 2005-02-28 2008-02-20 先进微装置公司 Automated throughput control system and method of operating the same
CN103676881A (en) * 2013-12-16 2014-03-26 北京化工大学 Dynamic bottleneck analytical method of semiconductor production line
TWM507133U (en) * 2014-03-10 2015-08-11 Miyuan Biotechnology Co Ltd Superconducting heater with low energy consumption
CN105676785A (en) * 2014-11-21 2016-06-15 中芯国际集成电路制造(天津)有限公司 Semiconductor processing equipment analog simulation system and working method thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1508732A (en) * 2002-12-14 2004-06-30 鸿富锦精密工业(深圳)有限公司 Production capacity simulating system and method
CN1766916A (en) * 2004-10-29 2006-05-03 力晶半导体股份有限公司 Working model simulating production process and simulating method thereof
CN101128786A (en) * 2005-02-28 2008-02-20 先进微装置公司 Automated throughput control system and method of operating the same
CN103676881A (en) * 2013-12-16 2014-03-26 北京化工大学 Dynamic bottleneck analytical method of semiconductor production line
TWM507133U (en) * 2014-03-10 2015-08-11 Miyuan Biotechnology Co Ltd Superconducting heater with low energy consumption
CN105676785A (en) * 2014-11-21 2016-06-15 中芯国际集成电路制造(天津)有限公司 Semiconductor processing equipment analog simulation system and working method thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020125672A1 (en) * 2018-12-20 2020-06-25 北京北方华创微电子装备有限公司 Deadlock determination method and semiconductor device
TWI716224B (en) * 2018-12-20 2021-01-11 大陸商北京北方華創微電子裝備有限公司 Deadlock judgment method and semiconductor equipment
US11211268B2 (en) 2018-12-20 2021-12-28 Beijing Naura Microelectronics Equipment Co., Ltd. Deadlock determination method and semiconductor apparatus
CN113608503A (en) * 2020-05-04 2021-11-05 和硕联合科技股份有限公司 Method for determining productivity parameters and productivity parameter generation system
CN113608503B (en) * 2020-05-04 2024-06-04 和硕联合科技股份有限公司 Method for determining productivity parameters and productivity parameter generating system

Also Published As

Publication number Publication date
CN108363362B (en) 2022-04-19

Similar Documents

Publication Publication Date Title
US11150562B2 (en) Optimizing an apparatus for multi-stage processing of product units
CN101128786B (en) Automated throughput control system and method of operating the same
US8442667B2 (en) Applications of neural networks
CN101032013B (en) Method and system for dynamically adjusting metrology sampling based upon available metrology capacity
US20080208372A1 (en) Scheduling with neural networks and state machines
US8639365B2 (en) Methods and systems for controlling a semiconductor fabrication process
US20080163096A1 (en) Methods and systems for controlling a semiconductor fabrication process
US11442367B2 (en) Optimizing a sequence of processes for manufacturing of product units
US20080155442A1 (en) Methods and systems for controlling a semiconductor fabrication process
KR20160063289A (en) Method and priority system for inventory management in semiconductor manufacturing
TWI523129B (en) Method of dispatching semiconductor batch production
CN108363362A (en) Semiconductor board productivity simulation method and semiconductor board productivity simulation system
US11275360B2 (en) Using graphics processing unit for substrate routing and throughput modeling
WO2008030637A2 (en) Methods and systems for controlling a semiconductor fabrication process
CN100476661C (en) Method and system for prioritizing material to clear abnormal conditions
TWI661326B (en) Semiconductor equipment throughput simulation method and semiconductor equipment throughput simulation system
US7299106B1 (en) Method and apparatus for scheduling metrology based on a jeopardy count
US7263408B1 (en) Method and system for converting tool process ability based upon work in progress characteristics
CN114637167A (en) Photomask integrated management and application system
Pinot et al. Advanced Manufacturing System AMS

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant