CN108319458B - Multitask compiling method based on graphical satellite command calculation - Google Patents

Multitask compiling method based on graphical satellite command calculation Download PDF

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CN108319458B
CN108319458B CN201810045360.1A CN201810045360A CN108319458B CN 108319458 B CN108319458 B CN 108319458B CN 201810045360 A CN201810045360 A CN 201810045360A CN 108319458 B CN108319458 B CN 108319458B
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CN108319458A (en
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杨志斌
袁胜浩
谢健
刘承威
王飞
薛垒
王永孟
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Nanjing University of Aeronautics and Astronautics
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Abstract

The invention relates to a multitask compiling method based on graphical satellite command calculation, which relates to a method for automatically compiling and generating executable multitask Ada/C codes by GCC _ graph based on graphical satellite command calculation. All functions of the compiler are realized by CAML programming of a functional programming language, and since CAML is a safe language, CAML program is verified by the compiler before execution. In addition, the compiler designed by the invention uses a modular structure, and once a program is changed, the code of the corresponding module is only required to be modified.

Description

Multitask compiling method based on graphical satellite command calculation
Technical Field
The invention relates to a multitask compiling method based on graphical satellite command calculation, in particular to a method for generating executable multitask Ada/C codes by compiling a graphical satellite command calculation language GCC _ graph.
Background
The synchronization method is widely used for design and verification of real-time embedded software, especially Safety-critical Systems (security-critical Systems), because such Systems have very strict requirements on critical properties such as real-time performance, reliability and Safety. A security-critical embedded System is a Reactive System because it continuously reacts to input events in the environment, generates results in time, and outputs them. The reactive system must ensure the functional correctness of the input and output specifications of the reactive system and the timing correctness of the time constraint, and the synchronization method can ensure the certainty and the concurrency of programs based on the synchronization hypothesis theory. Therefore, synchronization methods are widely used for safety critical system modeling.
The synchronization method, based on mathematical basis, simplifies the system by abstracting real-time relationships, using strict logical concepts at discrete times instead. The core concept of this abstraction is called synchronization or synchronization assumption. In general, synchronization assumes that a continuous time is divided into discrete moments when no event or computation occurs. Under this assumption, the designer does not need to be concerned with the time overhead of the calculation, but only assumes that the calculation process is completed before the next moment in time starts. This ensures that the system behavior model platform is independent, as long as the final system is fast enough to satisfy the assumption of synchronization assumptions.
With the ever increasing performance demands of security critical embedded systems, there is a trend towards using multi-core processors instead of single cores. However, applying a multi-core processor in the safety critical field will face many challenges, and ensuring the time predictability of program operation is one of the main challenges. Temporal predictability relates to program analysis and execution platform analysis. For the latter, since the time predictability is difficult to analyze due to thread scheduling, shared Cache and replacement algorithm in the multi-core Processor, the academic world proposes a solution idea of designing a time predictable Processor architecture suitable for real-time analysis, and has realized time predictable processors such as a PRET-ARM and a Java Optimized Processor (JOP). Currently, most of the existing research on time predictability focuses mainly on the adjustment and optimization of multi-core processors and compiles thereon, while less research is on multitask code generation methods that guarantee time-predictable properties.
With the gradual and wide application of multi-core processors in safety critical fields such as aerospace and nuclear power stations, how to ensure the real-time performance, safety and reliability of the systems becomes a difficult problem to be solved urgently. Related modeling languages such as the analytical design and modeling language AADL and the synchronization language have emerged.
In the AADL study. In 2004, SAE (society of Automotive Engineers), the language AADL (architecture Analysis and Design language) was proposed based on MetaH, UML and HOOD and published AS SAE AS5506 standard. The safety-critical real-time system is a complex system with deep integration of application software, a runtime environment and a hardware platform, and the AADL language correspondingly provides modeling concepts of a software architecture, a runtime environment and a hardware architecture. Describing the software architecture of the system through components such as threads (Thread), Thread groups (Thread Group), processes (Process), Data (Data), subprograms (subparogram) and connection; describing a hardware architecture of the system through components and connections of a Processor (Processor), a Virtual Processor (Virtual Processor), a Memory (Memory), a peripheral (Device), a Bus (Bus), a Virtual Bus (Virtual Bus), and the like; describing the runtime environment of the system through attributes such as a distribution protocol (Dispatch), a Communication protocol (Communication), a Scheduling policy (Scheduling), a Mode Change protocol (Mode Change), and a Partition mechanism (Partition); finally, the System (System) components are combined to build a System architecture model in a hierarchical manner. In addition, the Behavior attachment (Behavior Annex) enhances the detailed description capability of the AADL on the control flow Behavior of the thread component and the subprogram component in the form of a Transition System (Transition System). However, in the embedded field, especially in the aerospace field, AADL has a large number of data calculations and descriptions of data flow behaviors, and at present, the expression capability of AADL in this aspect is insufficient.
In the aspect of synchronous language research. According to the core principle of the synchronization assumption, a plurality of synchronous programming languages (LUSTRE, ESTEREL, MRICDF, SIGNAL, etc.) are successively implemented and used for designing the embedded system. Each synchronization language has its own features in terms of conventions, compilation and intended applications, but they have some common attributes: in addition to being an event-driven reactive system, each language is synchronous, i.e., each reaction initiates the execution of a set of operations at the same logical time. Some synchronization languages (LUSTRE, enter, etc.) are single clock synchronization, performing a single master clock. Others (MRICDF, SIGNAL, etc.) are multi-state clock synchronization, i.e. multiple clocks that are forced to synchronize when components must communicate with each other. The multi-state synchronization mode ensures the concurrency capability of high-level modeling of system protocols. With the development of synchronous languages, integration problems between different synchronous languages need to be solved. One of the mainstream approaches at present is to select a universal intermediate language and convert all synchronous languages into the intermediate language. For example, HCDG is used in Polychrony, S-Lustre AST is used in the L2C project, CGA is used in QUARTZ compiler, etc.
Disclosure of Invention
In order to solve the defects of the prior art, the invention aims to provide a multitask compiling method based on graphical satellite command calculation, which is used for modeling and automatically compiling a graphical satellite command calculation language GCC _ graph to generate an executable multitask Ada/C code method. The GCC _ graph mainly focuses on the data stream behavior of a model and has insufficient modeling capacity of expressing a software and hardware system, and AADL has the problem of insufficient describing capacity of the data stream behavior, so that the GCC _ graph can be calculated by adopting a mode of expanding synchronous attachments in the AADL and using a graphical satellite command to describe the content of the synchronous attachments, thereby increasing the expression of the AADL on the data stream behavior in threads and subprograms.
In order to achieve the above object, the present invention adopts the following technical solutions:
a multitask compiling method based on graphical satellite command calculation is characterized in that: the method is used for compiling a graphical satellite command evolution language GCC _ graph to generate a multitask executable Ada/C code, and the compiling process comprises the following steps:
1) defining a graphical sanitary command calculation GCC _ graph language which comprises a graphical specification, a text grammar and a form semantic;
2) using a functional programming language (CAML) to describe the clock calculation based on GCC _ graph;
3) describing task division based on GCC _ graph by using a functional programming language CAML, wherein the task division comprises three division methods which are sequentially adopted and data dependence analysis performed before division, and the three division methods comprise task division based on topological sorting, optimization of topological sorting division results and a task division method based on a pipeline mode;
4) using a functional programming language CAML to describe a virtual multithreading code automatic generation method based on a division result;
5) the method of converting virtual multithreading code into executable multitask Ada/C code is described using the functional programming language CAML.
The multitask compiling method based on the graphical satellite command calculation is characterized in that: the step 1) of defining the GCC _ graph language of the graphical satellite command calculation comprises the following steps:
establishing basic definitions related to GCC _ graph:
a GCC _ graph model is defined as the satellite type action on a signal variable set V
Figure GDA0001683754450000021
Gathering;
the input and the output of the GCC _ graph model are a group of value sequences which are marked as signal variables or signals;
at each logic instant, the signal is in one of two states: the state is in an existing state and carries a value or is in a missing state, and the missing state is marked as ^ T; defining all logic time sets in existence state in the signal s as abstract clocks corresponding to s and recording as abstract clocks
Figure GDA0001683754450000022
If the abstract clocks of the two signals s1 and s2 are the same, s1 and s2 are said to be synchronous;
a) the basic modeling element definition of the graphical specification:
the basic structure of the satellite type action and the corresponding graphical modeling elements comprise five types of immediate action, delayed action, constraint action, input action and output action, and the method is as follows:
and (3) immediate action: receiving (m + n) input signals, wherein m input signals are used for guard type judgment and n input signals are used for calculation, if the guard type G is true, calculating f, and returning an output signal k, otherwise, not executing any operation; wherein f expresses constants, arithmetic operations, logical operations and user-defined functions;
delaying action: receiving m input signals for guard type judgment and n input signals for action calculation, if the guard type G is true, executing calculation f, and delaying a logic moment to output a result k, otherwise, not executing any operation;
and (3) constraint action: receiving m input signals for guard type judgment and n input signals for constraint, if the guard type is true, executing synchronous operation, synchronizing the n input signals, and outputting a synchronous result, otherwise, not executing any operation;
an input action: receiving an input signal from an external environment, and checking the input signal all the time before performing the calculation in each GCC _ graph at each logic time;
and (3) output action: outputting the signal into an external environment; judging whether to output a signal after completion of calculation in each GCC _ graph at each logic timing;
b) formalized definition of the GCC _ graph text grammar:
formal syntax and corresponding semantic interpretation of the five classes of basic structures of the GCC _ graph are as follows:
Figure GDA0001683754450000031
wherein, guard type G is defined in signal variable X and logic clock of signal variable X
Figure GDA0001683754450000032
And its initial clock
Figure GDA0001683754450000033
The above Boolean condition, X ∈ X; τ is an expression defined on X; σ is a Boolean expression defined on X and its logic clock;
the GCC _ graph abstract syntax is represented as:
Figure GDA0001683754450000034
in the above definition, GCC/x is the local signal variable assertion in GCC _ graph; the combination of different GCC _ graphs adopts synchronous combination operation '|';
Figure GDA0001683754450000041
the expressions G and sigma may have
Figure GDA0001683754450000042
x、
Figure GDA0001683754450000043
f (G, G.) and τ may have x and f (τ.,. tau);
c) formal semantics of GCC _ graph: the method is divided into two parts: the first part is to define the clock and value of guard, constraint and expression; the second part is to define the named semantics of GCC _ graph based on the trace model;
the first part, at a given trace S, logic time i and signal variable X, defines the following function:
I)
Figure GDA0001683754450000044
is defined as
Figure GDA0001683754450000045
Figure GDA0001683754450000046
If and only if all signal variables in logic instants i, G on S are in a present state, this is true, since each clock can be read at any logic instant
Figure GDA0001683754450000047
Is defined as true:
Figure GDA0001683754450000048
defining a bias function
Figure GDA0001683754450000049
When in use
Figure GDA00016837544500000410
To true, the value of γ is calculated as true or false:
Figure GDA00016837544500000411
II)
Figure GDA00016837544500000412
is defined as
Figure GDA00016837544500000413
Figure GDA00016837544500000414
True, all signal variables in τ are not missing if and only if at logic instant i on S:
Figure GDA00016837544500000415
defining a bias function
Figure GDA00016837544500000416
When in use
Figure GDA00016837544500000417
And if true, calculating the value of tau to be true or false:
Figure GDA00016837544500000418
Figure GDA00016837544500000419
and
Figure GDA00016837544500000420
respectively have I) in
Figure GDA00016837544500000421
And
Figure GDA00016837544500000422
the same definition;
and a second part, defining the named semantics of the GCC _ graph based on the trace model:
the trace semantics of a gccgraph system are defined as a collection of traces, i.e.,
Figure GDA00016837544500000423
and (3) immediate action:
Figure GDA00016837544500000424
delaying action:
Figure GDA0001683754450000051
constraint definition:
Figure GDA0001683754450000052
an input action:
Figure GDA0001683754450000053
and (3) output action:
Figure GDA0001683754450000054
the combined semantics of the GCC _ graph are defined as:
Figure GDA0001683754450000055
the multitask compiling method based on the graphical satellite command calculation is characterized in that: the clock calculation based on the GCC _ graph in the step 2) comprises defining a clock relationship and constructing a clock tree; if the clock tree is successfully constructed, the representation model can generate codes with deterministic behaviors, and then multi-thread code generation is carried out; the specific contents are as follows:
a) defining a clock relation corresponding to the defensive action:
Figure GDA0001683754450000056
wherein the content of the first and second substances,
Figure GDA0001683754450000057
the clocks representing all signal variables in the expression G are true, and the value of G is true;
Figure GDA0001683754450000058
representing that the clocks corresponding to the signal variable x and the variable in the expression tau are true; → represents the clock implication;
b) constructing a clock tree:
checking a clock implication relation between two clocks through a binary decision diagram so as to construct a clock tree; meanwhile, in each node of the clock tree, all clock variables are equivalent, and the clock equivalent is used for replacing the corresponding clock variables to optimize the clock relationship;
the clock tree structure may be recursively defined as follows: one clock tree is Empty, or one node and a plurality of sub clock trees below the node; empty clock tree, node is composed of clock equivalence class and guard type action set, child clock tree can be regarded as child node, leaf node of a complete clock tree is all Empty;
the clock tree algorithm is constructed as follows:
step 1: selecting a satellite action act1 from the satellite action set, and jumping to step 8 if the act1 type is input action or output action;
step 2: selecting a clock x _ clk corresponding to a variable on the right side of the equation of action in act1, and calculating a clock equivalent ID _ x of the x _ clk through a binary decision diagram;
and step 3: if the clock tree is Empty, a Node is newly built, wherein ID _ x and act1 are stored, a child Node' of the Node is set to be Empty, and the step 8 is skipped;
and 4, step 4: if a node exists in the clock tree, marking as N, if the child node of N is Empty, adding act1 into N, and newly building a child node N 'of N, setting the clock equivalence class of N' as ID _ x, otherwise, jumping to the step 5;
and 5: if N has a plurality of child nodes, selecting the child node Nr at the rightmost side of N, and comparing the clock equivalence class ID _ Nr of Nr with the ID _ x clock implication relation; if ID _ x → ID _ Nr, then recursively call, starting with step 3, to insert act1 and ID _ x as the values to be computed in step 1-2, respectively, into the child clock tree with Nr as the root node;
step 6: if ID _ Nr → ID _ x, adding act1 to the guard action set of N, and setting the rightmost child node as clock equivalence class ID _ x, the guard action set is empty, its sub-tree is the child clock tree with Nr as root node, otherwise, go to step 7;
and 7: adding act1 into the guard action set of N, newly building the rightmost child node of N: the clock equivalence class is ID _ x, the guard action set is null, and the subtree is null;
and 8: if the satellite type action set is traversed, exiting the algorithm and outputting a clkTree, otherwise, skipping to the step 1;
if the clkTree is a clock tree, the construction is successful, and the data dependence analysis in the step 3) is executed; if the clkTree is a structure with a plurality of clock trees or non-tree, the construction fails, the compiling is terminated and an error is reported;
the multitask compiling method based on the graphical satellite command calculation is characterized in that: the specific content in the step 3) is as follows:
31) data dependency analysis, namely constructing a clock data dependency graph clkdataDG;
step 1: selecting two different satellite actions act1 and act2 from the set of satellite actions;
step 2: if act1 and act2 are both input actions or both output actions, then jump to step 7;
and step 3: if act1 and act2 are input actions and output actions, respectively, then jump to step 7;
and 4, step 4: if act1 is an input action, act2 is an immediate action or a deferred action, and the signal variable in act1 is in the guard form of act2 or in the expression of the action, then add the constraint that the information "act 1 executes first, act2 can execute" to clkdataDG, and then jump to step 7;
and 5: if act1 is an output action, act2 is an immediate action or a deferred action, and the signal variable in act1 is the assigned variable to the right of the equation in the act2 action, then the constraint that the information "act 2 executes first, act1 can execute" is added to clkdataDG, and then jump to step 7;
step 6: act2 is immediate or deferred action if act1 is immediate or deferred action. Then consider the following case: if the equal right-side amount assigned variable in act1 exists in act2 satellite or expression of the action, adding the constraint of information "act 1 is executed first and act2 can be executed" to clkdataDG;
and 7: if any two different satellite actions in the GCC _ graph are traversed, exiting the algorithm, otherwise, continuing to traverse the GCC _ graph, and turning to the step 1;
32) the partitioning method based on topological sorting comprises the following steps:
step 1) finding out a point set InDegree _ ZeroV with zero in-degree in the current clkdataDG, wherein the type of the InDegree _ ZeroV is a list type and represents parallel execution information, and the method comprises the following substeps:
step 1.1: converting the clkdataDG into an edge-corresponding Right vertex set Right _ VS and a Left vertex set Left _ VS;
step 1.2: optimizing the vertex set; deleting redundant vertex elements;
step 1.3: calculating an edge set ZeroEdges with zero in degree according to the following calculation rule: selecting edges corresponding to vertexes only appearing in the left vertex set;
step 1.4: calculating a vertex set InDegreee _ ZeroV with zero in-degree; the calculation rule is as follows: selecting left vertex elements of the ZeroEdges, deleting redundant vertices, and then adding an isolated point set in the last division;
step 2) updating the clkdataDG, comprising the following substeps:
step 2.1: deleting InDegree _ ZeroV and ZeroEdges from the current clkdataDG;
step 2.2: calculating an independent point set IsolatedVertics for adding into InDegreee _ ZeroV when next division is carried out, and zero clearing is carried out before each calculation, wherein the calculation rule is as follows: finding out a vertex set with zero in-degree and zero out-degree;
step 2.3: delete IsolatedVertics from the current clkdataDG;
step 3) iterative task division, comprising the following substeps:
step 3.1: storing the current InDegree _ ZeroV into a partitionResult, wherein the type of the partitionResult is a two-dimensional list, the first dimension stores the InDegree _ ZeroV obtained by each circulation, and subscripts represent serial execution information;
step 3.2: taking the empty InDegre _ ZeroV, the currently calculated IsolatedVertics and the updated clkdataDG as parameters to perform step 1) in an iterative manner, stopping partitioning when the clkdataDG is empty, and outputting a partitioning result;
33) optimizing the topological sorting division result:
the optimization is divided into two parts: eliminating redundant dependency relationship and merging threads; the method for eliminating the redundant dependency relationship comprises two steps of finding out, and the main steps of the thread merging method comprise three steps, specifically as follows:
step 1) finding out a redundant dependency relationship, classifying the dependency relationship in partitionResult into an unoptimizable dependency relationship and an optimizable dependency relationship according to clkdataDG information, and optimizing the dependency relationship, namely the redundant dependency relationship, and the method comprises the following substeps:
step 1.1: acquiring a thread index value corresponding to the sanitary action, and establishing a mapping relation between the sanitary action and the thread index number in a hash table mode;
step 1.2: obtaining an unoptimizable dependency relationship, wherein the unoptimizable dependency relationship indicates that the dependency relationship exists in the clkdataDG, and the rest dependency relationships are redundancy dependency relationships;
step 2) optimizing the dependency relationship, optimizing the redundancy dependency relationship found in step 1, comprising the following substeps:
step 2.1: optimizing the number of threads on which the threads depend, and optimizing redundant threads on which the threads depend according to the redundant dependency relationship;
step 2.2: optimizing the number of threads on which the threads are depended, and optimizing redundant threads on which the threads are depended according to the redundant dependency relationship;
step 3) defining combinable threads, carrying out thread combination after optimizing the dependency relationship, marking the index values of the combinable threads from the partitionResult, wherein the marking principle is as follows: if the threads a and b have the dependency relationship of a → b, and the number of threads on which a depends and the number of threads on which b depends are both 1, making the threads a and b a set of marked index values;
step 4), iteratively combining threads;
step 4.1: acquiring a group of marked index values, wherein acquisition failure indicates that no mergeable threads exist, and entering step 5);
step 4.2: if the number of the index values is equal to 2, only two threads corresponding to the index values are merged;
step 4.3: if the number of the index values is larger than 2, selecting two index values, executing the step 4.2, reducing the number of the index values by 1, and iteratively executing the step 4.2 until the number of the index values is 1;
step 4.4: if the number of the index values is equal to 1, executing the step 4.1;
step 5) deleting threads, and after merging, deleting the other threads except the thread with the minimum index value from the thread group to obtain an optimization result opt _ partitionResult, wherein the method comprises the following substeps:
step 5.1: deleting the merged thread from the thread group;
step 5.2: updating the information of the threads on which the merged threads are depended, and updating the information of the depended threads of the merged threads according to the information of the threads on which the threads with the maximum index values are depended;
step 5.3: updating the thread information depended by other threads, and updating the thread information depended by other threads by using a merging thread if the other threads and the merged thread have a dependency relationship;
34) the task division method based on the pipeline mode comprises the following steps:
step 1) defining a pipeline stage, determining the pipeline stage according to the division result opt _ partitionResult obtained in the step 4.3), and converting the divided tasks into corresponding pipeline stages;
step 2) adding pipeline intermediate variables, adding the pipeline intermediate variables among different pipeline stages, and recording intermediate results generated by different pipeline stages under different pipelines, wherein the method comprises the following substeps:
step 2.1: initializing input actions, simultaneously processing a plurality of input actions based on a pipeline mode, and storing the input actions in an array mode;
step 2.2: recording intermediate variables of the pipeline, which are used for recording temporary variables for data exchange between the satellite actions with the dependency relationship;
step 3) adding a communication function, adding a communication function of intermediate variables of the pipelines and communication functions among different pipelines in different pipeline stages in the same pipeline, wherein the latter is that a delay action influences a pipeline mode, so that the delay action needs to be added, and the method comprises the following sub-steps:
step 3.1: and adding and initializing the delay actions of all the pipeline stages corresponding to the pipelines, wherein the conditions for adding the delay actions to the pipeline stages are as follows: signals of delay action are involved in the calculation of the pipeline stage;
step 3.2: adding an input data transmission function in _ exchange for communication between a waterline intermediate variable and a dependent toilet action;
step 3.3: adding an output data transfer function out _ exchange for communication between the pipeline intermediate variable and the dependent sanitary action;
step 3.4: and increasing communication functions among different pipelines, finding out data communication relations among different pipelines according to the delay action, and transmitting data.
The multitask compiling method based on the graphical satellite command calculation is characterized in that: the method for automatically generating the virtual multithreading code in the step 4) comprises the following steps:
a) defining virtual multithreading code, wherein basic elements of the virtual multithreading are as follows:
wait element: representing dependent objects in a clock data dependency graph; namely, the dependency relationship a → b, where a is the dependency object of b;
notify elements: representing depended objects in a clock data dependency graph; namely, the dependency relationship a → b is the depended object of a;
the transactions element: a computation portion representing a single thread in virtual multithreading; the GCC _ graph is obtained by the guard action conversion of the GCC _ graph;
thread element: a single thread representing a virtual multithread; the thread is composed of a serial execution sequence index value, a thread index value, a dependent object set, a thread computing part and a dependent object set;
b) generating a virtual multithread code, wherein the virtual multithread is divided into an Init module, a Main module and a thread group module and corresponds to three conversion rules in a conversion program;
first, the GCC _ graph program is converted into the virtual multithreading code VirtualMT, and then three modules are processed separately: the system comprises a thread group module, a Main module and an Init module;
secondly, the conversion rules for generating three different modules from the GCC _ graph are:
conversion rule 1 initial clock of GCC _ graph
Figure GDA0001683754450000081
Converting the delay action into an Init module, initializing the delay action, and recording the delay action as a printVirtualInitializationModule module;
conversion rule 2. the defensive action declaration and calling information of GCC _ graph are converted into Main module: creating a new thread call in the Main module, and recording the new thread call as a createNewThread module;
converting the GCC _ graph program into a Main module, wherein the GCC _ graph program comprises a new thread creating module, an Init calling module and a thread group calling module which are recorded as a printVirtualMainModule module;
transformation rules 3.GCC _ graph's defended action set transformation into thread group Module, comprising
waittoInt, waittoStr submodule: the method comprises the steps of obtaining a thread index value corresponding to a dependent object;
notifytoInt, notifytoStr submodule: acquiring a thread index value corresponding to a depended object;
addwaitthreadbody submodule: adding a wait module for the thread, namely information depended by the thread;
addTofytoThreadModule: adding a notify module to the thread, namely the thread is depended on information;
handleThreadGroup submodule: converting the defend type action set into a thread group; adding a thread index value to each thread, and then converting the defensive action into a calculation part of the thread;
partitionResulttoVirtualMultiThread submodule: dividing the GCC _ graph program into threads according to the division result partitionResult; calculating serial execution sequence index values and then processing thread groups;
the multitask compiling method based on the graphical satellite command calculation is characterized in that: the specific content of the method for converting the virtual multithreading code into the executable multithreading Ada/C code in the step 5) is as follows:
6.1) automatic generation of executable multitask Ada code:
conversion rule 1. generating a header file:
generating library units of the ads file and the adb file in the executable Ada code, namely, reserving contents behind the words with and use, and recording the library units as a getAdHeadFile function;
and 2, converting rule 2.Wait/notify generates an entry function and a function call in an accept function:
getattaskentry _ Call function: generating function calls in an entry function entry () and an execution function accept () in a single task statement in Ada; converting an input parameter of a task in VirtualMT and a data transmission function in a pipeline mode into entry () and a corresponding parameter in Ada; determining the number of entry () by tasks contained in the wait information, and converting notify into function call in an accept function;
converting all variables in the Init module and the thread group module into Ada variable statements, generating all variable statements related to Ada, initializing corresponding variables, converting the variables in the VirtualMT into Ada variables used in the structures of procedure, task and the like in a one-to-one correspondence manner, and simultaneously assigning the Init module information of the VirtualMT to the corresponding Ada variables which are recorded as getAda variables functions;
conversion rule 4. all threads of the thread group module are converted into corresponding Task in Ada:
getAdaPackage module: generating package declarations and package main structures corresponding to the GCC _ graph in the ads file and the adb file respectively;
getadataskaaccept module: generating specific calculation of an execution function accept () in a single task body in Ada, and converting a calculation part of a corresponding task in VirtualMT into an execution operation in the accept ();
getExecutable RightBraneIndex module: generating all indents in the ads file and the adb file, ensuring a hierarchical structure and improving the readability of the generated code;
getattask module: generating a single task in the Ada, wherein the single task comprises three parts of a temporary variable statement, an entry function () and an execution function accept ();
getatatasks module: generating all tasks in the Package, converting a thread group module of VirtualMT into corresponding tasks in Ada, and generating all tasks in an iterative mode;
getAdaInputFunction module: generating an input function capable of executing Ada codes, adding a read file operation according to the input action of GCC _ graph, and reading a signal variable from an input file, wherein '' indicates that a signal is in a missing state;
getaaoutputfunction module: generating an output function capable of executing Ada codes, increasing the operation of writing in a file according to the output action of the GCC _ graph, and taking charge of writing a calculation result in an output file;
and 5, converting the Main module into a Main function procedure:
getAdaCreateTask module: declaring tasks to be used, converting the tasks in VirtualMT into task declarations in Ada codes so as to be called later;
getAdaProcedure module: generating a main function part in an executable Ada code, and converting a main function module in the VirtualMT into a procedure for creating and calling a task;
6.2) executable multitask C code automatic generation:
conversion rule 1. header file generation:
getExecutable HeadFile module: generating executable C code header file declarations including stdio.h and pthread.h;
conversion rule 2. define the mutex function according to wait/notify, including
getExecutable structCounter function: for generating mutex structure definitions in executable C code;
getExecutableStructWaitNotify function: the method comprises the steps that C code implementation is used for generating a wait/notify mechanism, and a wait () function and a notify () function are respectively arranged in a target C code;
transformation rules 3. declare variables, including
getExecutable WaitNotification 2 CounterReclaration module: generating a variable statement corresponding to the mutex;
getExecutable declaration module: generating an executable C code declaration for the signal variable;
getExecutable ClockClassDesclaration Module: generating a variable statement corresponding to a clock in the GAC;
transformation rules 4. initialization of variables, including
printwaitnotifexenutableinit module: initializing mutex assignment;
printdelayof executableinit module: initializing a delay action assignment;
printmasterclockofexecuteinit module: initializing a main clock assignment;
getExecutable InitModule module: generating an executable C code corresponding to the Inin module, wherein the executable C code comprises an initialization main clock, an initialization delay action and an initialization mutex;
converting rule 5, generating a task group;
getScourceType Module: acquiring the type of a signal variable in a source GAC and converting the type into a type corresponding to a target executable C code; the basic data type is converted into Integer → int, Char → Char, Boolean → enum Boolean { FALSE, TRUE }, String → Char;
printexecutables wait module: processing threads depended by the threads, and converting the dependency relationship between the threads depended by the threads into corresponding wait () functions;
printexecutablnotify module: processing threads on which the threads depend, and converting the dependency relationship between the threads and the threads which are depended into corresponding notify () functions;
getExecutable ThreadModule: the computing part of the processing thread converts the defensive action into an executable C code which completes the computing function;
getExecutable RightBraneIndex module: processing the indentation problem of the generated code, and making the generated code obvious in hierarchy by using different indentation values;
getExecutable SingleThread module: generating a single executable C thread, including a dependent thread, a computing portion, a dependent thread, and an indentation problem of a processing thread;
getExecutable ThreadGroupModule module: generating an executable C code corresponding to the thread group module, and sequentially generating each executable C thread;
and 6, generating a Main function:
gettpthreadcreate module: thread creation, corresponding to pthread _ create in POSIX;
gettpthreadjoin module: calling a thread to be executed, wherein the thread to be executed is called and corresponds to pthread _ join in POSIX;
getExecutable MainModule: and generating executable C codes corresponding to the Main module, wherein the executable C codes comprise initialization calling, thread creation and thread calling.
The invention achieves the following beneficial effects: the GCC _ graph defined by the present invention has the following characteristics: GCC _ graph relies on the assumption of synchronization, and GCC _ graph based on formalized MoC can be used not only for function verification, but also for static program analysis to ensure the real-time performance of an application program; the GCC _ graph adopts a multi-task synchronous concurrent mode, so that the communication overhead between tasks is 0; at each logic moment, the system function behavior is expressed in a non-recursive mode, and the cycle execution times are expressed through the times of the logic moments, so that the time predictable system facing the safety critical field is very suitable for being designed; two modes of imaging and text modeling are adopted, so that designers can conveniently construct a GCC _ graph model; the invention further provides a method for generating the multitask Ada/C code through automatic compiling, which comprises clock calculation, data dependence analysis and task division, virtual multithreading and Ada/C code generation. Finally, since GCC _ graph focuses on the data flow behavior of the model, the content of the synchronization attachment can be described using a graphics satellite command calculation GCC _ graph in a manner of extending the synchronization attachment in AADL, thereby increasing the expression of AADL on the data flow behavior in threads and subroutines. As such, with the widespread use of multi-core processors, polymorphic synchronization modes have received increased attention. The GCC _ graph is calculated by the graphical sanitary command and simultaneously supports a pure synchronous mode and a polymorphic synchronous mode. The method can be used as an intermediate language for integration among multiple synchronous languages, namely, the method supports multiple synchronous languages to generate a unified GCC _ graph synchronous model through compiling.
Drawings
FIG. 1: modular GCC _ graph compilation architecture;
FIG. 2: partitioning examples based on the topological ordering;
FIG. 3: an example of an optimization task division method;
FIG. 4: input-output dependence specialization;
FIG. 5: a task partitioning example based on a pipeline mode;
FIG. 6: a virtual multithreading structure;
FIG. 7: virtual multithreading codes generate executable multithreading Ada/C codes;
FIG. 8(a) is a graphical modeling element graph for immediate actions, (b) is a graphical modeling element graph for deferred actions, (c) is a graphical modeling element graph for constrained actions, (d) is a graphical modeling element graph for input actions, and (e) is a graphical modeling element graph for output actions.
Detailed Description
The invention will be further described with reference to the accompanying drawings in which:
the invention relates to a method for generating executable multi-task Ada/C codes by automatically compiling GCC _ graph through graphical satellite command calculation. All functions of the compiler are realized by CAML programming of a functional programming language, and since CAML is a safe language, CAML program is verified by the compiler before execution. In addition, the compiler designed by the invention uses a modular structure, and once the requirement is changed, only the corresponding module needs to be modified.
The invention defines the formal grammar and the formal semantics of the GCC _ graph of the graphical satellite command calculus. The GCC _ graph compiler divides a compiling process into four modules, namely clock calculation, task division, virtual multithreading code automatic generation and executable multitasking Ada/C code automatic generation based on a modular structure design technology, wherein the task division comprises definition of a clock data dependency graph and a task division method. Three task division methods are provided for improving the execution efficiency of target Ada/C codes. See figure 1 for details.
A functional programming language CAML is adopted to realize all functions of a GCC _ graph compiler, and the method comprises the following specific steps:
1) defining the GCC _ graph language:
this patent gives some basic definitions related to GCC _ graph. A GCC _ graph model is defined as the satellite type action on a signal variable set V
Figure GDA0001683754450000111
And (4) collecting. The input and output of the GCC _ graph model are a group of value sequences, and are marked as signal variables (or signals). At each logic instant, the signal is in one of two states: in the presence state and carrying a value or in the absence state (noted |). Defining all logic time sets in existence state in the signal s as abstract clocks corresponding to s and recording as abstract clocks
Figure GDA0001683754450000112
If the abstract clocks of the two signals s1 and s2 are the same,s1 and s2 are said to be synchronized.
The GCC _ graph language for calculating the graphical sanitary command consists of a graphical specification, a text grammar and a form semantic.
The basic modeling element definition of the graphical specification:
the method provides a set of graphical modeling elements for graphical synchronous calculation modeling. The basic structure of the defend action and the corresponding graphical modeling elements comprise five types, namely an immediate action ImA (immediate action), a delayed action DA (delay action), a constraint action AA (assertion action), an input action InA (input action) and an output action OutA (output action), and fig. 8(a) is a graphical modeling element graph of the immediate action, (b) is a graphical modeling element graph of the delayed action, (c) is a graphical modeling element graph of the constraint action, (d) is a graphical modeling element graph of the input action, and (e) is a graphical modeling element graph of the output action, and the detailed description is as follows:
and (3) immediate action: receiving (m + n) input signals, wherein the m input signals are used for guard judgment and the n input signals are used for calculation, if the guard is true, calculating, and returning an output signal k, otherwise, not performing any operation.
Delaying action: receiving m input signals for guard judgment and n input signals for action calculation, if the guard is true, executing the calculation, and delaying one logic moment to output a result k, otherwise, not executing any operation.
And (3) constraint action: receiving m input signals for guard judgment and n input signals for constraint, if the guard is true, executing synchronous operation, synchronizing the n input signals and outputting a synchronous result, otherwise, not executing any operation.
An input action: an input signal is received from the external environment, which is always checked first at each logical moment.
And (3) output action: the signal is output to the external environment. At each logic time, it is judged whether or not to output a signal after the calculation is completed.
Formalized definition of the GCC _ graph text grammar:
formal syntax and corresponding semantic interpretation of the five classes of basic structures of GCC _ graph are shown below,
Figure GDA0001683754450000121
wherein, the guard type G is defined in the signal variable X, the logic clock of the signal variable X ∈ X
Figure GDA0001683754450000122
And its initial clock
Figure GDA0001683754450000123
A Boolean condition above; τ is an expression defined on X; σ is then the boolean expression defined on X and its logic clock.
In the study, we only consider the basic structure of the GCC _ graph, since all extended structures can be represented by the basic structure. The abstract syntax of the basic structure in the GCC _ graph is expressed as follows,
Figure GDA0001683754450000131
in the above definition, x is a signal variable in GCC _ graph, GCC _ graph/x is a local signal variable declaration in GCC _ graph, and f can express constants (such as true, false, etc.), arithmetic operations, logical operations, and user-defined functions. In addition, the combination between different GCC _ graphs adopts synchronous combination operation '|', so that the GCC _ graph can express deterministic concurrent behaviors.
Formal semantics of GCC _ graph:
the form semantics of the computer language mainly comprise four types of operation semantics, nominal semantics, axiom semantics and algebraic semantics. The invention defines the named semantics of the GCC _ graph based on the trace model. Clock definitions and value definitions of guard, constraint and expression are given first, and then formal semantics of the GCC _ graph are defined.
The clock and value portions of the guard, constraint and expression are defined. Given a trace S, logic time i and signal variable X, a function is defined,
Figure GDA00016837544500001313
is defined as
Figure GDA0001683754450000133
Figure GDA0001683754450000134
If and only if at logic instant i on S, all signal variables in G are in a present state. It is to be noted here that since each clock can be read at any logic time, it is possible to read the clock at any logic time
Figure GDA0001683754450000135
Is defined as true.
Figure GDA0001683754450000136
Defining a bias function
Figure GDA0001683754450000137
When in use
Figure GDA0001683754450000138
The value of y (true or false) is calculated as true.
Figure GDA0001683754450000139
Figure GDA00016837544500001310
Is defined as
Figure GDA00016837544500001311
Figure GDA00016837544500001312
If and only if at logic instant i on S, all signal variables in τ are not missing.
Figure GDA0001683754450000141
Defining a bias function
Figure GDA0001683754450000142
When in use
Figure GDA0001683754450000143
The value of τ is computed as true (true or false).
Figure GDA0001683754450000144
Here, the
Figure GDA0001683754450000145
And
Figure GDA0001683754450000146
respectively have
Figure GDA0001683754450000147
And
Figure GDA0001683754450000148
the same definition is due to the fact that guard and constraint have the same syntactic structure.
The semantic part of the GCC _ graph is defined. The trace semantics of a gccgraph system are defined as a collection of traces,
that is to say that the first and second electrodes,
Figure GDA0001683754450000149
we give immediate action, deferred action, constraint
Semantic rules for meaning, input actions, and output actions.
Rule 1, if all signal variables contained in G are in a present state, G is valued true, and all variables in x and τ are in a present state, then x is assigned τ.
Figure GDA00016837544500001410
Rule 2, at logical time i1If all signal variables contained in G are in a present state, G is true, and all variables in x and τ are in a present state, i2Is i1At logical time i2X is in the presence state, then i2X at time is assigned to i1τ at time instant.
Figure GDA00016837544500001411
Rule 3, if all the signal variables contained in G are in the existing state, and the value of G is true, all the signal variables contained in σ are in the existing state, and the value of σ is true.
Figure GDA00016837544500001412
Rule 4, if all signal variables contained in G are in a present state, and G takes the value true, then x is in a present state and is assigned the value r received from the environment.
Figure GDA0001683754450000151
Rule 5, if all signal variables contained in G are in a present state, and G takes the value true, then x is in a present state and is assigned to the value w released to the environment.
Figure GDA0001683754450000152
The combined semantics of the GCC _ graph are defined as:
Figure GDA0001683754450000153
2) GCC _ graph-based clock calculation
The GCC _ graph expresses clock relationships and functional behavior. Therefore, for clock relationships, a clock must be calculated before the compiler generates the code, so as to ensure that the GCC _ graph model is definitely executable. Clock calculation includes defining clock relationships and building clock trees. If the clock tree is successfully built, the representation model can generate code with deterministic behavior, followed by multi-threaded code generation.
Defining a clock relation corresponding to the defensive action:
Figure GDA0001683754450000154
wherein the content of the first and second substances,
Figure GDA0001683754450000155
the clocks representing all the signal variables in expression G are true and G takes the value true.
Figure GDA0001683754450000156
The clocks corresponding to the variables in the expression tau and the variable x of the signal are both true. → denotes clock implications, e.g.
Figure GDA0001683754450000157
Meaning child node
Figure GDA0001683754450000158
Is true, the father node
Figure GDA0001683754450000159
Is always true, thus building a clock tree.
Constructing a clock tree:
the clock implication relationship between two clocks is checked through BDD (binary Decision Diagram), so that a clock tree is constructed. Meanwhile, in each node of the clock tree, all clock variables are equivalent, so that the clock equivalent class is used for replacing the corresponding clock variable, and the clock relationship is optimized.
DefineElement: defining nodes of the tree, wherein the nodes comprise mark values elm and clocks of the nodes, and the elm is used for determining the ID of the clock equivalence class when the target code is generated;
defineHierarchy: defining the structure of a tree, wherein leaves are Empty, and branches (or nodes) are relationships;
move: the location of insertion is determined. The clock implication relationship between the clock and the clock to be inserted in the two current nodes is checked by bdd (binary Decision diagram). After the implication relation is determined, if the subtree of the node is not empty, executing a Move method, and inserting a clock into a certain existing node or a newly-built node;
insertClockVariable: inserting a clock into the tree, determining an insertion position through Move, and executing clock insertion operation;
constructHierarchy: the clock is inserted into an empty clock tree, thereby creating a clock tree.
3) Three task division methods based on GCC _ graph
The parallel code generation is driven by a clock data dependency graph, a dependency relationship definition is given firstly, and the GCC _ graph is converted into the clock data dependency graph clkdataDG based on the dependency relationship. Further, by task-dividing the clkdataDG into parallel execution information and serial execution information in the extraction source GCC _ graph, the multitask code is generated and the deterministic execution order is guaranteed. The task division is the core of the whole parallel compiler, and provides three methods of task division based on topological sorting, optimized task division and task division based on a pipeline mode for analyzing the parallelism of the GCC _ graph program to the maximum limit and reducing the running time of the final executable code.
Constructing a clock data dependency graph:
we first define the dependencies. There is a dependency relationship between any satellite actions a and b, that is, a can be executed only when a is executed, and the dependency relationship is marked as a → b.
Let S (e) be the set of all variables in expression e. One clkdataDG is a set of dependencies defined on the satellite action set a, and the dependencies are divided into three types as shown below.
Figure GDA0001683754450000161
Wherein the content of the first and second substances,
double guard action dependence: when x is1At tau2Or gamma2In existence, then
Figure GDA0001683754450000162
Execution ends
Figure GDA0001683754450000163
Can it be executed. Indicating that two satellite actions have a dependency relationship;
input, defensive action dependence: when x is1At tau2In existence, then
Figure GDA0001683754450000164
Execution ends
Figure GDA0001683754450000165
Can it be executed. The input action and the defending action have a dependency relationship to represent that the input variable is used for calculation by the defending action;
output, defensive action dependence: when x is1And x2In the same way, the first and second,
Figure GDA0001683754450000166
execution ends
Figure GDA0001683754450000167
Can it be executed. The output action and the defending action have a dependency relationship, and the output variable is the calculation result of the defending action.
It is to be added that there is no dependency between the two input (output) actions. In serial code generation, because a certain execution order must be given, a dependency relationship exists between definition inputs (or outputs). In parallel code generation, however, there is no constraint on the execution order among a plurality of inputs (outputs), and thus there is no dependency. And the dependency relationship of the input and output actions establishes an indirect dependency relationship through the intermediate satellite action.
The algorithm for constructing the clock data dependency graph comprises the following steps:
algorithm 1 constructs a clock data dependency graph clkdataDG
Inputting: GCC _ graph
And (3) outputting: clkdataDG
Step 1: selecting two different satellite actions act1 and act2 from the satellite actions;
step 2: if act1 and act2 are both input actions or both output actions, then jump to step 7;
and step 3: if act1 and act2 are input actions and output actions, respectively, then jump to step 7;
and 4, step 4: if act1 is an input action, act2 is an immediate action or a deferred action, and the signal variable in act1 is present in the guard of act2 or in the expression of the action, act1 → act2 is added to clkdataDG, and then jump to step 7;
and 5: if act1 is an output action, act2 is an immediate action or a deferred action, and the signal variable in act1 is the assigned variable to the right of the equation in the act2 action, then act2 → act1 is added to clkdataDG, then jump to step 7;
step 6: act2 is immediate or deferred action if act1 is immediate or deferred action. Then consider the following case: adding act1 → act2 to clkdataDG if the act1 medium right-side valued variable exists in the guard of act2 or in the expression of the act;
and 7: if any two different satellite actions in the GCC _ graph are traversed, exiting the algorithm, otherwise, continuing to traverse the GCC _ graph, and turning to the step 1;
task partitioning based on topological sorting:
since clkdataDG is a directed acyclic graph. The common dividing method is to divide tasks of the clkdataDG by using the idea of topological sorting, so as to find parallel information. Namely, clkdataDG generates partitionResult by the partition method. The division result is shown in fig. 2, where the serial execution information is S1 to S8 sequentially executed, and the parallel execution information is that all nodes within a single { } can be executed in parallel.
The division method of the CAML definition construction topology sequencing task comprises the following steps:
step 1, find out the point set InDegreee _ ZeroV (list type, representing parallel execution information) with zero in the current clkdataDG. Including the following functions:
getOutDegreee: the clkdataDG is converted to an edge-corresponding Right vertex set Right VS. By traversing the right vertex of an edge in the graph;
getInDegreee: the clkdataDG is converted to an edge-corresponding Left vertex set Left _ VS. By traversing the left vertex of an edge in the graph;
deleteduplicatedments: and optimizing the vertex set. Deleting redundant vertex elements;
getZeroEdges: the clkdataDG is converted to a set of edges with an in-degree of zero. Selecting edges corresponding to vertexes only appearing in the left vertex set;
getzeroVertics: a vertex set indegreee _ ZeroV with zero in-degree is calculated. The calculation rule is as follows: selecting a left vertex element of an edge in the getZeroEdges, deleting a redundant vertex, and then adding an isolated point set in the last division;
and 2, updating the clkdataDG. Deleting InDegree _ ZeroV and ZeroEdges from the current clkdataDG; find the independent point set IsolatedVertics, and delete IsolatedVertics from the current clkdataDG. Including the following functions:
getIsolatedVertics: and acquiring an isolated point set IsolatedVertics. Deleting the edge corresponding to the InDegreee _ ZeroV from the clkdataDG, then acquiring a vertex set with zero in-degree and out-degree, and adding the vertex set into the InDegreee _ ZeroV for next division;
and 3, dividing an iteration task. Firstly, storing the currently calculated InDegreee _ ZeroV into a partitionResult (a two-dimensional list type, wherein the first dimension stores the InDegreee _ ZeroV obtained in each loop, and subscripts represent serial execution information), and then, iteratively executing the step 1 by taking the InDegreee _ ZeroV (which is empty), IsolatedVertics calculated in the current loop and updated clkdataDG as parameters. When clkdataDG is empty, the partitioning stops. The method mainly comprises the following functions:
partition _ polar sorting: task partitioning is performed on clkdataDG. Using the idea of topological sorting, dividing clkdataDG into an essential serial execution part and a parallel execution part;
getpertioninResult: and performing dependency relationship analysis and task division on the GCC _ graph. Firstly, converting GCC _ graph into clkdataDG according to analysis, and then performing task division on the clkdataDG to obtain a division result partitionResult;
optimizing task division:
after partitionResult is obtained, because some redundant dependency relationships are added to the task division result based on topological sorting, the redundant dependency relationships reduce the parallelism of program division and greatly increase the execution time of the generated code. The solution (as shown in fig. 3) is provided to optimize the result of the topological sorting, and resolve the redundant dependency relationship in the result of the topological sorting, so that the parallelism of the program is improved. In addition, the number of nodes in the clkdataDG determines the number of tasks that are finally generated, so the invention also provides a method for merging nodes (threads) to try to further optimize the result of task division.
CAML defines the steps of optimizing task division as follows:
step 1, finding out the redundancy dependency relationship. According to clkdataDG, the dependency relationship in partitionResult is classified into two types of non-optimizable dependency relationship and optimizable dependency relationship, and the dependency relationship, namely the redundancy dependency relationship, can be optimized. The method mainly comprises the following functions:
getActionbyId: and obtaining a thread index value corresponding to the defensive action. Establishing a mapping relation between the satellite action and the thread index number in a hash table mode;
getUniqueElement: and acquiring unoptimizable dependency relationships. I.e. the dependencies present on clkdataDG;
and 2, optimizing the dependency relationship. Optimizing the redundancy dependency found in step 1, including the following functions:
optimizeWait: optimizing the number of threads on which the threads depend;
optimizeNotify: optimizing the number of threads on which the threads are dependent;
optimizeWaitNotify: and optimizing the dependency relationship of the threads. The redundancy dependencies present in partitionResult are optimized according to clkdataDG. Redundant dependencies refer to those dependencies that are contained in partitionResult and do not belong to clkdataDG;
and 3, defining the combinable threads. Optimizing the dependency followed by thread merging first requires marking which threads can be merged. The labeling function is:
getAnnexableThreads: finding out the dependency relationship which can be merged from partitionResult;
and 4, iterating and combining the threads. And merging all the threads which can be merged in an iterative mode according to the index value obtained by the marking function. Including the following functions:
getThread: obtaining a thread corresponding to the thread index value;
mergettwothread: a given two threads are merged. The merging principle is as follows: if the threads a and b have the dependency relationship of a → b, and the number of threads on which a depends and the number of threads on which b depends are both 1, merging the threads a and b;
and 5, deleting the thread. After merging, deleting the other threads except the thread with the minimum index value from the thread group, and simultaneously including the total control function of the whole optimization step. The main functions are as follows:
deleteThreadIddFromWaitlist: deleting the thread index value;
deleteRedundant thread: deleting the merged thread from the thread group;
optimizesorcingresult: and optimizing the partitioning result of the topological sorting. Completing optimization by combining and deleting redundant threads, and converting partitionResult into opt _ partitionResult;
task division based on a pipeline mode:
through the task division, a part which can be executed in parallel and a part which must be executed in series in the clkdataDG are obtained. However, there are two special categories: due to the limitation of the source program and the division process, a division result with higher parallelism cannot be found, or the source program itself does not have a part that can be executed in parallel. To solve such problems, the idea of computer Pipeline technology (Pipeline) is introduced here, and a Pipeline manner (Pipeline Style) is proposed to divide clkdataDG.
The premise of using the pipeline mode is that no special input and output dependence case exists in the GCC _ graph program: the output of a current logic time of a program is the input of the next logic time of the program. As shown in FIG. 4, the Output value at the current logic time of the system is used for the Input _2 value at the next logic time, thus resulting in multiple parallel pipelines actually executing serially in only one pipeline.
As shown in fig. 5, the pipeline approach herein is divided into the following steps: defining a pipeline stage according to the division result; adding pipeline intermediate variables for each pipeline stage; the communication behavior between different pipeline stages is handled in the same pipeline and the communication behavior of delayed action of the GCC _ graph is handled in different pipelines.
The CAML defines a task dividing method based on a pipeline mode as follows:
step 1, defining a pipeline stage. And determining a pipeline stage according to the division result opt _ partitionResult. The function involved is:
PipelineExecutable SingleThread: converting the divided tasks into corresponding pipeline stages;
and 2, adding intermediate variables of the production line. And adding pipeline intermediate variables (arrays) among different pipeline stages for recording intermediate results generated by different pipeline stages under different pipelines. Including the following functions:
inputArray: for initializing the input action. Because a plurality of input actions are processed simultaneously based on a pipeline mode, the input actions are stored in an array mode;
setpoilinevariable: and recording intermediate variables of the pipeline. Temporary variables for data exchange between satellite actions for recording existence of dependency relationships;
setexchangeidofpinevariable: recording an index value corresponding to the intermediate variable of the production line;
printdechlorationof pipelineexchange: declaring a pipeline intermediate variable, a corresponding index value and a data transmission function;
and step 3, increasing the communication function. The communication function of intermediate variables of the pipelines and the communication function between different pipelines are added in different pipeline stages in the same pipeline, and the latter is that the delay action influences the pipeline mode, so the delay action needs to be added. Including the following functions:
printdelayofpipeelineinit: initializing respective delay actions at a plurality of moments;
addlnputexchange: the input data transfer function in _ exchange is increased. The method is used for communicating the pipeline intermediate variable and the dependent guard action;
addOutputExchange: the output data transfer function out _ exchange is increased. The intermediate variable is used for communicating with the depended defended action;
addPipelLinesCommunication: and increasing communication functions among different pipelines. Finding out the data communication relation among different pipelines according to the delay action, and transmitting data;
PipelineGuardExp2 str: adding a data transmission function in a satellite mode of the satellite mode action;
5) automatic generation method of virtual multithreading code
And generating a virtual multithreading VirtualMT based on the Wait/Notify mechanism according to the partitionResult. The method aims to provide the capability of generating an intermediate expression which is irrelevant to a verification code and a simulation code platform from the back end of a compiler so as to verify the properties of no deadlock and the like of the multi-thread code by using a model detection tool such as UPPAAL and carry out simulation experiments on a simulation tool such as simulink in the future.
The complete VirtualMT code is mainly divided into three modules, a main function module, an initialization module and a thread group module, as shown in fig. 6. The master function module is divided into two parts: one is to call other modules; second, a while loop is created, each time a logic time is executed to execute the GCC _ graph program. The initialization module initializes the value of the first logic time of the signal variable in the GCC _ graph program. The thread group module is composed of a plurality of threads and completes the calculation action under a single logic moment.
CAML defined virtual multithreading code:
wait: representing dependent objects in the clock data dependency graph. Namely, the dependency relationship a → b, where a is the dependency object of b;
notify: representing the depended objects in the clock data dependency graph. Namely, the dependency relationship a → b is the depended object of a;
the transactions: representing the computational portion of a single thread in virtual multithreading. The GCC _ graph is obtained by the guard action conversion of the GCC _ graph;
the thread: representing a single thread of virtual multithreading. The thread is composed of a serial execution sequence index value, a thread index value, a dependent object set, a thread computing part and a dependent object set;
according to the task division result, parallel information and serial information in the source GCC _ graph, i.e., information that generates a multitask code and guarantees a deterministic execution order, can be extracted. Thus, based on the task partitioning results, the source GCC _ graph program can be converted into virtual multi-threaded code.
CAML defines the virtual multithread code generation method:
the Init module, the Main module and the thread group module of the virtual multithreading respectively correspond to three conversion rules in the conversion program. Before introducing the conversion rule, defining a virtual multithread code generation general control program as follows:
getVirtualMultiThread: the GCC _ graph program is converted to virtual multithreading code VirtualMT. Three modules are processed respectively: the system comprises a thread group module, a Main module and an Init module;
the transformation rules for generating three different modules from the GCC _ graph are:
conversion rule 1 initial clock of GCC _ graph
Figure GDA0001683754450000201
Module for converting into Init
printvirtualinitializationmodule: and converting the GCC _ graph program into an Init module. Mainly initializing a delay action;
conversion rule 2.GCC _ graph defend type action declaration and calling information conversion into Main module
createNewThread: creating a new thread call in the Main module;
printVirtualMainModule: and converting the GCC _ graph program into a Main module. The method comprises the steps of creating a new thread function, calling an Init module and calling a thread group module;
conversion rule 3.GCC _ graph's defended action set conversion into thread group Module
wait2int, wait2 str: acquiring a thread index value corresponding to the dependent object;
notify2int, notify2 str: acquiring a thread index value corresponding to a depended object;
addWait2 ThreadBody: adding wait to the thread, namely information depended by the thread;
addNote 2 ThreadModule: adding notify to the thread, namely the thread is relied on;
handleThreadGroup: the guard action set is converted into a thread group. Adding a thread index value to each thread, and then converting the defensive action into a calculation part of the thread;
partitionResult2 VirtualMultiThread: and dividing the GCC _ graph program into threads according to the division result partitionResult. Calculating serial execution sequence index values and then processing the contents of the thread groups;
6) executable multi-task Ada/C code automatic generation method
The virtual multithreading code is non-executable and to generate the final executable code we next present the rules for conversion of the virtual multithreading code to executable multitask Ada/C code generation. The corresponding transformation relationship is shown in fig. 7, in which the thread group module is transformed into a plurality of functions in tasks and C in Ada, the initialization module is transformed into an initialization function in Ada and C, and the main module is transformed into a procedure function in Ada and a main function in C, respectively.
The method for converting the virtual multithreading code into the executable multitask Ada/C code comprises the following steps:
virtual multithreading transcoding to executable multitask Ada code method:
and converting the rule 1 to generate a header file. A basic header file stdio.h and a header file pthread.h called using the POSIX mechanism are generated. The corresponding CAML function is:
getAdaHeadFile: library units (library units) of the ads file and the adb file in the executable Ada code are generated, i.e., contents behind the reserved words with and use. Such as ada. text _ IO and ada. strings. unbounded, etc.;
and 2. converting rule 2.Wait/notify generates function calls in an entry function and an accept function. And defining functions, function calls and calculation logic at corresponding positions of the Ada code according to wait, notify and task calculation parts in the virtual multi-thread code. The corresponding CAML function is:
getataskentry _ Call: and generating an entry function entry () in a single task statement in the Ada and executing a function call in a function accept (). The input parameters of the task in VirtualMT (and the data transfer function in a pipeline mode) are converted into entry () and corresponding parameters in Ada. And determining the number of entry ()'s by tasks contained in the wait information, and converting notify into a function call in an accept function.
And 3. converting all variables in the Init module and the thread group module into Ada variable statement and initializing. And analyzing the variable types according to the GCC _ graph program, and converting the variable types into corresponding Ada types to declare the variables. The corresponding CAML function is:
getadavarables: all variable declarations involved in Ada are generated and the corresponding variables are initialized. And (3) converting variables (including clock variables) in the VirtualMT into Ada variables used in structures such as procedure and task in a one-to-one correspondence mode. And meanwhile, assigning the Init module information of the VirtualMT to a corresponding Ada variable.
And 4. converting rule 4. all threads of the thread group module are converted into corresponding tasks in Ada. Each task generates: task name, task declaration, variable declaration, entry function, and task body. The corresponding CAML function includes:
getAdaPackage: generating package declarations and package main structures corresponding to the GCC _ graph in the ads file and the adb file respectively;
getatatskbody generates the execute function accept () in a single tasskbody in Ada. Converting the calculation part of the corresponding task in the VirtualMT into an execution operation in an accept ();
getExecutable RightBranceIndex: all indents in the ads file and the adb file are generated. The hierarchical structure is ensured, and the readability of the generated code is improved;
getAdaTask: a single task in Ada is generated. The method comprises three parts of temporary variable declaration, entry function () and execution function accept ();
getatatasks: all tasks are generated in the Package. Converting a thread group module of VirtualMT into a corresponding task in Ada, and generating all tasks in an iterative mode;
getAdaInputFunction: an input function of executable Ada code is generated. And according to the input action of the GCC _ graph, adding file reading operation and taking charge of reading signal variables from the input file. Wherein'' indicates that the signal is in the absent state;
getaaoutputfunction: an output function of the executable Ada code is generated. According to the output action of the GCC _ graph, adding a file writing operation and taking charge of writing a calculation result into an output file;
and 5. converting the Main module into a Main function procedure. One Ada in procedure is generated. Creating a task function, calling the task function, and processing the delay action. The corresponding CAML function includes:
getAdaCreateTask: declaring the tasks that are used. Converting the task in VirtualMT into a task declaration in Ada code so as to be called later;
getAdaProcedure: the main function part in the executable Ada code is generated. Converting a main function module in the VirtualMT into a procedure for creating and calling tasks;
virtual multithreading code conversion to executable multitask C code method:
conversion rule 1. header file generation. A basic header file stdio.h and a header file pthread.h called using the POSIX mechanism are generated. The corresponding CAML function is:
getExecutable HeadFile: an executable C code header file declaration is generated. Including stdio.h and pthread.h, etc.;
and 2, a conversion rule 2, defining a mutex function according to wait/notify. The way of mutual exclusion in POSIX is used to realize the Wait/Notify mechanism of virtual multithreading, so that corresponding functions need to be defined to complete the Wait and Notify functions. The corresponding CAML function includes:
getExecutable structCounter: generating a mutex structure definition in the executable C code;
getExecutable structWaitNotify: and generating C code implementation corresponding to the wait/notify mechanism. In the target C code, respectively are wait () and notify () functions;
transformation rules 3. declare variables. And analyzing the variable types according to the source GCC _ graph program, and converting the variable types into corresponding C types to declare the variables. The corresponding CAML function includes:
getExecutable WaitNotification 2 CounterReclaration: generating a variable statement corresponding to the mutex;
getExecutable declaration: generating an executable C code declaration for the signal variable;
getExecutable ClockClassDesclaration: generating a variable statement corresponding to a clock in the GCC _ graph;
conversion rule 4. variable initialization. And initializing the main clock, the initialization module of the virtual multithreading and the mutex. The corresponding CAML function includes:
printwaitntifyof executableinit: initializing mutex assignment;
printdelayof executableinit: initializing a delay action assignment;
printmasterclockof executableinit: initializing a main clock assignment;
getExecutableInitModule: and generating executable C codes corresponding to the Inin modules. The method comprises the steps of initializing a master clock, initializing a delay action and initializing a mutex;
and 5, converting the rule 5 to generate a task group. Each task calls each subfunction to generate: task name, incoming parameters, wait mechanism, guard, action, and notify mechanism. The corresponding CAML function includes:
getScourceType: and acquiring the type of the signal variable in the source GCC _ graph and converting the type into the type corresponding to the target executable C code. The basic data type is converted into Integer → int, Char → Char, Boolean → enum Boolean { FALSE, TRUE }, String → Char, etc.;
printexecutables wait: the tasks on which the processing task depends. Converting the dependency relationship between the tasks and the depended tasks into corresponding wait () functions;
printexecutablnotify: and processing the task on which the task is dependent. Converting the dependency relationship between the depended tasks into a corresponding notify () function;
getExecutable TaskBody: the computational portion of the processing task. Converting the defend type action into an executable C code for completing a computing function;
getExecutable RightBranceIndex: the indentation problem of the generated code is processed. By using different indentation values, the generated code is obviously layered;
getExecutable SingleTask: a single executable C task is generated. The method comprises a dependent task, a calculation part, a dependent task and an indentation problem of a processing task;
getExecutable TaskGroupModule: and generating executable C codes corresponding to the task group modules. Sequentially generating each executable C task;
and 6. generating a Main function. The structure for generating the main function comprises an initialization function, a task function creation function, a task function calling and a processing delay action. The corresponding CAML function includes:
getprotheadcreate: creating a task corresponding to pthread _ create in POSIX;
gettpthreadjoin: calling a task to be executed, wherein the task is called and corresponds to pthread _ join in POSIX;
getexenutblenmainmodule: and generating executable C codes corresponding to the Main module. Including initialization calls, task creation, and task calls.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims (5)

1. A multitask compiling method based on graphical satellite command calculation is characterized in that: the method is used for compiling a graphical satellite command evolution language GCC _ graph to generate a multitask executable Ada/C code, and the compiling process comprises the following steps:
1) defining a graphical sanitary command calculation GCC _ graph language which comprises a graphical specification, a text grammar and a form semantic;
2) using a functional programming language (CAML) to describe the clock calculation based on GCC _ graph;
3) describing task division based on GCC _ graph by using a functional programming language CAML, wherein the task division comprises three division methods which are sequentially adopted and data dependence analysis performed before division, and the three division methods comprise task division based on topological sorting, optimization of topological sorting division results and a task division method based on a pipeline mode;
4) using a functional programming language CAML to describe a virtual multithreading code automatic generation method based on a division result;
5) using a functional programming language CAML to describe the conversion of virtual multi-thread code into an executable multi-task Ada/C code method;
the step 1) of defining the GCC _ graph language of the graphical satellite command calculation comprises the following steps:
establishing basic definitions related to GCC _ graph:
a GCC _ graph model is defined as the satellite type action on a signal variable set V
Figure FDA0002850270150000011
Gathering;
the input and the output of the GCC _ graph model are a group of value sequences which are marked as signal variables or signals;
at each logic instant, the signal is in one of two states: the state is in an existing state and carries a value or is in a missing state, and the missing state is marked as ^ T; defining all logic time sets in existence state in the signal s as abstract clocks corresponding to s and recording as abstract clocks
Figure FDA0002850270150000012
If the abstract clocks of the two signals s1 and s2 are the same, s1 and s2 are said to be synchronous;
a) the basic modeling element definition of the graphical specification:
the basic structure of the satellite type action and the corresponding graphical modeling elements comprise five types of immediate action, delayed action, constraint action, input action and output action, and the method is as follows:
and (3) immediate action: receiving (m + n) input signals, wherein m input signals are used for guard type judgment and n input signals are used for calculation, if the guard type G is true, calculating f, and returning an output signal k, otherwise, not executing any operation; wherein f expresses constants, arithmetic operations, logical operations and user-defined functions;
delaying action: receiving m input signals for guard type judgment and n input signals for action calculation, if the guard type G is true, executing calculation f, and delaying a logic moment to output a result k, otherwise, not executing any operation;
and (3) constraint action: receiving m input signals for guard type judgment and n input signals for constraint, if the guard type is true, executing synchronous operation, synchronizing the n input signals, and outputting a synchronous result, otherwise, not executing any operation;
an input action: receiving an input signal from an external environment, and checking the input signal all the time before performing the calculation in each GCC _ graph at each logic time;
and (3) output action: outputting the signal into an external environment; judging whether to output a signal after completion of calculation in each GCC _ graph at each logic timing;
b) formalized definition of the GCC _ graph text grammar:
formal syntax and corresponding semantic interpretation of the five classes of basic structures of the GCC _ graph are as follows:
Figure FDA0002850270150000021
wherein, guard type G is defined in signal variable X and logic clock of signal variable X
Figure FDA0002850270150000022
And its initial clock
Figure FDA0002850270150000023
The above Boolean condition, X ∈ X; τ is an expression defined on X; σ is a Boolean expression defined on X and its logic clock;
the GCC _ graph abstract syntax is represented as:
Figure FDA0002850270150000024
in the above definition, GCC/x is the local signal variable assertion in GCC _ graph; the combination of different GCC _ graphs adopts synchronous combination operation '|';
Figure FDA0002850270150000025
the expressions G and sigma may have
Figure FDA0002850270150000026
x、
Figure FDA0002850270150000027
f (G, G.) and τ may have x and f (τ.,. tau);
c) formal semantics of GCC _ graph: the method is divided into two parts: the first part is to define the clock and value of guard, constraint and expression; the second part is to define the named semantics of GCC _ graph based on the trace model;
the first part, at a given trace S, logic time i and signal variable X, defines the following function:
I)
Figure FDA0002850270150000031
is defined as
Figure FDA0002850270150000032
Figure FDA0002850270150000033
If and only if all signal variables in logic instants i, G on S are in a present state, this is true, since each clock can be read at any logic instant
Figure FDA0002850270150000034
Is defined as true:
Figure FDA0002850270150000035
defining a bias function
Figure FDA0002850270150000036
When in use
Figure FDA0002850270150000037
To true, the value of γ is calculated as true or false:
Figure FDA0002850270150000038
II)
Figure FDA0002850270150000039
is defined as
Figure FDA00028502701500000310
Figure FDA00028502701500000311
True, all signal variables in τ are not missing if and only if at logic instant i on S:
Figure FDA00028502701500000312
defining a bias function
Figure FDA00028502701500000313
When in use
Figure FDA00028502701500000314
And if true, calculating the value of tau to be true or false:
Figure FDA00028502701500000315
Figure FDA00028502701500000316
and
Figure FDA00028502701500000317
respectively have I) in
Figure FDA00028502701500000318
And
Figure FDA00028502701500000319
the same definition;
and a second part, defining the named semantics of the GCC _ graph based on the trace model:
the trace semantics of a gccgraph system are defined as a collection of traces, i.e.,
Figure FDA00028502701500000320
and (3) immediate action:
Figure FDA00028502701500000321
delaying action:
Figure FDA00028502701500000322
constraint definition:
Figure FDA0002850270150000041
an input action:
Figure FDA0002850270150000042
and (3) output action:
Figure FDA0002850270150000043
the combined semantics of the GCC _ graph are defined as:
Figure FDA0002850270150000044
2. the multitask compiling method based on the calculation of the graphic satellite command according to claim 1, wherein: the clock calculation based on the GCC _ graph in the step 2) comprises defining a clock relationship and constructing a clock tree; if the clock tree is successfully constructed, the representation model can generate codes with deterministic behaviors, and then multi-thread code generation is carried out; the specific contents are as follows:
a) defining a clock relation corresponding to the defensive action:
Figure FDA0002850270150000045
wherein the content of the first and second substances,
Figure FDA0002850270150000046
the clocks representing all signal variables in the expression G are true, and the value of G is true;
Figure FDA0002850270150000047
representing that the clocks corresponding to the signal variable x and the variable in the expression tau are true; → represents the clock implication;
b) constructing a clock tree:
checking a clock implication relation between two clocks through a binary decision diagram so as to construct a clock tree; meanwhile, in each node of the clock tree, all clock variables are equivalent, and the clock equivalent is used for replacing the corresponding clock variables to optimize the clock relationship;
the clock tree structure may be recursively defined as follows: one clock tree is Empty, or one node and a plurality of sub clock trees below the node; empty clock tree, node is composed of clock equivalence class and guard type action set, child clock tree can be regarded as child node, leaf node of a complete clock tree is all Empty;
the clock tree algorithm is constructed as follows:
step 1: selecting a satellite action act1 from the satellite action set, and jumping to step 8 if the act1 type is input action or output action;
step 2: selecting a clock x _ clk corresponding to a variable on the right side of the equation of action in act1, and calculating a clock equivalent ID _ x of the x _ clk through a binary decision diagram;
and step 3: if the clock tree is Empty, a Node is newly built, wherein ID _ x and act1 are stored, a child Node' of the Node is set to be Empty, and the step 8 is skipped;
and 4, step 4: if a node exists in the clock tree, marking as N, if the child node of N is Empty, adding act1 into N, and newly building a child node N 'of N, setting the clock equivalence class of N' as ID _ x, otherwise, jumping to the step 5;
and 5: if N has a plurality of child nodes, selecting the child node Nr at the rightmost side of N, and comparing the clock equivalence class ID _ Nr of Nr with the ID _ x clock implication relation; if ID _ x → ID _ Nr, then recursively call, starting with step 3, to insert act1 and ID _ x as the values to be computed in step 1-2, respectively, into the child clock tree with Nr as the root node;
step 6: if ID _ Nr → ID _ x, adding act1 to the guard action set of N, and setting the rightmost child node as clock equivalence class ID _ x, the guard action set is empty, its sub-tree is the child clock tree with Nr as root node, otherwise, go to step 7;
and 7: adding act1 into the guard action set of N, newly building the rightmost child node of N: the clock equivalence class is ID _ x, the guard action set is null, and the subtree is null;
and 8: if the satellite type action set is traversed, exiting the algorithm and outputting a clkTree, otherwise, skipping to the step 1;
if the clkTree is a clock tree, the construction is successful, and the data dependence analysis in the step 3) is executed; if the clkTree is a multi-clock tree or a non-tree structure, the construction fails, the compiling is terminated and an error is reported.
3. The multitask compiling method based on the calculation of the graphic satellite command according to claim 1, wherein: the specific content in the step 3) is as follows:
31) data dependency analysis, namely constructing a clock data dependency graph clkdataDG;
step 1: selecting two different satellite actions act1 and act2 from the set of satellite actions;
step 2: if act1 and act2 are both input actions or both output actions, then jump to step 7;
and step 3: if act1 and act2 are input actions and output actions, respectively, then jump to step 7;
and 4, step 4: if act1 is an input action, act2 is an immediate action or a deferred action, and the signal variable in act1 is in the guard form of act2 or in the expression of the action, then add the constraint that the information "act 1 executes first, act2 can execute" to clkdataDG, and then jump to step 7;
and 5: if act1 is an output action, act2 is an immediate action or a deferred action, and the signal variable in act1 is the assigned variable to the right of the equation in the act2 action, then the constraint that the information "act 2 executes first, act1 can execute" is added to clkdataDG, and then jump to step 7;
step 6: if act1 is immediate or deferred action and act2 is immediate or deferred action, consider the following: if the equal right-side amount assigned variable in act1 exists in act2 satellite or expression of the action, adding the constraint of information "act 1 is executed first and act2 can be executed" to clkdataDG;
and 7: if any two different satellite actions in the GCC _ graph are traversed, exiting the algorithm, otherwise, continuing to traverse the GCC _ graph, and turning to the step 1;
32) the partitioning method based on topological sorting comprises the following steps:
step 1) finding out a point set InDegree _ ZeroV with zero in-degree in the current clkdataDG, wherein the type of the InDegree _ ZeroV is a list type and represents parallel execution information, and the method comprises the following substeps:
step 1.1: converting the clkdataDG into an edge-corresponding Right vertex set Right _ VS and a Left vertex set Left _ VS;
step 1.2: optimizing the vertex set; deleting redundant vertex elements;
step 1.3: calculating an edge set ZeroEdges with zero in degree according to the following calculation rule: selecting edges corresponding to vertexes only appearing in the left vertex set;
step 1.4: calculating a vertex set InDegreee _ ZeroV with zero in-degree; the calculation rule is as follows: selecting left vertex elements of the ZeroEdges, deleting redundant vertices, and then adding an isolated point set in the last division;
step 2) updating the clkdataDG, comprising the following substeps:
step 2.1: deleting InDegree _ ZeroV and ZeroEdges from the current clkdataDG;
step 2.2: calculating an independent point set IsolatedVertics for adding into InDegreee _ ZeroV when next division is carried out, and zero clearing is carried out before each calculation, wherein the calculation rule is as follows: finding out a vertex set with zero in-degree and zero out-degree;
step 2.3: delete IsolatedVertics from the current clkdataDG;
step 3) iterative task division, comprising the following substeps:
step 3.1: storing the current InDegree _ ZeroV into a partitionResult, wherein the type of the partitionResult is a two-dimensional list, the first dimension stores the InDegree _ ZeroV obtained by each circulation, and subscripts represent serial execution information;
step 3.2: taking the empty InDegre _ ZeroV, the currently calculated IsolatedVertics and the updated clkdataDG as parameters to perform step 1) in an iterative manner, stopping partitioning when the clkdataDG is empty, and outputting a partitioning result;
33) optimizing the topological sorting division result:
the optimization is divided into two parts: eliminating redundant dependency relationship and merging threads; the method for eliminating the redundant dependency relationship comprises two steps of finding out, and the main steps of the thread merging method comprise three steps, specifically as follows:
step 1) finding out a redundant dependency relationship, classifying the dependency relationship in partitionResult into an unoptimizable dependency relationship and an optimizable dependency relationship according to clkdataDG information, and optimizing the dependency relationship, namely the redundant dependency relationship, and the method comprises the following substeps:
step 1.1: acquiring a thread index value corresponding to the sanitary action, and establishing a mapping relation between the sanitary action and the thread index number in a hash table mode;
step 1.2: obtaining an unoptimizable dependency relationship, wherein the unoptimizable dependency relationship indicates that the dependency relationship exists in the clkdataDG, and the rest dependency relationships are redundancy dependency relationships;
step 2) optimizing the dependency relationship, optimizing the redundancy dependency relationship found in step 1, comprising the following substeps:
step 2.1: optimizing the number of threads on which the threads depend, and optimizing redundant threads on which the threads depend according to the redundant dependency relationship;
step 2.2: optimizing the number of threads on which the threads are depended, and optimizing redundant threads on which the threads are depended according to the redundant dependency relationship;
step 3) defining combinable threads, carrying out thread combination after optimizing the dependency relationship, marking the index values of the combinable threads from the partitionResult, wherein the marking principle is as follows: if the threads a and b have the dependency relationship of a → b, and the number of threads on which a depends and the number of threads on which b depends are both 1, making the threads a and b a set of marked index values;
step 4), iteratively combining threads;
step 4.1: acquiring a group of marked index values, wherein acquisition failure indicates that no mergeable threads exist, and entering step 5);
step 4.2: if the number of the index values is equal to 2, only two threads corresponding to the index values are merged;
step 4.3: if the number of the index values is larger than 2, selecting two index values, executing the step 4.2, reducing the number of the index values by 1, and iteratively executing the step 4.2 until the number of the index values is 1;
step 4.4: if the number of the index values is equal to 1, executing the step 4.1;
step 5) deleting threads, and after merging, deleting the other threads except the thread with the minimum index value from the thread group to obtain an optimization result opt _ partitionResult, wherein the method comprises the following substeps:
step 5.1: deleting the merged thread from the thread group;
step 5.2: updating the information of the threads on which the merged threads are depended, and updating the information of the depended threads of the merged threads according to the information of the threads on which the threads with the maximum index values are depended;
step 5.2: updating the thread information depended by other threads, and updating the thread information depended by other threads by using a merging thread if the other threads and the merged thread have a dependency relationship;
34) the task division method based on the pipeline mode comprises the following steps:
step 1) defining a pipeline stage, determining the pipeline stage according to the division result opt _ partitionResult obtained in the step 4.3), and converting the divided tasks into corresponding pipeline stages;
step 2) adding pipeline intermediate variables, adding the pipeline intermediate variables among different pipeline stages, and recording intermediate results generated by different pipeline stages under different pipelines, wherein the method comprises the following substeps:
step 2.1: initializing input actions, simultaneously processing a plurality of input actions based on a pipeline mode, and storing the input actions in an array mode;
step 2.2: recording intermediate variables of the pipeline, which are used for recording temporary variables for data exchange between the satellite actions with the dependency relationship;
step 3) adding a communication function, adding a communication function of intermediate variables of the pipelines and communication functions among different pipelines in different pipeline stages in the same pipeline, wherein the latter is that a delay action influences a pipeline mode, so that the delay action needs to be added, and the method comprises the following sub-steps:
step 3.1: and adding and initializing the delay actions of all the pipeline stages corresponding to the pipelines, wherein the conditions for adding the delay actions to the pipeline stages are as follows: signals of delay action are involved in the calculation of the pipeline stage;
step 3.2: adding an input data transmission function in _ exchange for communication between a waterline intermediate variable and a dependent toilet action;
step 3.3: adding an output data transfer function out _ exchange for communication between the pipeline intermediate variable and the dependent sanitary action;
step 3.4: and increasing communication functions among different pipelines, finding out data communication relations among different pipelines according to the delay action, and transmitting data.
4. The multitask compiling method based on the calculation of the graphic satellite command according to claim 1, wherein: the method for automatically generating the virtual multithreading code in the step 4) comprises the following steps:
a) defining virtual multithreading code, wherein basic elements of the virtual multithreading are as follows:
wait element: representing dependent objects in a clock data dependency graph; namely, the dependency relationship a → b, where a is the dependency object of b;
notify elements: representing depended objects in a clock data dependency graph; namely, the dependency relationship a → b is the depended object of a;
the transactions element: a computation portion representing a single thread in virtual multithreading; the GCC _ graph is obtained by the guard action conversion of the GCC _ graph;
thread element: a single thread representing a virtual multithread; the thread is composed of a serial execution sequence index value, a thread index value, a dependent object set, a thread computing part and a dependent object set;
b) generating a virtual multithread code, wherein the virtual multithread is divided into an Init module, a Main module and a thread group module and corresponds to three conversion rules in a conversion program;
first, the GCC _ graph program is converted into the virtual multithreading code VirtualMT, and then three modules are processed separately: the system comprises a thread group module, a Main module and an Init module;
secondly, the conversion rules for generating three different modules from the GCC _ graph are:
conversion rule 1 initial clock of GCC _ graph
Figure FDA0002850270150000091
Converting the delay action into an Init module, initializing the delay action, and recording the delay action as a printVirtualInitializationModule module;
conversion rule 2. the defensive action declaration and calling information of GCC _ graph are converted into Main module: creating a new thread call in the Main module, and recording the new thread call as a createNewThread module;
converting the GCC _ graph program into a Main module, wherein the GCC _ graph program comprises a new thread creating module, an Init calling module and a thread group calling module which are recorded as a printVirtualMainModule module;
transformation rules 3.GCC _ graph's defended action set transformation into thread group Module, comprising
waittoInt, waittoStr submodule: the method comprises the steps of obtaining a thread index value corresponding to a dependent object;
notifytoInt, notifytoStr submodule: acquiring a thread index value corresponding to a depended object;
addwaitthreadbody submodule: adding a wait module for the thread, namely information depended by the thread;
addTofytoThreadModule: adding a notify module to the thread, namely the thread is depended on information;
handleThreadGroup submodule: converting the defend type action set into a thread group; adding a thread index value to each thread, and then converting the defensive action into a calculation part of the thread;
partitionResulttoVirtualMultiThread submodule: dividing the GCC _ graph program into threads according to the division result partitionResult; a serial execution order index value is computed and then the thread group is processed.
5. The multitask compiling method based on the calculation of the graphic satellite command according to claim 4, wherein: the specific content of the method for converting the virtual multithreading code into the executable multithreading Ada/C code in the step 5) is as follows:
6.1) automatic generation of executable multitask Ada code:
conversion rule 1. generating a header file:
generating library units of the ads file and the adb file in the executable Ada code, namely, reserving contents behind the words with and use, and recording the library units as a getAdHeadFile function;
and 2, converting rule 2.Wait/notify generates an entry function and a function call in an accept function:
getattaskentry _ Call function: generating function calls in an entry function entry () and an execution function accept () in a single task statement in Ada; converting an input parameter of a task in VirtualMT and a data transmission function in a pipeline mode into entry () and a corresponding parameter in Ada; determining the number of entry () by tasks contained in the wait information, and converting notify into function call in an accept function;
converting all variables in the Init module and the thread group module into Ada variable statements, generating all variable statements related to Ada, initializing corresponding variables, converting the variables in the VirtualMT into Ada variables used in the structures of procedure, task and the like in a one-to-one correspondence manner, and simultaneously assigning the Init module information of the VirtualMT to the corresponding Ada variables which are recorded as getAda variables functions;
conversion rule 4. all threads of the thread group module are converted into corresponding Task in Ada:
getAdaPackage module: generating package declarations and package main structures corresponding to the GCC _ graph in the ads file and the adb file respectively;
getadataskaaccept module: generating specific calculation of an execution function accept () in a single taskbody in Ada, and converting a calculation part of a corresponding task in VirtualMT into an execution operation in the accept ();
getExecutable RightBraneIndex module: generating all indents in the ads file and the adb file, ensuring a hierarchical structure and improving the readability of the generated code;
getattask module: generating a single task in the Ada, wherein the single task comprises three parts of a temporary variable statement, an entry function () and an execution function accept ();
getatatasks module: generating all tasks in the Package, converting a thread group module of VirtualMT into corresponding tasks in Ada, and generating all tasks in an iterative mode;
getAdaInputFunction module: generating an input function capable of executing Ada codes, adding a read file operation according to the input action of GCC _ graph, and reading a signal variable from an input file, wherein '' indicates that a signal is in a missing state;
getaaoutputfunction module: generating an output function capable of executing Ada codes, increasing the operation of writing in a file according to the output action of the GCC _ graph, and taking charge of writing a calculation result in an output file;
and 5, converting the Main module into a Main function procedure:
getAdaCreateTask module: declaring tasks to be used, converting the tasks in VirtualMT into task declarations in Ada codes so as to be called later;
getAdaProcedure module: generating a main function part in an executable Ada code, and converting a main function module in the VirtualMT into a procedure for creating and calling a task;
6.2) executable multitask C code automatic generation:
conversion rule 1. header file generation:
getExecutable HeadFile module: generating executable C code header file declarations including stdio.h and pthread.h;
conversion rule 2. define the mutex function according to wait/notify, including
getExecutable structCounter function: for generating mutex structure definitions in executable C code;
getExecutableStructWaitNotify function: the method comprises the steps that C code implementation is used for generating a wait/notify mechanism, and a wait () function and a notify () function are respectively arranged in a target C code;
transformation rules 3. declare variables, including
getExecutable WaitNotification 2 CounterReclaration module: generating a variable statement corresponding to the mutex;
getExecutable declaration module: generating an executable C code declaration for the signal variable;
getExecutable ClockClassDesclaration Module: generating a variable statement corresponding to a clock in the GAC;
transformation rules 4. initialization of variables, including
printwaitnotifexenutableinit module: initializing mutex assignment;
printdelayof executableinit module: initializing a delay action assignment;
printmasterclockofexecuteinit module: initializing a main clock assignment;
getExecutable InitModule module: generating an executable C code corresponding to the Inin module, wherein the executable C code comprises an initialization main clock, an initialization delay action and an initialization mutex;
converting rule 5, generating a task group;
getScourceType Module: acquiring the type of a signal variable in a source GAC and converting the type into a type corresponding to a target executable C code; the basic data type is converted into Integer → int, Char → Char, Boolean → enumBoolean { FALSE, TRUE }, String → Char;
printexecutables wait module: processing threads depended by the threads, and converting the dependency relationship between the threads depended by the threads into corresponding wait () functions;
printexecutablnotify module: processing threads on which the threads depend, and converting the dependency relationship between the threads and the threads which are depended into corresponding notify () functions;
getExecutable ThreadModule: the computing part of the processing thread converts the defensive action into an executable C code which completes the computing function;
getExecutable RightBraneIndex module: processing the indentation problem of the generated code, and making the generated code obvious in hierarchy by using different indentation values;
getExecutable SingleThread module: generating a single executable C thread, including a dependent thread, a computing portion, a dependent thread, and an indentation problem of a processing thread;
getExecutable ThreadGroupModule module: generating an executable C code corresponding to the thread group module, and sequentially generating each executable C thread;
and 6, generating a Main function:
gettpthreadcreate module: thread creation, corresponding to pthread _ create in POSIX;
gettpthreadjoin module: calling a thread to be executed, wherein the thread to be executed is called and corresponds to pthread _ join in POSIX;
getExecutable MainModule: and generating executable C codes corresponding to the Main module, wherein the executable C codes comprise initialization calling, thread creation and thread calling.
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