CN108304057A - A kind of merging power supply circuit applied to ARM system - Google Patents
A kind of merging power supply circuit applied to ARM system Download PDFInfo
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- CN108304057A CN108304057A CN201710931227.1A CN201710931227A CN108304057A CN 108304057 A CN108304057 A CN 108304057A CN 201710931227 A CN201710931227 A CN 201710931227A CN 108304057 A CN108304057 A CN 108304057A
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- pins
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- power supply
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
Abstract
The present invention provides a kind of merging power supply circuit applied to ARM system, belongs to ARM system technical field, including:Circulate always direct current transducer, for powering simultaneously to state central processing unit and described image processor;The DC to DC converter includes:Input terminal connects input voltage;Control terminal stops for controlling high level power supply and low electricity;Output end, for providing an output voltage simultaneously for the central processing unit and described image processor;Signal input part, the signal input part is for receiving control signal;Feedback end;Signal Regulation end, the Signal Regulation is for being adjusted the control signal.Beneficial effects of the present invention:Separated powering mode compared with prior art, saves a power supply circuit, reduces power consumption and system cost, simplifies system design scheme, more spaces can be saved on pcb board, design more flexible, one PWM I/O port of saving, it is only necessary to which a PWM IO is controlled.
Description
Technical field
The present invention relates to ARM system technical field more particularly to a kind of merging power supply circuits applied to ARM system.
Background technology
The central processing unit (Central Processing Unit, CPU) and graphics processor of ARM system
(Graphical Processing Unit, GPU) is in the system on chip (system on chip, SOC) of consumer electronics
Using more and more, such as:CPU has Cortex-A5, Cortex-A7, Cortex-A53, Cortex-A73, Cortex-A72
Deng;GPU has Mali-T830, Mali-T820, Mali-450MP2, Mali- 450MP3, Mali-450MP4 etc..
In order to give full play to the performance of ARM system CPU and GPU, industry is all to utilize DVFS methods at present, to CPU and
Individual DC-DC power source is respectively adopted to supply in GPU, and different frequencies is supplied using different voltage.For example, for master
The middle and high end ARM system of stream --- 4 core Cortex-A53CPU+Mali-450MP3GPU:
1 CPU theoretical works frequency of table and operating voltage correspond to table
2 GPU theoretical works frequency of table and operating voltage correspond to table
Wherein, the power supply control of CPU and GPU is controlled to GPIODV_28 (PD) and GPIODV_29 (PD) by software
System adjusts GPIODV_28 (PD) VCCK_PWM_D and GPIODV_29 (PD) VDDEE_PWM_ under different scenes and pattern
The duty ratio of B adjusts the feedback voltage FB of DC-DC, to realizing that different operating frequency is operated in different voltages value, uses
The mode weakness is greatly to occupy system software resource.
ARM system is caused to control more complex, bill of materials CPU and GPU power supplies respectively using individual power supply circuit
(Bill of Materials, BOM) cost is higher, remaining space is less, design is dumb, Overall Power Consumption is larger on PCB plates
Deng.
Invention content
For problems of the prior art, the present invention provides a kind of power supply circuits of simplified CPU and GPU, reduce
The merging power supply circuit applied to ARM system of system cost and design difficulty.The present invention adopts the following technical scheme that:
A kind of merging power supply circuit applied to ARM system, the ARM system includes central processing unit and image procossing
Device, the merging power supply circuit include:
Circulate always direct current transducer, and the DC to DC converter is used for while being described in the ARM system
Central processing unit and the power supply of described image processor;The DC to DC converter includes:
One input terminal, the input terminal connect an input voltage;
One control terminal, the control terminal are the center for controlling the DC to DC converter in high level
Processor and the power supply of described image processor, and stop power supply in low level;
One output end, the output end connects the central processing unit and described image processor, the output end are used for
An output voltage is provided for the central processing unit and described image processor simultaneously;
One signal input part, the signal input part for receive control signal, the DC to DC converter according to
The control signal is by adjusting output voltage described in duty ratio dynamic regulation;
One feedback end, the feedback end is for adjusting the output voltage by feedback resistance;
One Signal Regulation end, the Signal Regulation are used to that adjusting central processing unit to be adjusted to the control signal defeated
Output voltage described in the duty ratio dynamic regulation of the digital signal gone out.
Preferably, the DC to DC converter is SY8120B1ABC.
Preferably, the SY8120B1ABC includes an IN pins, an EN pins, a GND pin, a LX pins, a BS
Pin, a BS pins and a FB pins;
The IN pins connect the input terminal;
The EN pins connect the control terminal;
The GND pin ground connection;
The LX pins connect the output end;
The FB pins connect the feedback end, the signal input part and the Signal Regulation end.
Preferably, the IN pins connect multiple first capacitances, and each first capacitance is grounded respectively.
Preferably, a bleeder circuit is connected between the IN pins and the EN pins, the bleeder circuit includes:
First resistor, described first resistor one end connect the IN pins, and the other end connects the EN pins;
Second resistance, described second resistance one end connect the EN pins, other end ground connection.
Preferably, one first inductance and multiple second capacitances are connected between the LX pins and the output end;
First inductance one end connects the LX pins, and the other end connects the output end;
One end of second capacitance connects the output end, other end ground connection.
Preferably, a third capacitance is connected between the BS pins and the LX pins.
Preferably, a feedback circuit is connected between the FB pins and the output end, the feedback circuit includes:
4th capacitance, described 4th capacitance one end connect the FB pins, and the other end connects the output end;
3rd resistor, described 3rd resistor one end connect the FB pins, and the other end connects the output end, and described the
Three resistance are the feedback resistance.
Preferably, a circuit for signal conditioning, the Signal Regulation are connected between the FB pins and the signal input part
End is the circuit for signal conditioning, and the circuit for signal conditioning includes:
4th resistance, the 4th resistance one end connection FB pins, the other end the 5th resistance of connection, the described 4th
Resistance both ends are also respectively connected with the 7th resistance and the 5th capacitance;
5th resistance, described 5th resistance one end connect the 4th resistance, and the other end connects the signal input
End;
6th resistance, described 6th resistance one end connect the Signal Regulation end, and the other end connects above-mentioned central processing unit
To receive the digital signal of above-mentioned central processing unit output;
7th resistance, described 7th resistance one end connect the 4th resistance, other end ground connection;
5th capacitance, described 5th capacitance one end connect the 4th resistance, other end ground connection.
Beneficial effects of the present invention:It uses and merges power supply circuit simultaneously for central processing unit and image processor power supply, together
When ensure the runnability of CPU and GPU, separated powering mode compared with prior art saves a power supply circuit, reduces
Power consumption and system cost simplify system design scheme, and more spaces can be saved on pcb board, and design is more flexible, saves one
A PWM I/O ports, it is only necessary to which PWM IO is controlled.
Description of the drawings
Fig. 1 is in a kind of preferred embodiment of the present invention, and the circuit of the merging power supply circuit applied to ARM system shows
It is intended to.
Specific implementation mode
It should be noted that in the absence of conflict, following technical proposals can be combined with each other between technical characteristic.
The specific implementation mode of the present invention is further described below in conjunction with the accompanying drawings:
As shown in Figure 1, a kind of merging power supply circuit applied to ARM system, above-mentioned ARM system includes central processing unit
And image processor, above-mentioned merging power supply circuit include:
Circulate always direct current transducer, and above-mentioned DC to DC converter is used for while being above-mentioned in above-mentioned ARM system
Central processing unit and the power supply of above-mentioned image processor;Above-mentioned DC to DC converter includes:
One input terminal (AO-5V), above-mentioned input terminal connect an input voltage;
One control terminal, above-mentioned control terminal are above-mentioned center for controlling above-mentioned DC to DC converter in high level
Processor and the power supply of above-mentioned image processor, and stop power supply in low level;
One output end (CPU&GPU), above-mentioned output end connects above-mentioned central processing unit and above-mentioned image processor, above-mentioned
Output end is used to provide an output voltage simultaneously for above-mentioned central processing unit and above-mentioned image processor;
One signal input part (VDDEE-PWM-B), above-mentioned signal input part turn for receiving control signal, above-mentioned direct current
Direct current transducer is according to above-mentioned control signal by adjusting the above-mentioned output voltage of duty ratio dynamic regulation;
One feedback end, above-mentioned feedback end is for adjusting above-mentioned output voltage by feedback resistance;
One Signal Regulation end (CPU&GPU-PWM), above-mentioned Signal Regulation are used to adjust the number letter of central processing unit output
The above-mentioned output voltage of duty ratio dynamic regulation of number (PWM of CPU).
In the present embodiment, the BOM costs for reducing system are reduced to 1 DC-DC scheme by 2 DC-DC schemes, section
The left sides about 1RMB are because reduce a DC-DC and subsidiary circuit devcie (power inductance, capacitance, resistance etc.), energy on pcb board
More spaces are saved, design is more flexible;A PWM I/O port is saved, two DC-DC schemes need 2 PWM IO controls
Dynamic pressure regulation saves as a DC-DC scheme, it is only necessary to which a PWM IO is controlled.
Merge ARM CPU&GPU power supply modes, when using fixed voltage (such as 1.07V to supply), while by CPU and
The frequency and supply voltage relation of the supply of GPU becomes:
3 CPU actual operating frequencies of table and operating voltage correspond to table
4 GPU actual operating frequencies of table and operating voltage correspond to table
Test result is as follows for CPU and GPU points of power consumptions (mW) for opening and merging different test scenes of comparison:
5 CPU and GPU points of power consumption tables for opening power supply of table
Table 6 CPU and GPU merge the power consumption table of power supply
By table 5 and 6 it is found that power consumption when merging the power consumption after power supply and separately power supply is less.
In preferred embodiment, above-mentioned DC to DC converter is SY8120B1ABC.
In preferred embodiment, above-mentioned SY8120B1ABC draws including an IN pins, an EN pins, a GND pin, a LX
Foot, a BS pins, a BS pins and a FB pins;
Above-mentioned IN pins connect above-mentioned input terminal;
Above-mentioned EN pins connect above-mentioned control terminal;
Above-mentioned GND pin ground connection;
Above-mentioned LX pins connect above-mentioned output end;
Above-mentioned FB pins connect above-mentioned feedback end, above-mentioned signal input part and above-mentioned Signal Regulation end.
In preferred embodiment, above-mentioned IN pins connect multiple first capacitances, and each above-mentioned first capacitance is grounded respectively.
In the present embodiment, as shown in Figure 1, using two the first capacitance C0805, corresponding parameter is 10uF_16V.
In preferred embodiment, a bleeder circuit is connected between above-mentioned IN pins and above-mentioned EN pins, above-mentioned control terminal is
Above-mentioned bleeder circuit, and above-mentioned bleeder circuit includes:
First resistor, above-mentioned first resistor one end connect above-mentioned IN pins, and the other end connects above-mentioned EN pins;
Second resistance, above-mentioned second resistance one end connect above-mentioned EN pins, other end ground connection.
In the present embodiment, as shown in Figure 1, using a first resistor R0402, corresponding parameter is 10K, using one
A second resistance R0402, corresponding parameter are NC/10K.
One first inductance and multiple second electricity are connected in preferred embodiment, between above-mentioned LX pins and above-mentioned output end
Hold;
Above-mentioned first inductance one end connects above-mentioned LX pins, and the other end connects above-mentioned output end;
One end of above-mentioned second capacitance connects above-mentioned output end, other end ground connection.
In the present embodiment, as shown in Figure 1, using a first inductance L5050, corresponding parameter is 2.2uH_2A, is adopted
With two the second capacitance C0805, corresponding parameter is 22uF_6.3V.
In preferred embodiment, a third capacitance is connected between above-mentioned BS pins and above-mentioned LX pins.
In the present embodiment, as shown in Figure 1, using a third capacitance C0402, corresponding parameter is 22uF.
In preferred embodiment, a feedback circuit is connected between above-mentioned FB pins and above-mentioned output end, above-mentioned feedback end is
Above-mentioned feedback circuit, and above-mentioned feedback circuit includes:
4th capacitance, above-mentioned 4th capacitance one end connect above-mentioned FB pins, and the other end connects above-mentioned output end;
3rd resistor, above-mentioned 3rd resistor one end connect above-mentioned FB pins, and the other end connects above-mentioned output end, and above-mentioned the
Three resistance are above-mentioned feedback resistance.
In the present embodiment, as shown in Figure 1, using a 4th capacitance C0402, corresponding parameter is 27pF_6.3V,
Using a 3rd resistor R0402, corresponding parameter is 100K_1%.
In preferred embodiment, a circuit for signal conditioning is connected between above-mentioned FB pins and above-mentioned signal input part, it is above-mentioned
Signal Regulation end is above-mentioned circuit for signal conditioning, and above-mentioned circuit for signal conditioning includes:
4th resistance, the above-mentioned FB pins of above-mentioned 4th resistance one end connection, the other end the 5th resistance of connection, the above-mentioned 4th
Resistance both ends are also respectively connected with the 7th resistance and the 5th capacitance;
Above-mentioned 5th resistance, above-mentioned 5th resistance one end connect above-mentioned 4th resistance, and the other end connects above-mentioned signal input
End;
6th resistance, above-mentioned 6th resistance one end connect above-mentioned Signal Regulation end, and the other end connects above-mentioned central processing unit
To receive the digital signal of above-mentioned central processing unit output;
7th resistance, above-mentioned 7th resistance one end connect above-mentioned 4th resistance, other end ground connection;
5th capacitance, above-mentioned 5th capacitance one end connect above-mentioned 4th resistance, other end ground connection.
In the present embodiment, as shown in Figure 1, using a 4th resistance R0402, corresponding parameter is 1M_1%, is used
One the 5th resistance R0402, corresponding parameter are 100K_1%, and using one the 6th resistance R0402, corresponding parameter is 10K, is adopted
With one the 7th resistance R0402, corresponding parameter is 120K_1%, and using one the 5th capacitance C0402, corresponding parameter is 1nF.
By description and accompanying drawings, the exemplary embodiments of the specific structure of specific implementation mode are given, based on present invention essence
God can also make other conversions.Although foregoing invention proposes existing preferred embodiment, however, these contents are not intended as
Limitation.
For a person skilled in the art, after reading above description, various changes and modifications undoubtedly will be aobvious and easy
See.Therefore, appended claims should regard the whole variations and modifications for covering the true intention and range of the present invention as.
The range and content of any and all equivalences in Claims scope, are all considered as still belonging to the intent and scope of the present invention
It is interior.
Claims (9)
1. a kind of merging power supply circuit applied to ARM system, the ARM system includes central processing unit and image processor,
It is characterized in that, the merging power supply circuit includes:
Circulate always direct current transducer, and the DC to DC converter is used for while being the central processing unit and described image
Processor is powered;The DC to DC converter includes:
One input terminal, the input terminal connect an input voltage;
One control terminal, the control terminal are the central processing unit for controlling the DC to DC converter in high level
It powers with described image processor, and stops power supply in low level;
One output end, the output end connect the central processing unit and described image processor, and the output end is used for as institute
It states central processing unit and described image processor while an output voltage being provided;
One signal input part, the signal input part is for receiving control signal, and the DC to DC converter is according to
Signal is controlled by adjusting output voltage described in duty ratio dynamic regulation;
One feedback end, the feedback end is for adjusting the output voltage by feedback resistance;
One Signal Regulation end, the duty ratio that the Signal Regulation end is used for the digital signal by adjusting central processing unit output are dynamic
State adjusts the output voltage.
2. merging power supply circuit according to claim 1, which is characterized in that the DC to DC converter is
SY8120B1ABC。
3. merging power supply circuit according to claim 2, which is characterized in that the SY8120B1ABC include an IN pins,
One EN pins, a GND pin, a LX pins, a BS pins, a BS pins and a FB pins;
The IN pins connect the input terminal;
The EN pins connect the control terminal;
The END pins ground connection;
The LX pins connect the output end;
The FB pins connect the feedback end, the signal input part and the Signal Regulation end.
4. merging power supply circuit according to claim 3, which is characterized in that the IN pins connect multiple first capacitances,
Each first capacitance is grounded respectively.
5. merging power supply circuit according to claim 3, which is characterized in that connect between the IN pins and the EN pins
A bleeder circuit is connect, the control terminal is the bleeder circuit, and the bleeder circuit includes:
First resistor, described first resistor one end connect the IN pins, and the other end connects the EN pins;
Second resistance, described second resistance one end connect the EN pins, other end ground connection.
6. merging power supply circuit according to claim 3, which is characterized in that connect between the LX pins and the output end
Connect one first inductance and multiple second capacitances;
First inductance one end connects the LX pins, and the other end connects the output end;
One end of second capacitance connects the output end, other end ground connection.
7. merging power supply circuit according to claim 3, which is characterized in that connect between the BS pins and the LX pins
Connect a third capacitance.
8. merging power supply circuit according to claim 3, which is characterized in that connect between the FB pins and the output end
A feedback circuit is connect, the feedback end is the feedback circuit, and the feedback circuit includes:
4th capacitance, described 4th capacitance one end connect the FB pins, and the other end connects the output end;
3rd resistor, described 3rd resistor one end connect the FB pins, and the other end connects the output end, the 3rd resistor
For the feedback resistance.
9. merging power supply circuit according to claim 3, which is characterized in that the FB pins and the signal input part it
Between connect a circuit for signal conditioning, the Signal Regulation end is the circuit for signal conditioning, and the circuit for signal conditioning includes:
4th resistance, described 4th resistance one end connect the FB pins, and the other end connects the 5th resistance, the 4th resistance two
End is also respectively connected with the 7th resistance and the 5th capacitance;
5th resistance, described 5th resistance one end connect the 4th resistance, and the other end connects the signal input part;
6th resistance, described 6th resistance one end connect the Signal Regulation end, and the other end connects above-mentioned central processing unit to connect
Receive the digital signal of above-mentioned central processing unit output;
7th resistance, described 7th resistance one end connect the 4th resistance, other end ground connection;
5th capacitance, described 5th capacitance one end connect the 4th resistance, other end ground connection.
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Application publication date: 20180720 |