CN108233930B - Sampling circuit and method - Google Patents
Sampling circuit and method Download PDFInfo
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- CN108233930B CN108233930B CN201711379563.6A CN201711379563A CN108233930B CN 108233930 B CN108233930 B CN 108233930B CN 201711379563 A CN201711379563 A CN 201711379563A CN 108233930 B CN108233930 B CN 108233930B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
Abstract
The invention discloses a sampling circuit and a method, wherein the sampling circuit comprises a first multiplier, a second multiplier, a memory, a filter and an ADC (analog-to-digital converter); the first multiplier is used for carrying out frequency mixing processing on an input signal to obtain a first signal and sending the first signal to a memory; the memory is used for storing the first signal and sending the first signal to the second multiplier; the second multiplier is used for carrying out frequency spectrum shifting processing on the first signal to obtain a second signal and sending the second signal to the filter; the filter is used for filtering the second signal to obtain a third signal and sending the third signal to the ADC; and the ADC is used for carrying out analog-to-digital conversion on the third signal to obtain a sampling sequence. The sampling circuit provided by the invention avoids the problem of hardware cost caused by the increase of the number of sub-bands, can realize sampling without a plurality of channels, and improves the flexibility of sampling.
Description
Technical Field
The present invention relates to the field of circuits, and in particular, to a sampling circuit and method.
Background
The existing sampling circuit is composed of a plurality of channels, each of which is composed of a mixer, a low-pass filter, and an ADC. Under the condition that the number of sub-bands contained in the signal is small, the hardware implementation cost of the sampling circuit is low, the signal sampling task can be well completed, and when the number of sub-bands contained in the input signal is large, a lot of problems can be caused. First, it leads to an increase in hardware cost; secondly, the problems of heat dissipation, electromagnetic compatibility and the like need to be considered more thoroughly in hardware circuit design, so that the difficulty of circuit design is increased; in addition, the conventional multi-channel sampling circuit has poor structural flexibility, and when the number of sub-bands contained in an input signal is increased or decreased, the number of sampling channels needs to be correspondingly increased or decreased, so that the applicable scenes and the applicable range of the sampling circuit are reduced.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a sampling circuit and a sampling method, which avoid the problem of hardware cost caused by the increase of the number of sub-bands, can realize sampling and output of a multi-path sampling sequence only by one sampling channel, improve the sampling flexibility and have a better application range.
According to an aspect of the present invention, there is provided a sampling circuit including a first multiplier, a second multiplier, a memory, a filter, and an ADC;
the first multiplier is used for carrying out frequency mixing processing on an input signal to obtain a first signal and sending the first signal to the memory;
the memory is used for storing the first signal and sending the first signal to the second multiplier;
the second multiplier is used for carrying out frequency spectrum shifting processing on the first signal to obtain a second signal and sending the second signal to the filter;
the filter is used for filtering the second signal to obtain a third signal and sending the third signal to the ADC;
and the ADC is used for carrying out analog-to-digital conversion on the third signal to obtain a sampling sequence.
Further, in the above technical solution, the first multiplier is configured to mix the input signal in real time to obtain a first signal, and the memory is configured to store the first signal from the first multiplier in real time.
Further, the memory sends the stored first signal to the second multiplier integrally in each period by taking the time T as the period; the second multiplier performs spectrum shifting processing in each period, wherein in each period, the second multiplier selects a frequency range and shifts the first signal in the selected frequency range to a target frequency range.
Further, according to the sampling circuit of the present invention, when spectrum shifting is performed in a plurality of cycles, the second multiplier preferentially selects a frequency range closer to the baseband frequency in the order from near to far from the baseband frequency in frequency; when the frequency spectrum is shifted, shifting the first signal in the selected frequency range towards the baseband frequency; the filter is a low pass filter.
Further, the memory is connected with the second multiplier through a timing switch; the timing switch is turned on once at the beginning of each period; in each period, the second multiplier carries out frequency spectrum shifting on the first mixing signal received in the current period; the ADC is configured to sample, in each period, a third signal obtained by filtering in a current period with the filter, to obtain a sampling sequence.
Further, the first multiplier performs the mixing process by multiplying the input signal by a mixing function.
Further, the sampling frequency of the ADC is greater than or equal to the mixing frequency.
According to another aspect of the present invention, there is provided a signal sampling method, including;
carrying out frequency mixing processing on an input signal to obtain a first signal, and sending the first signal to a memory for storage;
in each cycle, the first signal stored by the memory is processed as follows: and carrying out frequency spectrum shifting processing on the stored first signal to obtain a second signal, filtering the second signal to obtain a third signal, and carrying out analog-to-digital conversion on the third signal to obtain a sampling sequence.
When the stored first signal is subjected to spectrum shifting processing to obtain a second signal, a frequency range is selected in each period, and the first signal in the selected frequency range is shifted to a target frequency range.
Optionally, in the multiple periods, a frequency range closer to the baseband frequency is preferentially selected according to a sequence from near to far away from the baseband frequency in frequency; when the frequency spectrum is shifted, shifting the first signal in the selected frequency range towards the baseband frequency; the filtering of the second signal is a low pass filtering.
By means of the technical scheme of the invention:
(1) the first signal of the input signal after being mixed for only once is stored in the memory for repeated use, and the problem that the signals after being mixed of each channel in the multi-channel sampling circuit have different transient states is solved.
(2) The invention can output multi-channel sampling signals through the single-channel sampling circuit, compared with the traditional multi-channel sampling circuit, the sampling circuit greatly reduces the cost and the design complexity of a hardware circuit, and the sampling circuit provided by the invention is not limited to multi-channel design on a physical structure, so that the sampling circuit can be applied to various application scenes and has better flexibility and wider applicability;
(3) the first signal in the selected frequency range is shifted towards the baseband frequency by the spectrum shifting signal, so that the sampling rate of the ADC is still the same as that of the ADC in the multi-channel sampling circuit, and the sampling rate of the ADC is not increased.
Drawings
Fig. 1 is a diagram of a sampling circuit according to an embodiment of the present invention.
Detailed Description
The following embodiments are merely examples for illustrating the technical solutions of the present invention more clearly, and therefore, the technical solutions of the present invention are not limited to the following embodiments.
Fig. 1 is a diagram of a sampling circuit according to an embodiment of the present invention.
With reference to fig. 1, a sampling circuit includes a first multiplier 101, a second multiplier 106, a memory 102, a low-pass filter 104, and an ADC 105;
the first multiplier 101 is configured to perform frequency mixing processing on an input signal x (t) to obtain a first signal z (t), and send the first signal z (t) to the memory 102;
the memory 102 is configured to store the first signal z (t) and send the first signal z (t) to the second multiplier 106;
the second multiplier 106 is configured to perform spectrum shifting processing on the first signal z (t) to obtain a second signal ci (t), and send the second signal ci (t) to the low-pass filter 104;
the low-pass filter 104 is configured to filter the second signal ci (t) to obtain a third signal, and send the third signal to the ADC 105;
the ADC 105 is configured to perform analog-to-digital conversion on the third signal to obtain a sampling sequence yi (n).
Further, in one embodiment, the first multiplier 101 is configured to mix the input signal x (t) in real time and obtain the first signal z (t), that is, the input signal function x (t) is multiplied by the mixing function p (t) in the first multiplier 101 to obtain the first signal z (t), and the memory stores the first signal z (t) from the first multiplier 101 in real time. It is understood that the input signal x (t) is stored in the memory 102 after being mixed once, and can be used repeatedly.
Further, according to the sampling circuit of the embodiment of the present invention, with the time T as a period, the memory 102 sends the stored first signal z (T) to the second multiplier 106 in its entirety in each period; the second multiplier 106 performs the spectrum shifting process in each period, wherein in each period T, the second multiplier 106 selects a frequency range and shifts the first signal z (T) in the selected frequency range to a target frequency range.
Further, according to the sampling circuit of the embodiment of the present invention, when spectrum shifting is performed in a plurality of cycles, the second multiplier 106 preferentially selects a frequency range closer to the baseband frequency according to a sequence from near to far from the baseband frequency in frequency; when the frequency spectrum is shifted, the first signal in the selected frequency range is shifted toward the baseband frequency. For example, the highest frequency of the first signal z (t) is 100HZ, and the baseband frequency range is 0-10HZ, then we can divide the first signal z (t) into 10 frequency bands, 0-10HZ, 10-20HZ, and 90-100 HZ. In each period, the second multiplier 106 can select 1 frequency band, and shift the first signal in the frequency band to the baseband frequency of 0-10 HZ. In one embodiment, the second multiplier 106 may sequentially select the frequency bands 10-20HZ, 20-30HZ, and the. In another embodiment, the second multiplier 106 may also select the frequency band to be shifted in each cycle from the 10 frequency bands in other manners or completely randomly.
Further, in one embodiment, the memory 102 is connected to the second multiplier 106 through the timing switch 103; the timing switch 103 is turned on once at the beginning of each period T; in each period T, the second multiplier 106 performs spectrum shifting on the first signal received in the current period in z (T); after the timing switch T is turned on, the first signal z (T) is multiplied by the spectrum shifting signal qi (T) in the second multiplier to obtain a second signal ci (T), the first signal z (T) in the selected frequency range is shifted to the baseband frequency, and the low-pass filter 104 filters the signal ci (T) shifted to the baseband frequency to obtain a third signal.
It can be understood that, after the timing switch is closed, the first signal z (t) stored in the memory 102 is sent to the second multiplier 106 as a whole, and the second multiplier 106 preferentially selects a frequency range closer to the baseband frequency according to the sequence from near to far from the baseband frequency in frequency, shifts the frequency range to the baseband frequency in turn, and then filters the second signal shifted to the baseband frequency through the low pass filter 104.
The ADC 105 is configured to perform analog-to-digital conversion on the third signal filtered by the low-pass filter 104 in the current period in each period to obtain a sampling sequence y1[ n ].
By analogy with the above technical solution according to the embodiment of the present invention, the first signal z (T) is multiplied by the spectrum shift signal qi (T) at time [ (i-1) T, iT ] (i ═ 1,2, …, k) to obtain the second signal ci (T), and the second signal ci (T) is filtered by the low-pass filter 104 and analog-to-digital converted by the ADC 105 to obtain the sample sequence yi [ n ].
According to an embodiment of the invention, a signal sampling method is also provided.
The signal sampling method according to the present invention includes;
carrying out frequency mixing processing on an input signal to obtain a first signal, and sending the first signal to a memory for storage;
in each cycle, the first signal stored by the memory is processed as follows: (1) carrying out spectrum shift processing on the stored first signal to obtain a second signal, (2) filtering the second signal to obtain a third signal, and (3) carrying out analog-to-digital conversion on the third signal to obtain a sampling sequence.
When the stored first signal is subjected to spectrum shifting processing to obtain a second signal, a frequency range is selected in each period, and the first signal in the selected frequency range is shifted to a target frequency range.
Optionally, in the multiple periods, a frequency range closer to the baseband frequency is preferentially selected according to a sequence from near to far away from the baseband frequency in frequency; when the frequency spectrum is shifted, shifting the first signal in the selected frequency range towards the baseband frequency; the filtering of the second signal is a low pass filtering.
The frequency domain of the input signal of the sampling circuit and the frequency domain of the signal reconstruction after sampling are analyzed by combining Fourier transform and correlation matrix knowledge as follows:
multiplying the input signal x (t) by the mixing function p (t) to obtain a mixing signal z (t), chRepresenting the fourier series coefficients, fp is the mixing frequency, which fourier transform is:
multiplication of the mixing signal z (t) with qi (t) yields the signal ci (t), which is expressed in the time domain as
Its fourier transform is:
after low-pass filtering and sampling, obtaining discrete sampling values yi [ n ], assuming that the frequency response of the low-pass filter is an ideal rectangular function, defining a sampling frequency interval:
the sample sequence contains only spectral sample values lying in the frequency interval Fs. Thus, the Discrete Time Fourier Transform (DTFT) of the sample sequence yi [ n ] is:
wherein fnyq represents the nyquist frequency, h0 represents that the highest frequency fnyq/2 of x (F) is shifted by h0 times by fp as the shift unit length to just fall on the baseband frequency interval F0, but is shifted by h0+1 times to exceed the frequency interval F0, that is:
(4) in the formula (I), the compound is shown in the specification,
and chIt can be calculated that only x (f) is unknown, and thus equation (3) is key to the reconstruction of signal x (t). For convenience, equation (3) is written as the following matrix form:
y(f)＝Az(f) (6)
where y (f) is a vector of length k +1, term i
z (f) is a vector of length H2H 0+1 with the i term:
i is more than or equal to 0 and less than or equal to H-1. Order to
Then:
A＝[C0,...,Ck-1]T(8)
further, the formula (6) can be expanded into the following matrix form:
fourier series coefficient c of mixing function p (t)hThe calculations of (a) are known to those skilled in the art and are not described in detail herein.
In summary, the first signal of the input signal after being mixed for only one time is stored in the memory for repeated use, so that the problem that the mixed signals of each channel in the multi-channel sampling circuit have different transient states is solved; shifting the first signal in the selected frequency range towards the baseband frequency through the spectrum shifting signal, so that the sampling rate of the ADC is still the same as that of the ADC in the multi-channel sampling circuit, and the sampling rate of the ADC is not increased; compared with a multi-channel sampling rate, the sampling circuit greatly reduces the cost and the design complexity of a hardware circuit.
In the description of the present invention, numerous specific details are set forth. It is understood, however, that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention, and they should be construed as being included in the following claims and description.
Claims (8)
1. A sampling circuit is characterized by comprising a first multiplier, a second multiplier, a memory, a filter and an ADC;
the first multiplier is used for carrying out frequency mixing processing on an input signal to obtain a first signal and sending the first signal to the memory;
the memory is used for storing a first signal and sending the first signal to the second multiplier;
the second multiplier is used for carrying out spectrum shifting processing on the first signal to obtain a second signal and sending the second signal to the filter;
the filter is used for filtering the second signal to obtain a third signal and sending the third signal to the ADC;
the ADC is used for carrying out analog-to-digital conversion on the third signal to obtain a sampling sequence;
the memory sends the stored first signal to the second multiplier in a whole manner in each period by taking time T as a period; and the second multiplier carries out spectrum shifting processing in each period, wherein in each period, the second multiplier selects a frequency range and shifts the first signal in the selected frequency range to a target frequency range.
2. The sampling circuit of claim 1, wherein the first multiplier is configured to mix the input signal in real time and obtain a first signal, and wherein the memory is configured to store the first signal from the first multiplier in real time.
3. The sampling circuit according to claim 1, wherein when spectrum shifting is performed in a plurality of cycles, the second multiplier preferentially selects a frequency range closer to the baseband frequency in the order from near to far from the baseband frequency in frequency; when the frequency spectrum is shifted, shifting the first signal in the selected frequency range towards the baseband frequency; the filter is a low pass filter.
4. The sampling circuit of claim 1, wherein the memory and the second multiplier are connected by a timing switch; the timing switch is turned on once at the beginning of each period; in each period, the second multiplier carries out spectrum shifting on the first signal received in the current period; and the ADC is used for sampling a third signal obtained by filtering through the filter in the current period in each period to obtain a sampling sequence.
5. The sampling circuit of claim 1, wherein the first multiplier performs mixing by multiplying the input signal with a mixing function.
6. The sampling circuit of claim 1, wherein the sampling frequency of the ADC is equal to or greater than a mixing frequency.
7. A method of sampling a signal, comprising:
carrying out frequency mixing processing on an input signal to obtain a first signal, and sending the first signal to a memory for storage;
in each cycle, the first signal stored by the memory is processed as follows: carrying out frequency spectrum shifting processing on the stored first signal to obtain a second signal, filtering the second signal to obtain a third signal, and carrying out analog-to-digital conversion on the third signal to obtain a sampling sequence;
the frequency spectrum shifting processing of the stored first signal to obtain a second signal comprises:
in each period, a frequency range is selected, and the first signal in the selected frequency range is shifted to be in the target frequency range.
8. The signal sampling method according to claim 7, wherein, in a plurality of cycles, a frequency range closer to the baseband frequency is preferentially selected in order of a frequency closer to the baseband frequency from a near to a far from the baseband frequency; when the frequency spectrum is shifted, shifting the first signal in the selected frequency range towards the baseband frequency; the filtering of the second signal is a low pass filtering.
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| US20080146184A1 (en) * | 2006-12-19 | 2008-06-19 | Microtune (Texas), L.P. | Suppression of lo-related interference from tuners |
| CN103516360A (en) * | 2012-06-19 | 2014-01-15 | 英飞凌科技股份有限公司 | System and method for chopping oversampled data converters |
| CN103792549A (en) * | 2013-03-05 | 2014-05-14 | 南京波格微电子有限公司 | Radio frequency receiver of Beidou I satellite navigation system |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050197068A1 (en) * | 2004-03-08 | 2005-09-08 | Gumm Linley F. | Simultaneous ACLR measurement |
| US20080146184A1 (en) * | 2006-12-19 | 2008-06-19 | Microtune (Texas), L.P. | Suppression of lo-related interference from tuners |
| CN103516360A (en) * | 2012-06-19 | 2014-01-15 | 英飞凌科技股份有限公司 | System and method for chopping oversampled data converters |
| CN103792549A (en) * | 2013-03-05 | 2014-05-14 | 南京波格微电子有限公司 | Radio frequency receiver of Beidou I satellite navigation system |
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