CN108228344B - Multi-process memory processing method and device, computer device and readable storage medium - Google Patents
Multi-process memory processing method and device, computer device and readable storage medium Download PDFInfo
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- CN108228344B CN108228344B CN201710725631.3A CN201710725631A CN108228344B CN 108228344 B CN108228344 B CN 108228344B CN 201710725631 A CN201710725631 A CN 201710725631A CN 108228344 B CN108228344 B CN 108228344B
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
Abstract
The invention provides a multi-process memory processing method and device, which are applied to a terminal. The multi-process memory processing method comprises the following steps: determining the activity of each process of the terminal; according to the liveness, pressing each process into a process stack in sequence, wherein the process with the lowest liveness is positioned at the bottom of the stack, and the process with the highest liveness is positioned at the top of the stack; and when a memory processing request is received, performing memory processing on part or all of the processes in the process stack from the stack bottom of the process stack until a preset memory release amount is released. The multiprocess memory processing method provided by the invention introduces a multiprocess memory processing mechanism, and carries out memory processing on the process according to the activity of the process, so that an inactive process memory can be preferentially processed, the process applied by an operating system cannot be automatically recycled, and the memory of the foreground process is ensured to be always stored in a physical memory and not processed, so that the normal operation of the terminal is ensured, and the user experience is improved.
Description
Technical Field
The present invention relates to the field of memory management technologies, and in particular, to a multiprocess memory processing method and apparatus, a computer apparatus, and a readable storage medium.
Background
This section is intended to provide a background or context to the embodiments of the invention that are recited in the claims and the detailed description. The description herein is not admitted to be prior art by inclusion in this section.
In the terminal device, the system memory is very limited due to cost considerations, and when the system is operated under a large load, the system memory is likely to be insufficient. Typically, when there is insufficient memory in the system, the system will reclaim a portion of the memory or compress and move it to the zram area (hereinafter referred to as memory handling), thereby freeing up more physical memory. However, the part of the memory to be processed is discontinuous and disorganized, and is not classified according to the attribution of the processes, that is, the part of the memory to be processed may belong to a single process or a plurality of processes, and the system performs the processing according to the sequence of memory allocation. The disadvantage of this method is that sometimes the process of the operating system application is recycled, which results in the defect that the terminal device cannot normally run, for example, the processed memory may be exactly the memory of the foreground process, which may cause the foreground process being used to be forcibly closed, and the user needs to reload the content of this memory, which results in a great discount on the user experience.
Disclosure of Invention
In view of this, it is desirable to provide a method and an apparatus for processing a multi-process memory, a computer apparatus, and a computer readable storage medium, so as to preferentially process an inactive process memory, to ensure normal operation of a terminal, and to improve user experience.
An aspect of the present invention provides a multiprocess memory processing method, which is applied to a terminal. The multi-process memory processing method comprises the following steps:
determining the activity of each process of the terminal;
according to the liveness, pressing each process into a process stack in sequence, wherein the process with the lowest liveness is positioned at the bottom of the stack, and the process with the highest liveness is positioned at the top of the stack;
and when a memory processing request is received, performing memory processing on part or all of the processes in the process stack from the stack bottom of the process stack until a preset memory release amount is released.
Further, in the method for processing a multi-process memory provided in the embodiment of the present invention, the performing, from the stack bottom of the process stack, memory processing on part or all of the processes in the process stack includes:
and sequentially performing memory processing on part or all processes in the process stack one by one from the stack bottom to the stack top.
Further, in the method for processing a multiprocess memory provided in the embodiment of the present invention, the method for processing a multiprocess memory further includes:
and learning the influence of different memory amounts released for multiple times on the terminal system, and finally determining the optimal memory amount as the preset memory release amount.
Further, in the method for processing a multiprocess memory provided in the embodiment of the present invention, the learning of the influence of releasing different memory amounts for multiple times on the terminal system, and finally determining an optimal memory amount as the predetermined memory release amount specifically includes:
after different memory amounts are released for multiple times, respectively monitoring the frame dropping rate of the system within a preset time threshold, wherein the frame dropping rate is the ratio of the difference between the number of image frames which need to be displayed by the system and the number of image frames which are actually displayed by the system within the preset time threshold to the number of image frames which need to be displayed by the system;
determining system display performance parameters corresponding to each frame dropping rate;
determining a frame dropping rate with a smaller value from the plurality of frame dropping rates, wherein a system display performance parameter corresponding to the frame dropping rate with the smaller value is in a preset reasonable parameter range;
and taking the memory amount corresponding to the frame dropping rate with the smaller value as the preset memory release amount.
Further, in the method for processing a multi-process memory provided in the embodiment of the present invention, the determining the activity level of each process of the terminal includes:
monitoring the use state of each process of the terminal in real time; and
and determining the activity of each process according to the use state of each process.
Further, in the method for processing a multiprocess memory provided in the embodiment of the present invention, the method for processing a multiprocess memory further includes:
updating the activity of each process according to the use state of each process; and
and updating the position of each process in the process stack according to the updated liveness.
The embodiment of the invention also provides a multi-process memory processing device which is applied to the terminal. The multiprocess memory processing device comprises:
the analysis module is used for determining the activity of each process of the terminal;
the sequencing module is used for sequentially pushing each process into the process stack according to the liveness, wherein the process with the lowest liveness is positioned at the bottom of the stack, and the process with the highest liveness is positioned at the top of the stack;
and the memory processing module is used for performing memory processing on part or all of the processes in the process stack from the stack bottom of the process stack until a preset memory release amount is released when a memory processing request is received.
Further, in the multi-process memory processing apparatus provided in the embodiment of the present invention, when the memory processing module performs memory processing on part or all of the processes in the process stack from the stack bottom of the process stack, the memory processing module is specifically configured to:
and sequentially performing memory processing on part or all processes in the process stack one by one from the stack bottom to the stack top.
Further, in the multiprocess memory processing apparatus provided in the embodiment of the present invention, the multiprocess memory processing apparatus further includes a learning module, and the learning module is configured to learn an influence of releasing different memory amounts for multiple times on the terminal system, and finally determine an optimal memory amount as the predetermined memory release amount.
Further, in the multi-process memory processing apparatus provided in the embodiment of the present invention, the learning module is specifically configured to:
after different memory amounts are released for multiple times, respectively monitoring the frame dropping rate of the system within a preset time threshold, wherein the frame dropping rate is the ratio of the difference between the number of frames required to be displayed by the system and the number of image frames actually displayed by the system within the preset time threshold to the number of image frames required to be displayed by the system;
determining system display performance parameters corresponding to each frame dropping rate;
determining a frame dropping rate with a smaller value from the plurality of frame dropping rates, wherein a system display performance parameter corresponding to the frame dropping rate with the smaller value is in a preset reasonable parameter range;
and taking the memory amount corresponding to the frame dropping rate with the smaller value as the preset memory release amount.
Further, in the multiprocess memory processing apparatus provided in the embodiment of the present invention, the multiprocess memory processing apparatus further includes a monitoring module, where the monitoring module is configured to monitor a use state of each process of the terminal in real time; and
the analysis module is specifically used for determining the activity of each process according to the use state of each process.
In another aspect, an embodiment of the present invention further provides a computer apparatus, where the computer apparatus includes a processor, and the processor is configured to implement the steps of any one of the multi-process memory processing methods when executing a computer program stored in a memory.
Yet another aspect of the embodiments of the present invention further provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the steps of any one of the multi-process memory processing methods described above.
The multiprocess memory processing method provided by the invention introduces a multiprocess memory processing mechanism, and carries out memory processing on the process according to the activity of the process, so that an inactive process memory can be preferentially processed, the process applied by an operating system cannot be automatically recycled, and the memory of the foreground process is ensured to be always stored in a physical memory and not processed, so that the normal operation of the terminal is ensured, and the user experience is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a flowchart of a multi-process memory processing method according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a process stack according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of a multiprocess memory processing apparatus according to an embodiment of the present invention.
Fig. 4 is a schematic structural diagram of a terminal according to an embodiment of the present invention.
Description of the main elements
Terminal 1
Multiprocess memory processing device 10
Analysis module 11
Sorting module 12
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
So that the manner in which the above recited objects, features and advantages of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings. In addition, the embodiments and features of the embodiments of the present application may be combined with each other without conflict.
In the following description, numerous specific details are set forth to provide a thorough understanding of the present invention, and the described embodiments are merely a subset of the embodiments of the present invention, rather than a complete embodiment. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
Fig. 1 is a flowchart of a multi-process memory processing method according to an embodiment of the present invention, where the multi-process memory processing method is applied to a terminal. The terminal may be a computer device having a function of running an application, such as a smart phone, a notebook computer, a desktop/tablet computer, and the like. It should be noted that the method for processing a multi-process memory according to the embodiment of the present invention is not limited to the steps and the sequence in the flowchart shown in fig. 1. Steps in the illustrated flowcharts may be added, removed, or changed in order according to various needs.
As shown in fig. 1, the multi-process memory processing method may include the following steps:
It will be appreciated that the activity of a process is related to its usage state, in contrast to processes that have not been used for a long time or are in a dormant state, which are background processes, which have a lower activity, and processes that have been used recently or are in a foreground process which is being used.
In this embodiment, the step 101 specifically includes:
monitoring the use state of each process of the terminal in real time, such as information used by user operation; and
and determining the activity of each process according to the use state of each process.
And step 102, according to the liveness, pressing the processes into a process stack in sequence, wherein the process with the lowest liveness is positioned at the bottom of the stack, and the process with the highest liveness is positioned at the top of the stack.
For example, as shown in FIG. 2, in process stack 51, process 521 at the bottom of the stack represents the least active process, process 522 at the top of the stack represents the most active process, e.g., a foreground application, and process 523 between the bottom and top of the stack represents the last used application.
Specifically, in this embodiment, each process in the process stack may be set to have an activity value, the activity value of the process at the bottom of the stack is 0, and 1 is added to the previous one, and so on, the activity value of the process at the top of the stack is the largest. That is, the larger the value, the more active.
For example, when the system is powered on and a user opens the first App1, the App1 is pushed onto the stack, and there is only one App in the stack, that is, the App1, and the value of the activity of the App1 is 0, and is the largest value in the current stack, that is, the App1 is the most active. When the user returns to the desktop to open the second application APP2, the application APP2 is pushed onto the stack and is above the application APP1, and the activity value of the application APP2 is equal to the activity value of the application APP1 plus 1, i.e. 0+1 is 1, and the application APP2 becomes the most active application. When the user returns to the desktop again to open the third application APP3, the value of the activity of application APP3 is 2, application APP3 becomes the most active application, and application APP1 becomes the least active application, and the activity of application APP2 is between the activity of application APP1 and the activity of application APP 3.
It can be understood that, in this embodiment, the multi-process memory processing method may further include:
updating the activity of each process according to the use state of each process; and
and updating the position of each process in the process stack according to the updated liveness.
In the present invention, the memory processing includes but is not limited to: memory is reclaimed by killing processes, Memory is monitored by cgroup (control groups), use of reclamation is stopped by freezing processes, Memory is reclaimed by kswapd, Memory is processed by compressing to zram, and Memory is merged by KSM (Kernel Shared Memory or same page Memory Merging). Wherein, cgroup is a mechanism provided by the Linux kernel and capable of limiting, recording and isolating physical resources (such as cpu, memory, IO, etc.) used by process groups (process groups), and kswapd is a kernel thread used for page reclamation in Linux.
In this embodiment, the performing, from the stack bottom of the process stack, memory processing on part or all of the processes in the process stack includes:
and sequentially performing memory processing on part or all processes in the process stack one by one from the stack bottom to the stack top.
In this embodiment, the method for processing a multiprocess memory further includes: and learning the influence of different memory amounts released for multiple times on the terminal system, and finally determining the optimal memory amount as the preset memory release amount.
Specifically, the multiprocess memory processing method includes:
after different memory amounts are released for multiple times, respectively monitoring the frame dropping rate of the system within a preset time threshold, wherein the frame dropping rate is the ratio of the difference between the number of image frames which need to be displayed by the system and the number of image frames which are actually displayed by the system within the preset time threshold to the number of image frames which need to be displayed by the system;
determining system display performance parameters corresponding to each frame dropping rate;
determining a frame dropping rate with a smaller value from the plurality of frame dropping rates, wherein a system display performance parameter corresponding to the frame dropping rate with the smaller value is in a preset reasonable parameter range;
and taking the memory amount corresponding to the frame dropping rate with the smaller value as the preset memory release amount.
It will be appreciated that the greater the amount of memory released, the more free the system display will be. However, the released memory amount and the frame dropping rate are in a proportional relationship, that is, the more the released memory amount is, the greater the frame dropping rate is, so as to affect the visual effect of the user, and therefore, a reasonable memory release amount needs to be determined as the predetermined memory release amount.
It will be appreciated that the determination of the amount of reasonable memory release is a dynamically adjusting process. For example, an initial amount of memory released may be set, for example, 100M, and the corresponding frame drop rate is monitored, and if the corresponding frame drop rate is 20% when the 300M amount of memory is released for the second time, and the corresponding frame drop rate is 5% when the 200M amount of memory is released for the third time, the amount of memory released may be reduced again in the fourth time until the corresponding frame drop rate is reduced to a reasonable range (for example, 2% to 4%). When the frame dropping rate is reduced to a reasonable range, the released memory amount can be dynamically fine-tuned according to the corresponding system display performance parameters until the frame dropping rate is smaller and the corresponding system display performance parameters are within a preset reasonable parameter range, and finally the memory amount corresponding to the smaller frame dropping rate obtained through dynamic adjustment is used as the preset memory release amount.
The multiprocess memory processing method provided by the invention introduces a multiprocess memory processing mechanism, and carries out memory processing on the process according to the activity of the process, so that an inactive process memory can be preferentially processed, the process applied by an operating system cannot be automatically recycled, and the memory of the foreground process is ensured to be always stored in a physical memory and not processed, so that the normal operation of the terminal is ensured, and the user experience is improved.
Fig. 3 is a schematic structural diagram of a multiprocess memory processing apparatus according to an embodiment of the present invention, where the multiprocess memory processing apparatus is applied to a terminal. The multi-process memory processing apparatus may include one or more modules stored in a memory of the terminal and configured to be executed by one or more processors (one processor in this embodiment) to accomplish the present invention. For example, referring to fig. 3, the multi-process memory processing apparatus 10 may include an analysis module 11, a sorting module 12, a memory processing module 13, a monitoring module 14, and a learning module 15. The modules referred to in the embodiments of the present invention may be program segments that perform a specific function, and are more suitable than programs for describing the execution process of software in a processor.
It is understood that, corresponding to the embodiments of the multi-process memory processing method, the multi-process memory processing apparatus 10 may include some or all of the functional modules shown in fig. 3, and the functions of the modules 11 to 15 will be described in detail below. It should be noted that the same noun and its specific explanation in the above embodiments of the multiprocess memory processing method can also be applied to the following functional descriptions of the modules 11 to 15. For brevity and to avoid repetition, further description is omitted.
The analysis module 11 is configured to determine an activity level of each process of the terminal.
It will be appreciated that the activity of a process is related to its usage state, in contrast to processes that have not been used for a long time or are in a dormant state, which are background processes, which have a lower activity, and processes that have been used recently or are in a foreground process which is being used.
In this embodiment, the monitoring module 14 is configured to monitor the use status of each process of the terminal in real time, for example, information used by a user operation.
The analysis module 11 is specifically configured to determine the activity of each process according to the usage state of each process.
The sorting module 12 is configured to push the processes into the process stack in sequence according to the liveness, where the process with the lowest liveness is located at the bottom of the stack, and the process with the highest liveness is located at the top of the stack.
For example, as shown in FIG. 2, in process stack 51, process 521 at the bottom of the stack represents the least active process, process 522 at the top of the stack represents the most active process, e.g., a foreground application, and process 523 between the bottom and top of the stack represents the last used application.
Specifically, in this embodiment, the sorting module 12 may set an activity value for each process in the process stack, where the activity value of the process at the bottom of the stack is 0, and add 1 to the previous one, and so on, the activity value of the process at the top of the stack is the largest. That is, the larger the value, the more active.
For example, when the system is powered on and a user opens the first App1, the App1 is pushed onto the stack, and there is only one App in the stack, that is, the App1, and the value of the activity of the App1 is 0, and is the largest value in the current stack, that is, the App1 is the most active. When the user returns to the desktop to open the second application APP2, the application APP2 is pushed onto the stack and is above the application APP1, and the activity value of the application APP2 is equal to the activity value of the application APP1 plus 1, i.e. 0+1 is 1, and the application APP2 becomes the most active application. When the user returns to the desktop again to open the third application APP3, the value of the activity of application APP3 is 2, application APP3 becomes the most active application, and application APP1 becomes the least active application, and the activity of application APP2 is between the activity of application APP1 and the activity of application APP 3.
It is understood that, in this embodiment, the analysis module 11 is further configured to update the activity level of each process according to the usage status of each process.
The sorting module 12 may be further configured to update the position of each process in the process stack according to the updated liveness.
The memory processing module 13 is configured to, when receiving a memory processing request, perform memory processing on part or all of the processes in the process stack from the stack bottom of the process stack until a predetermined memory release amount is released.
In the present invention, the memory processing includes but is not limited to: memory is reclaimed by killing processes, Memory is monitored by cgroup (control groups), use of reclamation is stopped by freezing processes, Memory is reclaimed by kswapd, Memory is processed by compressing to zram, and Memory is merged by KSM (Kernel Shared Memory or same page Memory Merging). Wherein, cgroup is a mechanism provided by the Linux kernel and capable of limiting, recording and isolating physical resources (such as cpu, memory, IO, etc.) used by process groups (process groups), and kswapd is a kernel thread used for page reclamation in Linux.
In this embodiment, when the memory processing module performs the memory processing on part or all of the processes in the process stack from the stack bottom of the process stack, the memory processing module is specifically configured to perform the memory processing on the part or all of the processes in the process stack one by one in sequence from the stack bottom to the stack top.
In this embodiment, the learning module 15 is configured to learn the influence of different memory amounts released by multiple memory processing operations on the terminal system, and finally determine an optimal memory amount as the predetermined memory release amount.
In this embodiment, the learning module 15 is specifically configured to:
after different memory amounts are released for multiple times, respectively monitoring the frame dropping rate of the system within a preset time threshold, wherein the frame dropping rate is the ratio of the difference between the number of image frames which need to be displayed by the system and the number of image frames which are actually displayed by the system within the preset time threshold to the number of image frames which need to be displayed by the system;
determining system display performance parameters corresponding to each frame dropping rate;
determining a frame dropping rate with a smaller value from the plurality of frame dropping rates, wherein a system display performance parameter corresponding to the frame dropping rate with the smaller value is in a preset reasonable parameter range;
and taking the memory amount corresponding to the frame dropping rate with the smaller value as the preset memory release amount.
It will be appreciated that the greater the amount of memory released, the more free the system display will be. However, the released memory amount and the frame dropping rate are in a proportional relationship, that is, the more the released memory amount is, the greater the frame dropping rate is, so as to affect the visual effect of the user, and therefore, a reasonable memory release amount needs to be determined as the predetermined memory release amount.
It will be appreciated that the determination of the amount of reasonable memory release is a dynamically adjusting process. For example, an initial amount of memory released may be set, for example, 100M, and the corresponding frame drop rate is monitored, and if the corresponding frame drop rate is 20% when the 300M amount of memory is released for the second time, and the corresponding frame drop rate is 5% when the 200M amount of memory is released for the third time, the amount of memory released may be reduced again in the fourth time until the corresponding frame drop rate is reduced to a reasonable range (for example, 2% to 4%). When the frame dropping rate is reduced to a reasonable range, the released memory amount can be dynamically fine-tuned according to the corresponding system display performance parameters until the frame dropping rate is smaller and the corresponding system display performance parameters are within a preset reasonable parameter range, and finally the memory amount corresponding to the smaller frame dropping rate obtained through dynamic adjustment is used as the preset memory release amount.
The multi-process memory processing device provided by the invention introduces a multi-process memory processing mechanism, and performs memory processing on the process according to the activity of the process, so that an inactive process memory can be preferentially processed, the process applied by an operating system cannot be automatically recycled, and the memory of the foreground process is ensured to be always stored in a physical memory and not processed, so that the normal operation of the terminal is ensured, and the user experience is improved.
An embodiment of the present invention further provides a computer apparatus, including a memory, a processor, and a computer program stored in the memory and capable of running on the processor, where the processor implements the steps of the multiprocess memory processing method described in any of the above embodiments when executing the program.
Fig. 4 is a schematic diagram of a terminal according to an embodiment of the present invention. As shown in fig. 4, the terminal 1 includes: a processor 20, a memory 30, and a computer program 40 (e.g., a multi-process memory handler) stored in the memory 30 and operable on the processor 20. When the processor 20 executes the computer program 40, the steps in each embodiment of the multi-process memory processing method described above are implemented, for example, the steps 101 to 103 shown in fig. 1. The processor 20, when executing the computer program 40, implements the functions of the modules/units, such as the modules 11-15, in the above-described device embodiments.
Illustratively, the computer program 40 may be partitioned into one or more modules/units that are stored in the memory 30 and executed by the processor 20 to implement the present invention. The one or more modules/units may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution of the computer program 40 in the terminal 1. For example, the computer program 40 can be divided into the analysis module 11, the sorting module 12, the memory processing module 13, the monitoring module 14 and the learning module 15 shown in fig. 3, and the specific functions of each of the modules 11 to 15 are described in detail in the foregoing, so that the details are not repeated herein for the sake of brevity and repetition avoidance.
The terminal 1 may be a computer device having an application program running function, such as a smart phone, a notebook computer, a desktop/tablet computer, and a personal digital assistant. It will be appreciated by a person skilled in the art that the schematic diagram 4 is only an example of the terminal 1 and does not constitute a limitation of the terminal 1, and may comprise more or less components than those shown, or some components may be combined, or different components, e.g. the terminal 1 may further comprise input and output devices, network access devices, buses, etc.
The Processor 20 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components, etc. A general-purpose processor may be a microprocessor or the processor 20 may be any conventional processor or the like, and the processor 20 is a control center of the multi-process memory processing apparatus 10/the terminal 1, and various interfaces and lines are used to connect various parts of the whole multi-process memory processing apparatus 10/the terminal 1.
The memory 30 is used for storing the computer program 40 and/or the module/unit, and the processor 20 implements various functions of the multiprocessing memory processing apparatus 10/terminal 1 by running or executing the computer program and/or the module/unit stored in the memory 30 and calling data stored in the memory 30. The memory 30 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application program required by at least one function (such as a sound playing function, an image playing function, etc.), and the like; the storage data area may store data created according to the use of the terminal 1 (such as audio data, a phone book, data set, acquired by applying the above-described multiprocess memory processing method, and the like), and the like. In addition, the memory 30 may include a high speed random access memory, and may also include a non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), at least one magnetic disk storage device, a Flash memory device, or other volatile solid state storage device.
An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the steps of the multi-process memory processing method described in any of the foregoing embodiments.
The modules/units integrated by the multiprocess memory processing device 10/terminal 1/computer device may be stored in a computer readable storage medium if they are implemented in the form of software functional units and sold or used as independent products. Based on such understanding, all or part of the flow in the method according to the above embodiments may be implemented by a computer program, which may be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method embodiments may be implemented. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable storage medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, and the like. It should be noted that the computer readable medium may contain content that is subject to appropriate increase or decrease as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media does not include electrical carrier signals and telecommunications signals as is required by legislation and patent practice.
In the several embodiments provided in the present invention, it should be understood that the disclosed terminal and method can be implemented in other manners. For example, the above-described terminal implementation is only illustrative, and for example, the division of the modules is only one logical function division, and another division may be implemented in practice.
In addition, each functional module in each embodiment of the present invention may be integrated into the same processing module, or each module may exist alone physically, or two or more modules may be integrated into the same module. The integrated module can be realized in a hardware form, and can also be realized in a form of hardware and a software functional module.
It will be evident to those skilled in the art that the embodiments of the present invention are not limited to the details of the foregoing illustrative embodiments, and that the embodiments of the present invention are capable of being embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the embodiments being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned. Furthermore, it is obvious that the word "comprising" does not exclude other elements or steps, and the singular does not exclude the plural. Several units, modules or means recited in the system, apparatus or terminal claims may also be implemented by one and the same unit, module or means in software or hardware. The terms first, second, etc. are used to denote names, but not any particular order.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the embodiments of the present invention and not for limiting, and although the embodiments of the present invention are described in detail with reference to the above preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions can be made on the technical solutions of the embodiments of the present invention without departing from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (7)
1. A multiprocess memory processing method is applied to a terminal, and is characterized in that the multiprocess memory processing method comprises the following steps:
determining the activity of each process of the terminal;
according to the liveness, pressing each process into a process stack in sequence, wherein the process with the lowest liveness is positioned at the bottom of the stack, and the process with the highest liveness is positioned at the top of the stack;
when a memory processing request is received, starting memory processing on part or all of the processes in the process stack from the stack bottom of the process stack until a preset memory release amount is released, including: sequentially performing memory processing on part or all processes in the process stack one by one from the stack bottom to the stack top;
the multi-process memory processing method further comprises the following steps: learning the influence of releasing different memory amounts for multiple times on the terminal system, and finally determining the optimal memory amount as the predetermined memory release amount includes: after different memory amounts are released for multiple times, respectively monitoring the frame dropping rate of the system within a preset time threshold, wherein the frame dropping rate is the ratio of the difference between the number of image frames which need to be displayed by the system and the number of image frames which are actually displayed by the system within the preset time threshold to the number of image frames which need to be displayed by the system; determining system display performance parameters corresponding to each frame dropping rate; determining a frame dropping rate with the minimum value from the plurality of frame dropping rates, wherein the system display performance parameter corresponding to the frame dropping rate with the minimum value is within a preset reasonable parameter range; and taking the memory amount corresponding to the frame dropping rate with the minimum value as the preset memory release amount.
2. The multi-process memory processing method according to claim 1, wherein the determining the activity level of each process of the terminal comprises:
monitoring the use state of each process of the terminal in real time; and
and determining the activity of each process according to the use state of each process.
3. The multiprocess memory processing method according to claim 2, wherein said multiprocess memory processing method further comprises:
updating the activity of each process according to the use state of each process; and
and updating the position of each process in the process stack according to the updated liveness.
4. A multiprocess memory processing device is applied to a terminal, and is characterized in that the multiprocess memory processing device comprises:
the analysis module is used for determining the activity of each process of the terminal;
the sequencing module is used for sequentially pushing each process into the process stack according to the liveness, wherein the process with the lowest liveness is positioned at the bottom of the stack, and the process with the highest liveness is positioned at the top of the stack;
a memory processing module, configured to, when a memory processing request is received, perform memory processing on part or all of the processes in the process stack from the stack bottom of the process stack until a predetermined memory release amount is released, including: sequentially performing memory processing on part or all processes in the process stack one by one from the stack bottom to the stack top;
the multiprocess memory processing apparatus further includes a learning module, where the learning module is configured to learn an influence of multiple releases of different memory amounts on the terminal system, and finally determine an optimal memory amount as the predetermined memory release amount, where the learning module includes: after different memory amounts are released for multiple times, respectively monitoring the frame dropping rate of the system within a preset time threshold, wherein the frame dropping rate is the ratio of the difference between the number of frames required to be displayed by the system and the number of image frames actually displayed by the system within the preset time threshold to the number of image frames required to be displayed by the system; determining system display performance parameters corresponding to each frame dropping rate; determining a frame dropping rate with the minimum value from the plurality of frame dropping rates, wherein the system display performance parameter corresponding to the frame dropping rate with the minimum value is within a preset reasonable parameter range; and taking the memory amount corresponding to the frame dropping rate with the minimum value as the preset memory release amount.
5. The multiprocess memory processing apparatus according to claim 4, wherein the multiprocess memory processing apparatus further comprises a monitoring module, the monitoring module is configured to monitor a use state of each process of the terminal in real time; and
the analysis module is specifically used for determining the activity of each process according to the use state of each process.
6. A computer arrangement, characterized in that the computer arrangement comprises a processor for implementing the steps of the multi-process memory processing method according to any one of claims 1-3 when executing a computer program stored in a memory.
7. A computer-readable storage medium having stored thereon a computer program, characterized in that: the computer program, when being executed by a processor, realizes the steps of the multi-process memory processing method according to any one of claims 1 to 3.
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| CN106648894A (en) * | 2016-12-22 | 2017-05-10 | 惠州Tcl移动通信有限公司 | Memory usage control method and system based on mobile terminal |
| CN109857561B (en) * | 2019-02-12 | 2021-03-26 | 武汉深之度科技有限公司 | Memory management method and computing device |
| CN110008016B (en) * | 2019-04-15 | 2021-06-22 | 深圳市万普拉斯科技有限公司 | Anonymous page management method and device, terminal device and readable storage medium |
| CN110806909A (en) * | 2019-11-01 | 2020-02-18 | 北京金山安全软件有限公司 | Method and device for determining page frame dropping information of application program and electronic equipment |
| CN112286684B (en) * | 2020-10-29 | 2022-08-02 | 苏州浪潮智能科技有限公司 | Memory usage control method, device, equipment and medium |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7636918B2 (en) * | 2004-04-14 | 2009-12-22 | International Business Machines Corporation | Method and system for tracking memory usage by software agents |
| CN102799471A (en) * | 2012-05-25 | 2012-11-28 | 上海斐讯数据通信技术有限公司 | Method and system for process recycling of operating system |
| CN104008061A (en) * | 2013-02-22 | 2014-08-27 | 华为技术有限公司 | Internal memory recovery method and device |
| CN104598315A (en) * | 2014-12-12 | 2015-05-06 | 广州三星通信技术研究有限公司 | Memory managing method, device and terminal |
| CN106528282A (en) * | 2016-09-23 | 2017-03-22 | 依偎科技（南昌）有限公司 | Method, device and terminal for closing process |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040077408A1 (en) * | 2002-10-21 | 2004-04-22 | D'amico Michael H. | Gaming award method and apparatus |
| US9652376B2 (en) * | 2013-01-28 | 2017-05-16 | Radian Memory Systems, Inc. | Cooperative flash memory control |
-
2017
- 2017-08-22 CN CN201710725631.3A patent/CN108228344B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7636918B2 (en) * | 2004-04-14 | 2009-12-22 | International Business Machines Corporation | Method and system for tracking memory usage by software agents |
| CN102799471A (en) * | 2012-05-25 | 2012-11-28 | 上海斐讯数据通信技术有限公司 | Method and system for process recycling of operating system |
| CN104008061A (en) * | 2013-02-22 | 2014-08-27 | 华为技术有限公司 | Internal memory recovery method and device |
| CN104598315A (en) * | 2014-12-12 | 2015-05-06 | 广州三星通信技术研究有限公司 | Memory managing method, device and terminal |
| CN106528282A (en) * | 2016-09-23 | 2017-03-22 | 依偎科技（南昌）有限公司 | Method, device and terminal for closing process |
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