CN108199993B - Synchronous head detection method and device, electronic equipment and readable storage medium - Google Patents

Synchronous head detection method and device, electronic equipment and readable storage medium Download PDF

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CN108199993B
CN108199993B CN201711331522.XA CN201711331522A CN108199993B CN 108199993 B CN108199993 B CN 108199993B CN 201711331522 A CN201711331522 A CN 201711331522A CN 108199993 B CN108199993 B CN 108199993B
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correlation peak
peak value
sequence
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CN108199993A (en
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李思佳
陈沪东
蔡锦恩
方伟
谢国军
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Zhejiang Dahua Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/0014Carrier regulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2614Peak power aspects
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2647Arrangements specific to the receiver only
    • H04L27/2655Synchronisation arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2647Arrangements specific to the receiver only
    • H04L27/2655Synchronisation arrangements
    • H04L27/2656Frame synchronisation, e.g. packet synchronisation, time division duplex [TDD] switching point detection or subframe synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/0014Carrier regulation
    • H04L2027/0024Carrier regulation at the receiver end
    • H04L2027/0026Correction of carrier offset

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

The invention discloses a synchronous head detection method, a synchronous head detection device, electronic equipment and a readable storage medium, wherein the method comprises the following steps: determining a first detection subsequence corresponding to each sampling point in the received sequence to be detected, and determining a correlation peak value according to each first detection subsequence and a local synchronization sequence; if the correlation peak value is not smaller than a preset high threshold value, determining a sampling point corresponding to the correlation peak value as a synchronization head of a sequence to be detected; and if the correlation peak value is smaller than the high threshold value and not smaller than a preset low threshold value, determining a sequence energy value of a first detection subsequence corresponding to the correlation peak value, and determining whether a sampling point corresponding to the correlation peak value is a synchronization head of a sequence to be detected or not according to the sequence energy value and the correlation peak value. The embodiment of the invention can meet the synchronous detection requirements of different modulation frequency deviation ranges.

Description

Synchronous head detection method and device, electronic equipment and readable storage medium
Technical Field
The present invention relates to the field of wireless communication technologies, and in particular, to a method and an apparatus for detecting a synchronization header, an electronic device, and a readable storage medium.
Background
DMR (Digital Mobile Radio) is a european private network wireless communication standard promulgated by the European Telecommunications Standards Institute (ETSI), and the standard employs a frame structure of double-Time-Division Multiple Access (TDMA), as shown in fig. 1, where the TDMA (Time Division Multiple Access) Time base is 30 ms, and includes 27.5 ms of frame data and 2.5 ms of guard interval, where the 27.5 ms of frame data includes 108 symbol bits and 24 synchronization sequences, and the symbol rate is 4.8 kHZ. As can be taken from fig. 1, the slot boundary is determined by the location addr _ sync of the sync head, which can be output by the sync detection module.
In the synchronization header detection method in the prior art, a synchronization detection module of a receiver performs cross-correlation operation on a sequence to be detected and a locally known synchronization symbol sequence, that is, performs point-product operation on corresponding positions of the sequence to be detected and the synchronization symbol sequence, and accumulates and sums to obtain a cross-correlation operation result, finds a correlation peak value according to the cross-correlation operation result, compares the correlation peak value with a preset threshold value, if the correlation peak value is higher than the preset threshold value, considers that a peak value of a symbol signal synchronization condition is found, and takes a position corresponding to the correlation peak value as a position of a synchronization header of a current frame.
In practical application, the signal modulation frequency deviation ranges corresponding to the device terminals produced by different manufacturers are not completely the same, and have certain differences, if the signal modulation frequency deviation of a certain device terminal is low, a related peak value is lower than a threshold value easily in the synchronous head detection process, so that the signals cannot be synchronized, and the problem of signal missing detection is caused.
Disclosure of Invention
The invention provides a synchronous head detection method, a synchronous head detection device, electronic equipment and a readable storage medium, which are used for solving the problem that the synchronous detection requirement of different modulation frequency deviation ranges cannot be met in the prior art.
The invention provides a synchronous head detection method, which comprises the following steps:
determining a first detection subsequence corresponding to each sampling point in the received sequence to be detected, and determining a correlation peak value according to each first detection subsequence and a local synchronization sequence;
if the correlation peak value is not smaller than a preset high threshold value, determining a sampling point corresponding to the correlation peak value as a synchronization head of a sequence to be detected;
and if the correlation peak value is smaller than the high threshold value and not smaller than a preset low threshold value, determining a sequence energy value of a first detection subsequence corresponding to the correlation peak value, and determining whether a sampling point corresponding to the correlation peak value is a synchronization head of a sequence to be detected or not according to the sequence energy value and the correlation peak value.
Further, if the correlation peak is smaller than the lower threshold, the method further comprises:
and determining a synchronous head of a sampling point non-to-be-detected sequence corresponding to the correlation peak value.
Further, before determining a first checking subsequence corresponding to each sampling point in the received sequence to be detected and determining a correlation peak according to each first checking subsequence and the local synchronization sequence, the method further includes:
when the data volume received in the current sampling period reaches a set number threshold, determining a second detection subsequence;
performing cross-correlation operation on the second detection subsequence and a local synchronization sequence to determine a correlation value corresponding to the second detection subsequence;
and if the correlation value corresponding to the second detection subsequence exceeds a set starting threshold value, determining to start synchronous head detection, wherein the starting threshold value is lower than the lower threshold value.
Further, the determining the sequence energy value of the first syndrome sequence corresponding to the correlation peak comprises:
and accumulating and summing the numerical absolute value of each bit of data in the first check subsequence corresponding to the correlation peak value, and determining the sequence energy value of the first check subsequence corresponding to the correlation peak value.
Further, the determining whether the sampling point corresponding to the correlation peak is a synchronization header of the sequence to be detected according to the sequence energy value and the correlation peak value includes:
judging whether the ratio of the correlation peak value to the sequence energy value meets a preset ratio range or not;
if so, determining the sampling point corresponding to the correlation peak value as a synchronous head of the sequence to be detected;
and if not, determining that the sampling point corresponding to the correlation peak value is not the synchronous head of the sequence to be detected.
The invention provides a synchronous head detection device, which comprises:
the first determining module is used for determining a first detection subsequence corresponding to each sampling point in the received sequence to be detected, and determining a correlation peak value according to each first detection subsequence and the local synchronous sequence;
the second determining module is used for determining a sampling point corresponding to the correlation peak value as a synchronous head of the sequence to be detected if the correlation peak value is not smaller than a preset high threshold value;
and the second determining module is configured to determine a sequence energy value of the first detection subsequence corresponding to the correlation peak value if the correlation peak value is smaller than the high threshold value and not smaller than a preset low threshold value, and determine whether a sampling point corresponding to the correlation peak value is a synchronization header of the sequence to be detected according to the sequence energy value and the correlation peak value.
Further, the second determining module is configured to, if the correlation peak is smaller than the lower threshold, determine that the correlation peak is smaller than the lower threshold.
Further, the apparatus further comprises:
the third determining module is used for determining a second detection subsequence when the data volume received in the current sampling period reaches a set number threshold; performing cross-correlation operation on the second detection subsequence and a local synchronization sequence to determine a correlation value corresponding to the second detection subsequence; and if the correlation value corresponding to the second detection subsequence exceeds a set starting threshold value, determining to start synchronous head detection, wherein the starting threshold value is lower than the lower threshold value.
Further, the second determining module is specifically configured to perform cumulative summation on numerical absolute values of each bit of data in the first checking subsequence corresponding to the correlation peak value, and determine a sequence energy value of the first checking subsequence corresponding to the correlation peak value.
Further, the second determining module is specifically configured to determine whether a ratio of the correlation peak value to the sequence energy value satisfies a preset ratio range; if so, determining the sampling point corresponding to the correlation peak value as a synchronous head of the sequence to be detected; and if not, determining that the sampling point corresponding to the correlation peak value is not the synchronous head of the sequence to be detected.
The invention provides electronic equipment which comprises a processor, a communication interface, a memory and a communication bus, wherein the processor and the communication interface are used for finishing mutual communication by the memory through the communication bus;
a memory for storing a computer program;
a processor for implementing any of the above method steps when executing a program stored in the memory.
The invention provides a computer-readable storage medium having stored therein a computer program which, when executed by a processor, performs the method steps of any of the above.
According to the synchronous head detection method, the device, the electronic equipment and the readable storage medium provided by the invention, in the embodiment of the invention, a first detection subsequence corresponding to each sampling point in a received sequence to be detected is determined, a correlation peak value is determined according to each first detection subsequence and a local synchronous sequence, if the correlation peak value is not less than a preset high threshold value, the sampling point corresponding to the correlation peak value is determined to be the synchronous head of the sequence to be detected, if the correlation peak value is positioned between a preset low threshold value and a preset high threshold value, and the low threshold value is less than the high threshold value, the sequence energy value of the first detection subsequence corresponding to the correlation peak value is determined, and whether the sampling point corresponding to the correlation peak value is the synchronous head of the sequence to be detected is determined according to the sequence energy value and the correlation peak value And detection omission is caused by overhigh single threshold value, so that the synchronous detection requirements of different modulation frequency deviation ranges can be met.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic diagram of a DMR frame structure provided in the prior art;
fig. 2 is a schematic diagram of a sync head detection process provided in embodiment 1 of the present invention;
FIG. 3 is a schematic diagram of a cross-correlation operation process provided in embodiment 2 of the present invention;
fig. 4 is a schematic diagram of a synchronous detection environment provided in embodiment 3 of the present invention;
fig. 5 is a schematic diagram of a determination process of start synchronization detection provided in embodiment 4 of the present invention;
fig. 6 is a schematic diagram of a process of detecting a sync head according to embodiment 5 of the present invention;
fig. 7 is a schematic structural diagram of an electronic device according to embodiment 6 of the present invention;
fig. 8 is a schematic structural diagram of a synchronous detection device according to an embodiment of the present invention.
Detailed Description
In order to meet the synchronous detection requirements of different modulation frequency offset ranges, embodiments of the present invention provide a method and an apparatus for detecting a synchronization header, an electronic device, and a readable storage medium.
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1:
fig. 2 is a schematic diagram of a sync head detection process provided in an embodiment of the present invention, where the process includes the following steps:
s201: and determining a first detection subsequence corresponding to each sampling point in the received sequence to be detected, and determining a correlation peak value according to each first detection subsequence and the local synchronous sequence.
The synchronous detection method provided by the embodiment of the invention is applied to electronic equipment, and the electronic equipment can be desktop computers, portable computers, smart phones, tablet computers, Personal Digital Assistants (PDAs) and other electronic equipment. In the field of wireless communication technology, the electronic device may also be a receiver.
After the electronic device determines that the sequence to be detected is received, the electronic device determines a first detection subsequence corresponding to each sampling point in the sequence to be detected, and because a local synchronization sequence for synchronization header detection is pre-stored in the electronic device, the electronic device can determine a correlation peak value according to each first detection subsequence and the local synchronization sequence.
The process that the electronic device selects the corresponding first detection subsequence according to a preset rule by taking the sampling point as a starting point, and the electronic device selects the first detection subsequence according to the preset rule by taking the sampling point as the starting point belongs to the prior art. The details are as follows:
the electronic equipment determines each sampling point in the sequence to be detected, the first number of the determined sampling points can be determined according to the experience of developers, and the first number determined under normal conditions ensures that the area where the first number of the sampling points is located covers the synchronization head of the sequence to be detected and data on two sides of the synchronization head so as to ensure the accuracy of synchronous detection.
After the electronic device determines the sampling points, it needs to determine a first detection subsequence corresponding to each sampling point, specifically including setting bit data for each sampling point according to an address where the sampling point is located, extracting one bit data forward every set bit data in the sequence to be detected, extracting a second number of bit data, and determining the first detection subsequence corresponding to the sampling point.
The set bits when extracting data for each sampling point are the same, and the set bits are stored in the electronic device in advance, and may be determined according to the experience of a developer.
The electronic equipment determines a correlation peak value according to each first detection subsequence and the local synchronization sequence, specifically, performs cross-correlation operation on each detection subsequence and the local data synchronization sequence to obtain each data correlation value, determines a data correlation peak value in each data correlation value, performs cross-correlation operation on each detection subsequence and the local RC synchronization sequence to obtain each RC correlation value, determines an RC correlation peak value in each RC correlation value, compares the data correlation peak value with the RC correlation peak value, determines the data correlation peak value as a correlation peak value if the data correlation peak value is greater than the RC correlation peak value, and determines the RC correlation peak value as a correlation peak value if the data correlation peak value is not greater than the RC correlation peak value.
The process of performing cross-correlation operation on the sequence to be detected and the local synchronization sequence belongs to the prior art, and is not described in detail in the embodiment of the present invention.
S202: and if the correlation peak value is not smaller than a preset high threshold value, determining a sampling point corresponding to the correlation peak value as a synchronous head of the sequence to be detected.
The electronic device is pre-stored with a preset high threshold value, which can be higher than a single threshold value in the prior art to avoid signal false detection.
And comparing the determined correlation peak value with a preset high threshold value, and if the correlation peak value is not less than the high threshold value, indicating that the synchronous detection is successful, wherein the sequence to be detected comprises a synchronous head, and the sampling point corresponding to the correlation peak value is the synchronous head of the sequence to be detected.
If the correlation peak value is smaller than the high threshold value, it is indicated that the synchronous detection may be successful and may fail, and it is further required to compare the correlation peak value with a preset low threshold value to really determine whether the synchronous detection is successful or not and whether the sampling point corresponding to the correlation peak value is a synchronous head of the sequence to be detected or not.
S203: and if the correlation peak value is smaller than the high threshold value and not smaller than a preset low threshold value, determining a sequence energy value of a first detection subsequence corresponding to the correlation peak value, and determining whether a sampling point corresponding to the correlation peak value is a synchronization head of a sequence to be detected or not according to the sequence energy value and the correlation peak value.
The preset low threshold value is pre-stored in the electronic device, and compared with a single threshold value in the prior art, the low threshold value can be lower, so that signal missing detection with a lower modulation frequency offset range is avoided, and therefore the high threshold value needs to be larger than the low threshold value when being set.
If the correlation peak value is smaller than the high threshold and not smaller than the low threshold, the electronic device needs to determine whether the synchronous detection is successful or not through further judgment, and whether the sampling point corresponding to the correlation peak value is a synchronous head of the sequence to be detected or not.
The electronic device can determine whether the sampling point corresponding to the correlation peak value is the synchronization head of the sequence to be detected according to the sequence energy value of the first detection subsequence corresponding to the determined correlation peak value and the correlation peak value.
The electronic equipment determines whether a sampling point corresponding to the correlation peak value is a synchronization head of the sequence to be detected or not according to the sequence energy value and the correlation peak value, specifically, the electronic equipment determines whether the ratio of the correlation peak value to the sequence energy value meets a preset ratio range or not, if the synchronization detection is determined to be successful, the sampling point corresponding to the correlation peak value is the synchronization head of the sequence to be detected, and if the synchronization detection is not determined to be failed, the sampling point corresponding to the correlation peak value is not the synchronization head of the sequence to be detected; the electronic device may judge whether the difference between the correlation peak value and the sequence energy value meets a preset difference range, if so, the sampling point corresponding to the correlation peak value is a synchronization header of the sequence to be detected, and if not, the sampling point corresponding to the correlation peak value is determined to be failed in synchronization detection, and the sampling point corresponding to the correlation peak value is not the synchronization header of the sequence to be detected.
S204: and if the correlation peak value is smaller than the low threshold value, determining that the sampling point corresponding to the correlation peak value is not the synchronous head of the sequence to be detected.
And comparing the determined correlation peak value with a preset low threshold value, and if the correlation peak value is smaller than the low threshold value, indicating that the synchronization of the sequence to be detected fails, wherein the sequence to be detected does not contain a synchronization head, and a sampling point corresponding to the correlation peak value is not the synchronization head of the sequence to be detected.
In the embodiment of the invention, the first detection subsequence corresponding to each sampling point is determined in the received sequence to be detected, the correlation peak value is determined according to each first detection subsequence and the local synchronous sequence, if the correlation peak value is not less than the preset high threshold value, determining the sampling point corresponding to the correlation peak value as the synchronous head of the sequence to be detected, if the correlation peak value is between the preset lower threshold value and the upper threshold value, and the lower threshold value is smaller than the upper threshold value, determining the sequence energy value of the first detection subsequence corresponding to the correlation peak value, determining whether the sampling point corresponding to the correlation peak value is the synchronous head of the sequence to be detected according to the sequence energy value and the correlation peak value, due to the fact that the high threshold value and the low threshold value are set, false detection caused by the fact that a single threshold value is low and detection omission caused by the fact that the single threshold value is too high are avoided, and therefore the synchronous detection requirements of different modulation frequency deviation ranges can be met.
Example 2:
in order to improve the efficiency of synchronous detection, on the basis of the above embodiments, in an embodiment of the present invention, before determining a first checking subsequence corresponding to each sampling point in a received sequence to be detected, and determining a correlation peak according to each first checking subsequence and a local synchronous sequence, the method further includes:
when the data volume received in the current sampling period reaches a set number threshold, determining a second detection subsequence;
performing cross-correlation operation on the second detection subsequence and a local synchronization sequence to determine a correlation value corresponding to the second detection subsequence;
and if the correlation value corresponding to the second detection subsequence exceeds a set starting threshold value, determining to start synchronous head detection, wherein the starting threshold value is lower than the lower threshold value.
Before the correlation peak value is determined, when the correlation value corresponding to the second detection subsequence exceeds the starting threshold value, the synchronous head detection is determined to be started, and if the correlation value corresponding to the second detection subsequence does not exceed the starting threshold value, the synchronous head detection is not carried out, so that the calculation amount of the synchronous head detection is reduced, and the synchronous head detection efficiency is improved.
When the data volume received in the current sampling period reaches the set number threshold, it can be considered that the sequence corresponding to the currently received data volume may include a synchronization header, so that the sequence corresponding to the data volume can be used as a part of the sequence to be detected, and a second detection subsequence in the sequence to be detected is determined.
The process of determining the second detection subsequence in the sequence to be detected belongs to the prior art, and is not described in detail in the embodiments of the present invention.
A second subsequence to be detected is used as part of the sequence to be detected, from which it can be determined whether the synchronization header is activated.
The process of determining whether to start synchronous detection or not according to the second detection subsequence belongs to the prior art, and specifically comprises the steps of performing cross-correlation operation on the second detection subsequence and a local synchronous sequence, determining a correlation value corresponding to the second detection subsequence, and determining to start synchronous head detection if the correlation value corresponding to the second detection subsequence exceeds a set start threshold value.
Certainly, in order to ensure that the determination process of starting the sync header detection is more accurate, it may be determined whether the correlation peaks corresponding to at least two second detection sub-sequences both exceed a set starting threshold, and if so, it is determined that the sync header detection is started.
After determining to start the synchronous head detection, the electronic device may further determine a synchronous detection start point according to the second detection subsequence.
As shown in fig. 4, the electronic device performs phase discrimination on received data, inputs the phase-discriminated data into the matched filtering module, and uses data mf _ out output by the matched filtering module as written data, that is, data included in a received sequence to be detected for synchronous head detection, where mf _ out is received by the synchronous detection starting module and the synchronous detection module, and the synchronous detection starting module determines whether to start synchronous detection according to the received mf _ out, and if so, sends the determined synchronous detection starting point addr _ sync to the synchronous detection module. And the synchronous detection module takes the received mf _ out as data contained in a sequence to be detected for synchronous head detection, determines whether synchronous detection is successful according to a synchronous detection starting point and the mf _ out, and determines the synchronous head of the sequence to be detected when the synchronous detection is successful. The location where the data is written may be in a Random-Access Memory (RAM) in the electronic device.
And when the signal detection is enabled to be effective, the synchronous detection starting determining module is started. Recording an address written in by data input by a current matched filtering module, taking the address as a starting point, setting bit data, extracting one bit data forward every set bit data, extracting a second number of bit data, determining a second detection subsequence of the starting point, performing cross-correlation operation on the second detection subsequence of the starting point and a local synchronous sequence to obtain a correlation value corresponding to the second detection subsequence of the starting point, determining a next sampling point according to the starting point, and determining the second detection subsequence of the next sampling point in the same way to obtain a correlation value corresponding to the second detection subsequence of the next sampling point.
When determining the next sampling point, the point corresponding to the third number of bits of data set at an interval may be used as the next sampling point.
And if the correlation value of the starting point and the correlation value of the next sampling point both exceed the set starting threshold value, determining to start synchronous head detection, and sending the starting point serving as a synchronous detection starting point to a synchronous detection module. The starting threshold value is pre-stored in the electronic device, and the starting threshold value has an effect of primary screening, so that the starting threshold value can be smaller than a preset low threshold value during setting.
And if any one of the correlation value of the starting point and the correlation value of the next sampling point does not exceed the synchronous detection starting threshold, determining not to start synchronous head detection.
Assuming that the second number is 24, the second detection subsequence contains 24 bits of data, and the synchronous sequence of voice and data is mapped according to a mapping rule specified by a DMR protocol, and the obtained 24 symbols are all +3 or-3. And the voice sync sequence has the same sequence format as the data sync sequence, but with opposite polarity. Therefore, the local synchronization sequence also has two formats corresponding to the local synchronization sequence, one is the normalized data synchronization sequence xi (0 ≦ i ≦ 23): "-1 +1+1+1-1+1+1-1-1-1 +1-1+1+1+ 1-1", and the other is a normalized RC synchronization sequence yi (0. ltoreq. i.ltoreq.23): "-1+1-1+1+1-1-1-1+1-1-1+1-1-1+1+1+1+1+1-1-1+1-1+1".
The process of cross-correlation operation between the second detection subsequence and the local synchronization sequence is to multiply each data passing through the corresponding position and carry out accumulation calculation. Fig. 3 is a schematic diagram illustrating multiplication and accumulation of the second detection subsequence, the local data synchronization sequence, and the local RC synchronization sequence.
The following describes the process of determining whether to initiate synchronization detection in a specific embodiment, as shown in fig. 5:
s501; the initialization detection state DetectState is 0.
S502: and recording the address written in by the data input by the current matched filtering module, taking the address as a starting point, and taking the starting point as a current sampling point.
And recording the address of the data mf _ out output by the current matched filter module written into the RAM as addra, and taking the addra as a starting point.
S503: and calculating the correlation value of the current sampling point.
For example, every other 8 addresses from the starting point forward, the remaining 23 sets of data in the RAM (i.e. the data in the addra-8, addra-16 … … addra-184 addresses) are extracted, and the second detection subsequence corresponding to the current sampling point is obtained. Synchronizing the 24 groups of data with local data sequence xiMultiplying corresponding positions, and performing accumulation summation
Figure BDA0001506728470000111
And obtaining the correlation value of the current sampling point.
S504: and judging whether the current sampling point reaches a set starting threshold, if so, performing S505, and if not, performing S506.
S505: adding 1 to the DetectState, judging whether the DetectState is 2, if so, performing S507; if not, proceed to S508.
S506: resetting DetectState to 0, updating the next sampling point, taking the next sampling point as the current sampling point, and returning to S503.
S507: determining to start sync head detection.
S508: and updating the next sampling point, taking the next sampling point as the current sampling point, and returning to the step S503.
And continuing waiting for data writing after determining to start synchronous head detection and determining a synchronous detection starting point addra, and determining a set fourth number of bits of data as a sequence to be detected when determining that the set fourth number of bits of data are written.
Wherein the fourth number is related to the sign bit time span and the data rate.
The symbol bit time span, namely the symbol rate, is a data rate corresponding to the local synchronization sequence, and the number of the symbol bit time span is selected to ensure that the data of the position of the synchronization head to be detected is written in, so that the accuracy of the later synchronization detection is realized. The data rate should typically be 2nThe multiple symbol rate, i.e., the data rate, may be 2 times, 4 times, 8 times, etc., the symbol rate.
The fourth number may be a product of the sign bit time span and a multiple of the data rate, or determined according to a multiple of the sign bit time span and the time rate, other algorithms, and so on.
For example, as shown in fig. 1, the sign bit time span is 4.8kHZ, the data rate is 8 times the sign rate, that is, 4.8 × 8 — 38.4kHZ, 32 sign bit time spans are selected, and the fourth number is the product of the sign bit time span and the multiple corresponding to the data rate, and then the fourth number is set to 32 × 8 — 256, that is, when 256 data are written, the 256 data can be regarded as the sequence to be detected.
After the sequence to be detected is determined, a first number of sampling points are selected in the sequence to be detected, and then the address of the data written in the sequence to be detected finally serves as the position of the first sampling point, namely the address addrb of the 256 th data serves as the position of the first sampling point. And determining sampling points forward every other address by starting from the addrb, and determining 880 sampling points of the addrb, the addrb-1 and the addrb-2 … … addrb-879 so as to ensure that the area where the 880 sampling points are located covers the current sequence synchronization head to be detected and the data on the two sides of the sequence synchronization head to be detected.
After the electronic device determines the sampling points, it needs to determine a first detection subsequence corresponding to each sampling point, specifically including setting bit data for each sampling point according to an address where the sampling point is located, extracting one bit data forward every set bit data in the sequence to be detected, extracting a second number of bit data, and determining the first detection subsequence corresponding to the sampling point.
Because an address in the RAM stores data of a sampling point, the data of a sampling point includes at least one bit of data, and for the same sequence to be detected, the number of bits of the data included in the data of each sampling point is the same, so the set bit of data can be represented as data of a set number of addresses, and the process of determining the set number of addresses is usually: and determining the multiple corresponding to the data rate of the sequence to be detected as the value of the set number of addresses.
Determining a correlation peak value according to the first detection subsequence and the local synchronous sequence corresponding to each sampling point, namely performing cross-correlation operation on 880 first detection subsequences and the local data synchronous sequence to obtain 880 data correlation values, determining the data correlation peak value in the 880 data correlation values, performing cross-correlation operation on 880 first detection subsequences and the local RC synchronous sequence to obtain 880 RC correlation values, determining the RC correlation peak value in the 880 RC correlation values, and determining the maximum value of the data correlation peak value and the RC correlation peak value as the correlation peak value.
In the embodiment of the invention, before the correlation peak value is determined, when the correlation value corresponding to the second detection subsequence exceeds the starting threshold value, the synchronous head detection is determined to be started, and if the correlation value corresponding to the second detection subsequence does not exceed the starting threshold value, the synchronous head detection is not carried out, so that the calculated amount of the synchronous head detection is reduced, and the synchronous head detection efficiency is improved.
Example 3:
on the basis of the foregoing embodiments, in an embodiment of the present invention, the determining the sequence energy value of the first syndrome corresponding to the correlation peak includes:
accumulating and summing the numerical absolute value of each bit of data in the first check subsequence corresponding to the correlation peak value to determine the sequence energy value of the first check subsequence corresponding to the correlation peak value;
when the correlation peak value is between the low threshold and the high threshold, the sequence energy value of the first detection subsequence corresponding to the correlation peak value is calculated, so that the synchronous detection result can be further determined.
The electronic equipment determines the numerical value of each bit of data in the first detection subsequence corresponding to the correlation peak value, determines the numerical value absolute value of each bit of data, and accumulates and sums the numerical value absolute value of each bit of data to obtain the sequence energy value of the first subsequence corresponding to the correlation peak value.
When the correlation peak value is between the low threshold and the high threshold, the sequence energy value of the first detection subsequence corresponding to the correlation peak value is calculated, so that the synchronous detection result can be further determined.
Example 4:
on the basis of the foregoing embodiments, in the embodiments of the present invention, determining whether the sampling point corresponding to the correlation peak is a synchronization header of the sequence to be detected according to the sequence energy value and the correlation peak includes:
judging whether the ratio of the correlation peak value to the sequence energy value meets a preset ratio range or not;
if so, determining the sampling point corresponding to the correlation peak value as a synchronous head of the sequence to be detected;
and if not, determining that the sampling point corresponding to the correlation peak value is not the synchronous head of the sequence to be detected.
And when the correlation peak value is positioned between the lower threshold and the upper threshold, further determining a synchronous detection result and determining a synchronous head of the sequence to be detected according to the correlation peak value and the sequence energy value of the first detection subsequence corresponding to the correlation peak value.
In the embodiment of the invention, the synchronous detection result is determined according to the sequence energy value and the correlation peak value, namely the synchronous detection result is determined according to the ratio of the correlation peak value and the sequence energy value.
The preset ratio range is stored in the electronic equipment, and the more similar the sequence to be detected is to the local synchronization sequence, the more the ratio of the correlation peak value to the sequence energy value approaches to 1.
For example, setting a correlation coefficient threshold coef _ limit (and 0 ≦ coef _ limit ≦ 1), setting a preset ratio range between coef _ limit and 1, determining that the synchronization detection is successful if the ratio of the correlation peak value to the sequence energy value meets the preset ratio range, determining that the sampling point corresponding to the correlation peak value is the synchronization header of the sequence to be detected, and determining that the synchronization detection is failed if the sampling point corresponding to the correlation peak value does not meet the preset ratio range, and determining that the sampling point corresponding to the correlation peak value is not the synchronization header of the sequence to be detected.
After determining the synchronization header of the sequence to be detected, the method further comprises:
and determining and outputting the synchronization type of the sequence to be detected and the synchronization end identifier.
After the synchronization head of the sequence to be detected is determined, the synchronization type of the sequence to be detected and the synchronization end mark are determined and output so as to inform that the sequence to be detected is successfully synchronized.
The synchronization end identifier may be a preset value of the electronic device to inform that the synchronization detection is successful. Of course, the synchronization header address may also be used as the synchronization end identifier, and when the synchronization header address is identified in the synchronization end identifier, the synchronization detection is considered to be successful.
Further, determining the synchronization type of the sequence to be detected comprises:
if the RC related peak value is larger than the data related peak value, determining that the sequencing to be detected is an RC frame;
if the data correlation peak value is larger than the RC correlation peak value, judging whether the data correlation peak value is positive or not; if yes, the sequencing to be detected is listed as a data frame, and if not, the sequencing to be detected is listed as a voice frame.
And if the data correlation peak value is larger than the RC correlation peak value, determining that the sequence to be detected is a data correlation frame, so that the data synchronization head is divided into data information and voice information and is characterized by the polarity of the data correlation peak value. Therefore, when the sequence to be detected is a data-related frame, if the data-related peak value is positive, the sequence to be detected is a data frame, otherwise, the sequence to be detected is a voice frame.
The above embodiments are described below in a specific embodiment, as shown in fig. 6:
s601: when the data volume received in the current sampling period reaches a set number threshold, determining a second detection subsequence; performing cross-correlation operation on the second detection subsequence and a local synchronization sequence to determine a correlation value corresponding to the second detection subsequence; and if the correlation value corresponding to the second detection subsequence exceeds a set starting threshold value, determining to start synchronous head detection, wherein the starting threshold value is lower than the lower threshold value.
S602: and determining a first detection subsequence corresponding to each sampling point in the received sequence to be detected, and determining a correlation peak value according to each first detection subsequence and the local synchronous sequence.
And according to the synchronous detection starting point determined in the step S601, continuously waiting for 256 pieces of matched filter output data to be written into the RAM from the synchronous detection starting point. Note that the address at which the 256 th matched filter output data is written to the RAM is addrb. Respectively calculating data synchronization correlation values and RC synchronization correlation values of the addrb, addrb-1 and addrb-2 … … addrb-879 sampling points, namely total 880 sampling points.
Initializing sum _ data as 0; sum _ data _ max is 0; sum _ rc ═ 0; sum _ rc _ max is 0; sum _ max is 0; count is 0; addr _ sync ═ 0; addr _ sync _ data _ temp ═ 0; addr _ sync _ rc _ temp ═ 0.
With addrb as a starting point, the remaining 23 sets of data in the RAM (i.e., the data in addrb-8, addrb-16 … … addrb-184 addresses) are extracted every 8 addresses in the past. The 24 groups of data are respectively synchronized with local data synchronization sequence xiAnd RC synchronization sequence yiThe corresponding positions are multiplied, and the data synchronization correlation value of the current sampling point can be updated by accumulating and summing
Figure BDA0001506728470000151
And RC synchronous correlation value
Figure BDA0001506728470000161
The correlation count is counted as count + 1.
If | sum _ data | > | sum _ data _ max |, let sum _ data _ max ═ sum _ data, addr _ sycn _ data _ temp ═ addrb;
similarly, if | sum _ rc | > | sum _ rc _ max |, then sum _ rc _ max is equal to sum _ rc and addr _ sync _ rc _ temp is equal to addrb.
When count is 880, if | sum _ data _ max | > | sum _ rc _ max |, then make sum _ max ═ sum _ data _ max |, otherwise, make sum _ max ═ sum _ rc _ max |, and proceed to S603.
And when the count is not 880, making addrb equal to addrb-1, taking addrb-1 as the current sampling point, extracting 24 groups of data in the RAM at intervals of 8 addresses before, and continuously performing cross-correlation calculation.
S603: if the correlation peak value is not less than the low threshold, determining the synchronization type of the sequence to be detected and the address of the synchronization head according to the correlation peak value, and performing S604; if the correlation peak is less than the low threshold, S607 is performed.
If sum _ max is higher than the synchronous detection low threshold sync _ limit _ low and is | sum _ data _ max |, it is considered that the sequence to be detected may be a data-related frame, and the synchronous header address addr _ sycn ═ addr _ sycn _ data _ temp, i.e. the sampling point corresponding to the data-related peak value is a synchronous header; if sum _ max is higher than sync detection low threshold sync _ limit _ low and sum _ max is | sum _ RC _ max |, it is considered that the sequence to be detected may be an RC frame, and the synchronization header address addr _ sycn is addr _ sycn _ RC _ temp, i.e. the sampling point corresponding to the RC correlation peak is the synchronization header.
S604: if the correlation peak is less than the high threshold, S605 is performed. If the correlation peak is not less than the high threshold, S606 is performed.
If sum _ max is higher than the synchronization detection high threshold sync _ limit _ high, the synchronization detection is determined to be successful, the synchronization type sync _ type and the synchronization ending mark sync _ finish are output, and the next time of starting the synchronization detection is waited. If sum _ max is lower than the sync detection high threshold sync _ limit _ high, S605 is performed.
S605: and accumulating and summing the numerical absolute value of each bit of data in the first checking subsequence corresponding to the correlation peak value, determining the sequence energy value of the first checking subsequence corresponding to the correlation peak value, and if the ratio of the correlation peak value to the sequence energy value is judged to meet a preset ratio range, performing S606. Otherwise, S607 is performed.
With addr _ sync as the starting point, the remaining 23 sets of data in RAM are extracted every 8 addresses (i.e. data in addr _ sync-8, addr _ sync-16 … … addr _ sync-184 addresses). The absolute values of the 25 groups of data are accumulated and summed
Figure BDA0001506728470000171
A signal correlation coefficient threshold coef _ limit is preset (and 0 is less than or equal to coef _ limit is less than or equal to 1). If it is not
Figure BDA0001506728470000172
The synchronization detection is successful, and the synchronization type sync _ type and the synchronization end flag sync _ finish are output to wait for the next synchronization detection to be started.
S606: and determining that the synchronization detection is successful, and outputting a synchronization type and a synchronization end identifier.
If sum _ max is higher than the synchronization detection high threshold sync _ limit _ high, the synchronization detection is determined to be successful, the synchronization type sync _ type and the synchronization ending mark sync _ finish are output, and the next time of starting the synchronization detection is waited.
Or presetting a signal correlation coefficient threshold coef _ limit (0 is less than or equal to coef _ limit and less than or equal to 1). If it is not
Figure BDA0001506728470000173
The synchronization detection is successful, and the synchronization type sync _ type and the synchronization end flag sync _ finish are output to wait for the next synchronization detection to be started.
S607: determining that the synchronization detection fails.
And if sum _ max is lower than the synchronous detection low threshold sync _ limit _ low, determining that the synchronous detection fails and waiting for starting the next round of synchronous detection.
Or if
Figure BDA0001506728470000174
Then it is determined that the synchronization detection fails and a next round of synchronization detection is waited to be initiated.
In the embodiment of the invention, when the correlation peak value is positioned between the low threshold and the high threshold, the synchronous detection result can be further determined and the synchronous head of the sequence to be detected can be determined according to the correlation peak value and the sequence energy value of the first detection subsequence corresponding to the correlation peak value.
Example 5:
on the basis of the foregoing embodiments, an embodiment of the present invention further provides an electronic device, as shown in fig. 7, including: the system comprises a processor 701, a communication interface 702, a memory 703 and a communication bus 704, wherein the processor 701, the communication interface 702 and the memory 703 complete mutual communication through the communication bus 704;
the memory 703 has stored therein a computer program which, when executed by the processor 701, causes the processor 701 to perform the steps of:
determining a first detection subsequence corresponding to each sampling point in the received sequence to be detected, and determining a correlation peak value according to each first detection subsequence and a local synchronization sequence;
if the correlation peak value is not smaller than a preset high threshold value, determining a sampling point corresponding to the correlation peak value as a synchronization head of a sequence to be detected;
and if the correlation peak value is smaller than the high threshold value and not smaller than a preset low threshold value, determining a sequence energy value of a first detection subsequence corresponding to the correlation peak value, and determining whether a sampling point corresponding to the correlation peak value is a synchronization head of a sequence to be detected or not according to the sequence energy value and the correlation peak value.
Based on the same inventive concept, the embodiment of the present invention further provides an electronic device, and as the principle of the electronic device for solving the problem is similar to the method for detecting the synchronization head, the implementation of the electronic device may refer to the implementation of the method, and repeated details are not repeated.
The communication bus mentioned in the management node may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The communication bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown, but this does not mean that there is only one bus or one type of bus.
The communication interface 702 is used for communication between the above-described electronic apparatus and other apparatuses.
The Memory may include a Random Access Memory (RAM) or a Non-Volatile Memory (NVM), such as at least one disk Memory. Alternatively, the memory may be at least one memory device located remotely from the processor.
The Processor may be a general-purpose Processor, including a central processing unit, a Network Processor (NP), and the like; but may also be a Digital Signal Processor (DSP), an application specific integrated circuit, a field programmable gate array or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or the like.
When the processor executes the program stored in the memory in the embodiment of the invention, the first detection subsequence corresponding to each sampling point in the received sequence to be detected is determined, the correlation peak value is determined according to each first detection subsequence and the local synchronous sequence, if the correlation peak value is not smaller than the preset high threshold value, the sampling point corresponding to the correlation peak value is determined to be the synchronous head of the sequence to be detected, if the correlation peak value is positioned between the preset low threshold value and the high threshold value, the low threshold value is smaller than the high threshold value, the sequence energy value of the first detection subsequence corresponding to the correlation peak value is determined, and whether the sampling point corresponding to the correlation peak value is the synchronous head of the sequence to be detected is determined according to the sequence energy value and the correlation peak value, because the high threshold value and the low threshold value are set, the false detection caused by the lower single threshold value and the omission caused by the overhigh single, therefore, the synchronous detection requirements of different modulation frequency deviation ranges can be met.
Example 6:
on the basis of the foregoing embodiments, an embodiment of the present invention further provides a computer storage readable storage medium, in which a computer program executable by an electronic device is stored, and when the program is run on the electronic device, the electronic device is caused to execute the following steps:
determining a first detection subsequence corresponding to each sampling point in the received sequence to be detected, and determining a correlation peak value according to each first detection subsequence and a local synchronization sequence;
if the correlation peak value is not smaller than a preset high threshold value, determining a sampling point corresponding to the correlation peak value as a synchronization head of a sequence to be detected;
and if the correlation peak value is smaller than the high threshold value and not smaller than a preset low threshold value, determining a sequence energy value of a first detection subsequence corresponding to the correlation peak value, and determining whether a sampling point corresponding to the correlation peak value is a synchronization head of a sequence to be detected or not according to the sequence energy value and the correlation peak value.
Based on the same inventive concept, embodiments of the present invention further provide a computer-readable storage medium, and since a principle of solving a problem when a processor executes a computer program stored in the computer-readable storage medium is similar to that of a synchronization header detection method, implementation of the computer program stored in the computer-readable storage medium by the processor may refer to implementation of the method, and repeated details are not repeated.
The computer readable storage medium may be any available medium or data storage device that can be accessed by a processor in an electronic device, including but not limited to magnetic memory such as floppy disks, hard disks, magnetic tape, magneto-optical disks (MOs), etc., optical memory such as CDs, DVDs, BDs, HVDs, etc., and semiconductor memory such as ROMs, EPROMs, EEPROMs, non-volatile memory (NAND FLASH), Solid State Disks (SSDs), etc.
The computer program is stored in a computer readable storage medium provided in the embodiments of the present invention, and when being executed by a processor, the computer program implements determining a first detection subsequence corresponding to each sampling point in a received sequence to be detected, determining a correlation peak value according to each first detection subsequence and a local synchronization sequence, determining a sampling point corresponding to the correlation peak value as a synchronization header of the sequence to be detected if the correlation peak value is not less than a preset high threshold value, determining a sequence energy value of the first detection subsequence corresponding to the correlation peak value if the correlation peak value is located between a preset low threshold value and a preset high threshold value, and determining whether the sampling point corresponding to the correlation peak value is the synchronization header of the sequence to be detected according to the sequence energy value and the correlation peak value And detection omission is caused by overhigh single threshold value, so that the synchronous detection requirements of different modulation frequency deviation ranges can be met.
Fig. 8 is a schematic structural diagram of a synchronous detection device according to an embodiment of the present invention, where the device includes:
the first determining module 81 is configured to determine, in the received sequence to be detected, a first detection subsequence corresponding to each sampling point, and determine a correlation peak value according to each first detection subsequence and the local synchronization sequence;
a second determining module 82, configured to determine, if the correlation peak is not smaller than a preset high threshold, that a sampling point corresponding to the correlation peak is a synchronization header of the sequence to be detected;
the second determining module 82 is configured to determine, if the correlation peak value is smaller than the high threshold and not smaller than a preset low threshold, a sequence energy value of the first detection subsequence corresponding to the correlation peak value, and determine, according to the sequence energy value and the correlation peak value, whether a sampling point corresponding to the correlation peak value is a synchronization header of the sequence to be detected.
The second determining module 82 is configured to, if the correlation peak value is smaller than the lower threshold value, determine that the correlation peak value is smaller than the lower threshold value.
The device further comprises:
a third determining module 83, configured to determine a second detection subsequence when the amount of data received in the current sampling period reaches a set number threshold; performing cross-correlation operation on the second detection subsequence and a local synchronization sequence to determine a correlation value corresponding to the second detection subsequence; and if the correlation value corresponding to the second detection subsequence exceeds a set starting threshold value, determining to start synchronous head detection, wherein the starting threshold value is lower than the lower threshold value.
The second determining module 82 is specifically configured to perform cumulative summation on the numerical absolute value of each bit of data in the first checking subsequence corresponding to the correlation peak value, and determine a sequence energy value of the first checking subsequence corresponding to the correlation peak value.
The second determining module 82 is specifically configured to determine whether a ratio of the correlation peak value to the sequence energy value meets a preset ratio range; if so, determining the sampling point corresponding to the correlation peak value as a synchronous head of the sequence to be detected; and if not, determining that the sampling point corresponding to the correlation peak value is not the synchronous head of the sequence to be detected.
In the embodiment of the invention, the first detection subsequence corresponding to each sampling point is determined in the received sequence to be detected, the correlation peak value is determined according to each first detection subsequence and the local synchronous sequence, if the correlation peak value is not less than the preset high threshold value, determining the sampling point corresponding to the correlation peak value as the synchronous head of the sequence to be detected, if the correlation peak value is between the preset lower threshold value and the upper threshold value, and the lower threshold value is smaller than the upper threshold value, determining the sequence energy value of the first detection subsequence corresponding to the correlation peak value, determining whether the sampling point corresponding to the correlation peak value is the synchronous head of the sequence to be detected according to the sequence energy value and the correlation peak value, due to the fact that the high threshold value and the low threshold value are set, false detection caused by the fact that a single threshold value is low and detection omission caused by the fact that the single threshold value is too high are avoided, and therefore the synchronous detection requirements of different modulation frequency deviation ranges can be met.
For the system/apparatus embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference may be made to some descriptions of the method embodiments for relevant points.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (12)

1. A sync head detection method, comprising:
determining a first detection subsequence corresponding to each sampling point in the received sequence to be detected, and determining a correlation peak value according to each first detection subsequence and a local synchronization sequence;
if the correlation peak value is not smaller than a preset high threshold value, determining a sampling point corresponding to the correlation peak value as a synchronization head of a sequence to be detected;
if the correlation peak value is smaller than the high threshold value and not smaller than a preset low threshold value, determining a sequence energy value of a first detection subsequence corresponding to the correlation peak value, and determining whether a sampling point corresponding to the correlation peak value is a synchronization head of a sequence to be detected or not according to the sequence energy value and the correlation peak value;
wherein the local synchronization sequence includes a local data synchronization sequence and a local RC synchronization sequence, and the determining a correlation peak according to each first detection subsequence and the local synchronization sequence includes:
performing cross-correlation operation on each first detection subsequence and a local data synchronization sequence to obtain each data correlation value, determining a data correlation peak value in each data correlation value, performing cross-correlation operation on each first detection subsequence and a local RC synchronization sequence to obtain each RC correlation value, and determining an RC correlation peak value in each RC correlation value;
if the data correlation peak value is larger than the RC correlation peak value, determining the data correlation peak value as a correlation peak value;
and if the data correlation peak value is not larger than the RC correlation peak value, determining the RC correlation peak value as a correlation peak value.
2. The method of claim 1, wherein if the correlation peak is less than the lower threshold, the method further comprises:
and determining a synchronous head of a sampling point non-to-be-detected sequence corresponding to the correlation peak value.
3. A method according to claim 1 or 2, wherein, in the received sequence to be detected, a first checking subsequence corresponding to each sampling point is determined, and before determining a correlation peak value according to each first checking subsequence and the local synchronization sequence, the method further comprises:
when the data volume received in the current sampling period reaches a set number threshold, determining a second detection subsequence;
performing cross-correlation operation on the second detection subsequence and a local synchronization sequence to determine a correlation value corresponding to the second detection subsequence;
and if the correlation value corresponding to the second detection subsequence exceeds a set starting threshold value, determining to start synchronous head detection, wherein the starting threshold value is lower than the lower threshold value.
4. The method of claim 1, wherein said determining the sequence energy value of the first syndrome sequence to which the correlation peak corresponds comprises:
and accumulating and summing the numerical absolute value of each bit of data in the first check subsequence corresponding to the correlation peak value, and determining the sequence energy value of the first check subsequence corresponding to the correlation peak value.
5. The method as claimed in claim 1, wherein said determining whether the sampling point corresponding to the correlation peak is a synchronization header of the sequence to be detected according to the sequence energy value and the correlation peak comprises:
judging whether the ratio of the correlation peak value to the sequence energy value meets a preset ratio range or not;
if so, determining the sampling point corresponding to the correlation peak value as a synchronous head of the sequence to be detected;
and if not, determining that the sampling point corresponding to the correlation peak value is not the synchronous head of the sequence to be detected.
6. A sync head detecting apparatus, comprising:
the first determining module is used for determining a first detection subsequence corresponding to each sampling point in the received sequence to be detected, and determining a correlation peak value according to each first detection subsequence and the local synchronous sequence;
the second determining module is used for determining a sampling point corresponding to the correlation peak value as a synchronous head of the sequence to be detected if the correlation peak value is not smaller than a preset high threshold value;
the second determining module is configured to determine, if the correlation peak value is smaller than the high threshold and not smaller than a preset low threshold, a sequence energy value of the first detection subsequence corresponding to the correlation peak value, and determine, according to the sequence energy value and the correlation peak value, whether a sampling point corresponding to the correlation peak value is a synchronization header of the sequence to be detected;
the first determining module is specifically configured to perform a cross-correlation operation on each first detection subsequence and the local data synchronization sequence to obtain each data correlation value, determine a data correlation peak value in each data correlation value, perform a cross-correlation operation on each first detection subsequence and the local RC synchronization sequence to obtain each RC correlation value, and determine an RC correlation peak value in each RC correlation value; if the data correlation peak value is larger than the RC correlation peak value, determining the data correlation peak value as a correlation peak value; and if the data correlation peak value is not larger than the RC correlation peak value, determining the RC correlation peak value as a correlation peak value.
7. The apparatus of claim 6, wherein the second determining module is configured to determine that the correlation peak is less than the lower threshold if the correlation peak is less than the lower threshold.
8. The apparatus of claim 6 or 7, wherein the apparatus further comprises:
the third determining module is used for determining a second detection subsequence when the data volume received in the current sampling period reaches a set number threshold; performing cross-correlation operation on the second detection subsequence and a local synchronization sequence to determine a correlation value corresponding to the second detection subsequence; and if the correlation value corresponding to the second detection subsequence exceeds a set starting threshold value, determining to start synchronous head detection, wherein the starting threshold value is lower than the lower threshold value.
9. The apparatus as claimed in claim 6, wherein the second determining module is specifically configured to perform cumulative summation on the numerical absolute value of each bit of data in the first checking subsequence corresponding to the correlation peak value, and determine the sequence energy value of the first checking subsequence corresponding to the correlation peak value.
10. The apparatus of claim 6, wherein the second determining module is specifically configured to determine whether a ratio of the correlation peak to the sequence energy satisfies a predetermined ratio range; if so, determining the sampling point corresponding to the correlation peak value as a synchronous head of the sequence to be detected; and if not, determining that the sampling point corresponding to the correlation peak value is not the synchronous head of the sequence to be detected.
11. An electronic device is characterized by comprising a processor, a communication interface, a memory and a communication bus, wherein the processor and the communication interface are used for realizing mutual communication by the memory through the communication bus;
a memory for storing a computer program;
a processor for implementing the method steps of any one of claims 1 to 5 when executing a program stored in the memory.
12. A computer-readable storage medium, characterized in that a computer program is stored in the computer-readable storage medium, which computer program, when being executed by a processor, carries out the method steps of any one of claims 1-5.
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