CN108183709B - CPT atomic clock frequency taming control method and device - Google Patents
CPT atomic clock frequency taming control method and device Download PDFInfo
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- CN108183709B CN108183709B CN201711247133.9A CN201711247133A CN108183709B CN 108183709 B CN108183709 B CN 108183709B CN 201711247133 A CN201711247133 A CN 201711247133A CN 108183709 B CN108183709 B CN 108183709B
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- H—ELECTRICITY
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- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/26—Automatic control of frequency or phase; Synchronisation using energy levels of molecules, atoms, or subatomic particles as a frequency reference
Abstract
The application discloses a CPT atomic clock frequency taming control method and a device, comprising the following steps: the CPT atomic clock comprises a disciplinary controller, and the disciplinary controller determines the local oscillation frequency of the CPT atomic clock and obtains a first second pulse signal based on the local oscillation frequency; receiving a second pulse signal input through an external port; determining a frequency offset of a local oscillation frequency of the CPT atomic clock within a set time interval based on the first second pulse signal and the second pulse signal; and the tame adjustment is carried out on the local oscillation frequency of the CPT atomic clock according to the frequency offset, so that the frequency of the CPT atomic clock is tamed in a short time, the frequency drift problem of the CPT atomic clock is restrained, and the tame adjustment is realized through a tame controller built in the CPT atomic clock, so that the structure is simple, the debugging is easy, and the automatic control and the autonomous operation of the frequency tame of the CPT atomic clock are improved.
Description
Technical Field
The application relates to the technical field of atomic clocks, in particular to a method and equipment for controlling frequency disciplining of a Coherent Population Trapping (CPT) atomic clock.
Background
Atomic clocks are currently the most accurate timing tool in the world. Plays an important role in communication, aerospace, satellite navigation, scientific metering test and the like. The CPT atomic clock is a novel atomic clock designed based on the coherent population trapping principle of atoms, and is mainly characterized in that atoms are prepared into coherent states by utilizing the action of bicolor coherent light and the atoms, and the frequency resource of the atomic clock is realized by utilizing CPT signals as microwave frequency discrimination signals.
The CPT atomic clock is different from the traditional atomic clocks of hydrogen, rubidium, cesium and the like in the working principle, a microwave resonant cavity is not needed in the quantum part, and the CPT atomic clock is an atomic clock which can realize the minimum volume and the minimum energy consumption in the principle and the technology at present. The power supply has the advantages of small volume, low power consumption, quick start and the like, and has wide application prospect.
However, the CPT atomic clock, as a secondary frequency standard, has a frequency drift problem. In order to suppress the frequency drift of the CPT atomic clock, a scheme for suppressing the frequency drift of the CPT atomic clock is proposed at present, that is, the frequency of the CPT atomic clock is calibrated by using an external device, so that the physical performance of the CPT atomic clock is effectively improved. However, this method has problems of complicated structure, requiring a large amount of resources, and being difficult to implement.
Disclosure of Invention
In view of this, embodiments of the present application provide a CPT atomic clock frequency taming control method and device, so as to solve the problem of how to suppress frequency drift of the CPT atomic clock.
The embodiment of the application provides a frequency disciplining control method for a CPT atomic clock, wherein the CPT atomic clock comprises a disciplining controller, and the frequency disciplining control method comprises the following steps:
the taming controller determines the local oscillation frequency of the CPT atomic clock and obtains a first second pulse signal based on the local oscillation frequency;
the taming controller receives a second pulse signal input through an external port;
the taming controller determines a frequency offset of a local oscillation frequency of the CPT atomic clock within a set time interval based on the first second pulse signal and the second pulse signal;
and the taming controller is used for taming and adjusting the local oscillation frequency of the CPT atomic clock according to the frequency offset.
The embodiment of the application provides a CPT atomic clock frequency disciplining control device, which is included in the CPT atomic clock and includes:
the determining unit is used for determining the local oscillation frequency of the CPT atomic clock and obtaining a first second pulse signal based on the local oscillation frequency;
a receiving unit for receiving a second pulse-per-second signal input through an external port;
the processing unit is used for determining the frequency offset of the local oscillation frequency of the CPT atomic clock in a set time interval based on the first second pulse signal and the second pulse signal;
and the adjusting unit is used for performing tame adjustment on the local oscillation frequency of the CPT atomic clock according to the frequency offset.
The benefits of at least one embodiment of the present application are as follows:
the CPT atomic clock comprises the taming controller, the taming controller can accurately measure the frequency offset of the CPT atomic clock based on a short time interval measuring method of frequency doubling and quantization time delay, different frequency taming control methods are provided according to the frequency offset, the frequency of the CPT atomic clock is taminated in a short time, and the frequency drift problem of the CPT atomic clock is restrained.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic flowchart of a CPT atomic clock frequency taming control method according to an embodiment of the present disclosure;
fig. 2 is a schematic flowchart of a CPT atomic clock frequency taming control method according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a CPT atomic clock frequency taming control device according to an embodiment of the present application.
Detailed Description
In order to achieve the purpose of the present application, in the scheme provided by the embodiment of the present application, the CPT atomic clock includes a discipline controller, the discipline controller can accurately measure the frequency offset of the CPT atomic clock based on a short time interval measurement method of frequency doubling and quantization delay, and according to the frequency offset, different frequency discipline control methods are proposed to implement the frequency of the CPT atomic clock in a short time so as to suppress the frequency drift problem of the CPT atomic clock.
The present application will now be described in further detail with reference to the accompanying drawings, wherein like reference numerals designate like parts throughout the several views. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Fig. 1 is a schematic flowchart of a CPT atomic clock frequency taming control method according to an embodiment of the present application. The taming control method may be as follows.
In the embodiment of the application, the discipline controller is configured in the CPT atomic clock, and the discipline controller may be implemented based on an FPGA (Field-Programmable Gate Array) or other Programmable devices, which is not specifically limited herein.
Step 101: the taming controller determines the local oscillation frequency of the CPT atomic clock and obtains a first second pulse signal based on the local oscillation frequency.
In the embodiment of the present application, the disciplined controller completes the initialization configuration in the power-on state. Assuming that the discipline controller is implemented by an FPGA, the initializing configuration of each module inside and outside the FPGA in the power-on state may specifically include: chip clock configuration, C field voltage configuration, quantum system and laser temperature point configuration, phase-locked loop chip configuration, analog-digital/digital-analog chip configuration and the like.
The taming controller controls the temperature of the quantum system and the laser in the starting initialization stage, and locks the laser frequency after the temperature is stable; and locking the microwave frequency after the laser frequency is locked, wherein the locked microwave frequency is the determined local oscillation frequency of the CPT atomic clock.
Specifically, the disciplined controller controls the temperature of the quantum system and the laser; and determining the local oscillator frequency of the CPT atomic clock under the condition that the temperature is stable.
In addition, after the tame controller locks the local oscillator frequency, the local oscillator frequency of the CPT atomic clock is subjected to frequency division processing by the frequency divider, and a pulse signal of your first second is obtained.
Step 102: the discipline controller receives a second pulse signal input through an external port.
In an embodiment of the present application, the taming controller receives a second pulse-per-second signal input through the external port.
Preferably, the taming controller may further determine the validity of the second pulse-per-second signal in the case of the received second pulse-per-second signal.
Specifically, the taming controller determines whether the received second pulse signal meets a set condition, and if so, executes step 103; otherwise, the external port is continuously monitored, and the next second pulse signal sent by the external port is received.
In the present embodiment, the setting condition is that the second pulse-per-second signal is one of timing information of a satellite signal and timing information corresponding to a frequency of the second pulse-per-second signal not less than the local frequency.
Step 103: the discipline controller determines a frequency offset amount of a local oscillation frequency of the CPT atomic clock within a set time interval based on the first second pulse signal and the second pulse signal.
In this embodiment, first, the discipline controller performs frequency multiplication processing on the local oscillation frequency of the CPT atomic clock by using a frequency multiplier to obtain a set number of sub-frequency-multiplied clocks with equal phase difference.
Specifically, the taming controller performs M-fold frequency multiplication processing on the local oscillator clock corresponding to the local oscillator frequency of the CPT atomic clock by using a frequency multiplier to obtain a frequency-multiplied clock;
the tame controller utilizes the frequency multiplier to carry out quantization time delay processing on the frequency multiplication clock to generate K groups of sub frequency multiplication clocks with equal phase difference, and the time delay between the sub frequency multiplication clocks with equal phase difference is ToscV (M x K), phase difference 360 °/K;
wherein the period T of the frequency multiplication clock is ToscThe period of the local oscillator frequency is Tosc＝1/foscThe local oscillation frequency of the CPT atomic clock is foscM and K are natural numbers.
Secondly, the taming controller takes the rising delay of the second pulse signal as a time starting point and the rising delay of the first second pulse signal as a time end point, and counts a set number of sub-frequency multiplication clocks with equal phase difference to obtain the frequency offset of the local oscillation frequency of the CPT atomic clock.
Assuming that sub-multiplied clocks generating equal phase differences of K groups are C1, C2, … … and Ck, counting the sub-multiplied clocks respectively to obtain a1, a2, … … and ak by taking the rising delay of the second pulse signal as a time starting point and the rising delay of the first second pulse signal as a time ending point, and counting to obtain a, which is a1+ a2+ … … + ak, where a is the frequency offset of the local oscillation frequency of the CPT atomic clock.
It should be noted that, in the embodiment of the present application, the measurement accuracy of the time interval measurement method is M × K times of the measurement accuracy of the local oscillation frequency, and the measurement resolution can reach hundreds of picoseconds according to the used FPGA chip.
Preferably, in the embodiment of the present application, in the case where the discipline controller determines the frequency offset, the method further comprises:
and the taming controller carries out filtering processing on the frequency offset.
The taming controller can perform Kalman filtering on the frequency offset, and effectively suppresses phase jitter of the frequency offset.
Step 104: and the taming controller is used for taming and adjusting the local oscillation frequency of the CPT atomic clock according to the frequency offset.
In this embodiment of the present application, the taming controller, when determining that the frequency offset is greater than a first set threshold, adjusts a configuration parameter of a phase-locked loop chip according to the frequency offset, so that the local oscillation frequency of the CPT atomic clock is adjusted.
It should be noted that, when determining that the frequency offset is greater than the first set threshold, the taming controller adjusts the configuration parameters of the phase-locked loop chip based on the magnitude of the frequency offset, where the configuration parameters of the phase-locked loop chip described herein may be understood as configuration parameters for power-on initialization, and for the adjustment range of the configuration parameters of the phase-locked loop chip, the taming controller may determine based on the magnitude of the frequency offset, which is not specifically limited herein.
And under the condition that the discipline controller determines that the frequency offset is not greater than a first set threshold and is greater than a second set threshold, adjusting a C field voltage value according to the frequency offset so as to adjust the local oscillation frequency of the CPT atomic clock.
It should be noted that, under the condition that the taming controller determines that the frequency offset is not greater than a first set threshold and is greater than a second set threshold, the taming controller determines a frequency deviation rectification feedback quantity according to the magnitude of the frequency offset; and adjusting the voltage loaded on the C field through an analog-digital/digital-analog conversion module according to the frequency deviation rectifying feedback quantity. Here, a certain condition is satisfied between the frequency deviation correction feedback amount and the adjustment amount of the C field voltage, and the condition is not specifically limited in the embodiment of the present application.
Preferably, the taming controller triggers performance of an operation of detecting validity of the second pulse-per-second signal in a case where it is determined that the amount of frequency shift is not greater than a second set threshold.
According to the technical scheme provided by the embodiment of the application, the CPT atomic clock comprises a disciplinary controller, and the disciplinary controller determines the local oscillation frequency of the CPT atomic clock and obtains a first second pulse signal based on the local oscillation frequency; receiving a second pulse signal input through an external port; determining a frequency offset of a local oscillation frequency of the CPT atomic clock within a set time interval based on the first second pulse signal and the second pulse signal; and according to the frequency offset, performing tame adjustment on the local oscillation frequency of the CPT atomic clock. The method can accurately measure the frequency deviation of the CPT atomic clock based on a short time interval measuring method of frequency doubling and quantization time delay, different frequency taming control methods are provided according to the frequency deviation, the frequency of the CPT atomic clock can be taminated in a short time, and the frequency drift problem of the CPT atomic clock is restrained.
Fig. 2 is a schematic flowchart of a CPT atomic clock frequency taming control method according to an embodiment of the present application. The method may be as follows.
Step 201: and the taming controller completes initialization configuration in a starting-up state.
Step 202: the disciplined controller controls the temperature of the quantum system and the laser; and determining the local oscillator frequency of the CPT atomic clock under the condition that the temperature is stable.
Step 203: and the taming controller performs frequency division processing on the local oscillation frequency of the CPT atomic clock by using the frequency divider to obtain a pulse signal of the first second of you.
Step 204: the discipline controller receives a second pulse signal input through an external port.
Step 205: the taming controller judges whether the received second pulse signal meets the set condition, if so, the step 206 is executed; otherwise, the external port is continuously monitored, and the next second pulse signal sent by the external port is received.
In the present embodiment, the setting condition is that the second pulse-per-second signal is one of timing information of a satellite signal and timing information corresponding to a frequency of the second pulse-per-second signal not less than the local frequency.
Step 206: and the taming controller utilizes a frequency multiplier to carry out M times of frequency multiplication processing on the local oscillator clock corresponding to the local oscillator frequency of the CPT atomic clock to obtain a frequency multiplication clock.
Step 207: the tame controller utilizes the frequency multiplier to carry out quantization time delay processing on the frequency multiplication clock to generate K groups of sub frequency multiplication clocks with equal phase difference, and the time delay between the sub frequency multiplication clocks with equal phase difference is ToscV (M.K), phase difference 360 °/K.
Wherein the period T of the frequency multiplication clock is ToscThe period of the local oscillator frequency is Tosc＝1/foscThe local oscillation frequency of the CPT atomic clock is foscM and K are natural numbers.
Step 208: and the taming controller takes the rising delay of the second pulse signal as a time starting point and the rising delay of the first second pulse signal as a time end point, and counts a set number of sub-frequency multiplication clocks with equal phase difference to obtain the frequency offset of the local oscillation frequency of the CPT atomic clock.
Step 209: and the taming controller carries out filtering processing on the frequency offset.
Step 210: the taming controller judges whether the frequency offset is greater than a first set threshold and a second set threshold, and respectively executes the following steps according to the judgment result:
step 211: and under the condition that the frequency offset is determined to be larger than a first set threshold value, the taming controller adjusts configuration parameters of a phase-locked loop chip according to the frequency offset so as to adjust the local oscillation frequency of the CPT atomic clock.
Step 212: and under the condition that the discipline controller determines that the frequency offset is not greater than a first set threshold and is greater than a second set threshold, adjusting a C field voltage value according to the frequency offset so as to adjust the local oscillation frequency of the CPT atomic clock.
Step 213: the taming controller triggers execution of an operation of detecting validity of the second pulse signal in a case where it is determined that the frequency shift amount is not greater than a second set threshold.
The first set threshold is larger than the second set threshold.
The taming control method provided by the embodiment of the application can accurately measure the frequency deviation of the CPT atomic clock based on a short time interval measuring method of frequency doubling and quantization time delay, different frequency taming control methods are provided according to the frequency deviation, the frequency of the CPT atomic clock can be taminated in a short time, the frequency drift problem of the CPT atomic clock is restrained, the mode provided by the embodiment of the application is realized through a taming controller built in the CPT atomic clock, the structure is simple, the debugging is easy, the automatic control and the autonomous operation of the frequency tamination of the CPT atomic clock are improved, and the frequency tamination of the CPT atomic clock is flexible and convenient to operate.
Fig. 3 is a schematic structural diagram of a CPT atomic clock frequency taming control device according to an embodiment of the present application. The disciplined control apparatus is included in the CPT atomic clock, including:
a determining unit 301, configured to determine a local oscillation frequency of the CPT atomic clock, and obtain a first second pulse signal based on the local oscillation frequency;
a receiving unit 302 for receiving a second pulse-per-second signal input through an external port;
a processing unit 303, configured to determine, based on the first second pulse signal and the second pulse signal, a frequency offset of a local oscillation frequency of the CPT atomic clock within a set time interval;
an adjusting unit 304, configured to perform disciplinary adjustment on the local oscillation frequency of the CPT atomic clock according to the frequency offset.
In another embodiment of the present application, the determining, by the processing unit 303, a frequency offset of a local oscillation frequency of the CPT atomic clock in a set time interval based on the first second pulse signal and the second pulse signal includes:
carrying out frequency multiplication processing on the local oscillation frequency of the CPT atomic clock by using a frequency multiplier to obtain a set number of sub frequency multiplication clocks with equal phase difference;
and counting a set number of sub-frequency multiplication clocks with equal phase difference by taking the rising delay of the second pulse signal as a time starting point and the rising delay of the first second pulse signal as a time ending point to obtain the frequency offset of the local oscillation frequency of the CPT atomic clock.
In another embodiment of the present application, the processing unit 303 performs frequency multiplication on the local oscillation frequency of the CPT atomic clock by using a frequency multiplier to obtain a set number of sub-multiplied clocks with equal phase difference, including:
performing M times of frequency multiplication processing on a local oscillator clock corresponding to the local oscillator frequency of the CPT atomic clock by using a frequency multiplier to obtain a frequency multiplication clock;
the frequency multiplier is used for carrying out quantization time delay processing on the frequency multiplication clock to generate K groups of sub frequency multiplication clocks with equal phase difference, and the time delay between the sub frequency multiplication clocks with equal phase difference is ToscV (M x K), phase difference 360 °/K;
wherein the period T of the frequency multiplication clock is ToscThe period of the local oscillator frequency is Tosc＝1/foscThe local oscillation frequency of the CPT atomic clock is foscM and K are natural numbers.
In another embodiment of the present application, the determining, by the processing unit 303, a frequency offset of a local oscillation frequency of the CPT atomic clock in a set time interval based on the first second pulse signal and the second pulse signal includes:
determining a frequency offset of a local oscillation frequency of the CPT atomic clock within a set time interval based on the first second pulse signal and the second pulse signal under the condition that the second pulse signal is determined to meet a set condition;
the setting condition is that the second pulse per second signal is one of timing information of a satellite signal and timing information corresponding to a frequency not less than the local oscillation frequency.
In another embodiment of the present application, the taming control apparatus further comprises: a filtering unit 305, wherein:
the filtering unit 305 is configured to perform filtering processing on the frequency offset when the frequency offset is determined.
In another embodiment of the present application, the adjusting unit 304 performs a disciplinary adjustment on the local oscillation frequency of the CPT atomic clock according to the frequency offset, including:
and under the condition that the frequency offset is determined to be larger than a first set threshold value, adjusting configuration parameters of a phase-locked loop chip according to the frequency offset so as to adjust the local oscillation frequency of the CPT atomic clock.
In another embodiment of the present application, the adjusting unit 304 performs a disciplinary adjustment on the local oscillation frequency of the CPT atomic clock according to the frequency offset, including:
and under the condition that the frequency offset is determined to be not greater than a first set threshold and greater than a second set threshold, adjusting the voltage value of the C field according to the frequency offset so as to adjust the local oscillation frequency of the CPT atomic clock.
In another embodiment of the present application, the taming control apparatus further comprises: a detection unit 306, in which,
the detecting unit 306 is configured to trigger execution of an operation of detecting validity of the second pulse-per-second signal when it is determined that the frequency offset is not greater than a second set threshold.
In another embodiment of the present application, the determining unit 301 determines the local oscillation frequency of the CPT atomic clock, including:
carrying out temperature control on the quantum system and the laser;
and determining the local oscillation frequency of the CPT atomic clock under the condition that the temperature is stable.
It should be noted that the tame control device provided in the embodiment of the present application may be implemented by software, or may be implemented by hardware, and is not limited specifically herein. The taming control device provided by the embodiment of the application can accurately measure the frequency deviation of the CPT atomic clock based on a short time interval measuring method of frequency doubling and quantization time delay, different frequency taming control methods are provided according to the frequency deviation, the frequency of the CPT atomic clock can be taminated in a short time, and the frequency drift problem of the CPT atomic clock is restrained.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, apparatus (device), or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (devices) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (8)
1. A CPT atomic clock frequency disciplinary control method is characterized in that a disciplinary controller is included in the CPT atomic clock, wherein:
the taming controller determines the local oscillation frequency of the CPT atomic clock and obtains a first second pulse signal based on the local oscillation frequency;
the taming controller receives a second pulse signal input through an external port;
the tame controller utilizes a frequency multiplier to carry out M times of frequency multiplication processing on a local oscillator clock corresponding to the local oscillator frequency of the CPT atomic clock to obtain a frequency multiplication clock;
the tame controller utilizes the frequency multiplier to carry out quantization time delay processing on the frequency multiplication clock to generate K groups of sub frequency multiplication clocks with equal phase difference, and the time delay between the sub frequency multiplication clocks with equal phase difference is ToscV (M x K), phase difference 360 °/K;
wherein, theThe period T of the frequency multiplication clock is ToscThe period of the local oscillator frequency is Tosc＝1/foscThe local oscillation frequency of the CPT atomic clock is foscM and K are natural numbers;
the taming controller takes the rising delay of the second pulse signal as a time starting point and the rising delay of the first second pulse signal as a time end point, and counts a set number of sub-frequency multiplication clocks with equal phase difference to obtain the frequency offset of the local oscillation frequency of the CPT atomic clock;
and the taming controller is used for taming and adjusting the local oscillation frequency of the CPT atomic clock according to the frequency offset.
2. The discipline control method as claimed in claim 1, wherein the discipline controller determines a frequency offset of a local oscillation frequency of the CPT atomic clock within a set time interval based on the first second pulse signal and the second pulse signal, including:
the taming controller determines a frequency offset of a local oscillation frequency of the CPT atomic clock within a set time interval based on the first second pulse signal and the second pulse signal when determining that the second pulse signal satisfies a set condition;
the setting condition is that the second pulse per second signal is one of timing information of a satellite signal and timing information corresponding to a frequency not less than the local oscillation frequency.
3. The taming control method of claim 1, wherein in the case where the taming controller determines the frequency offset, the method further comprises:
and the taming controller carries out filtering processing on the frequency offset.
4. The taming control method according to claim 1, wherein the taming controller taming adjusts the local oscillation frequency of the CPT atomic clock according to the frequency offset, and includes:
and under the condition that the frequency offset is determined to be larger than a first set threshold value, the taming controller adjusts configuration parameters of a phase-locked loop chip according to the frequency offset so as to adjust the local oscillation frequency of the CPT atomic clock.
5. The taming control method according to claim 1, wherein the taming controller taming adjusts the local oscillation frequency of the CPT atomic clock according to the frequency offset, and includes:
and under the condition that the discipline controller determines that the frequency offset is not greater than a first set threshold and is greater than a second set threshold, adjusting a C field voltage value according to the frequency offset so as to adjust the local oscillation frequency of the CPT atomic clock.
6. The taming control method according to claim 1, characterized in that said method further comprises:
the taming controller triggers execution of an operation of detecting validity of the second pulse signal in a case where it is determined that the frequency shift amount is not greater than a second set threshold.
7. The taming control method of claim 1, wherein the taming controller determines a local oscillator frequency of the CPT atomic clock, comprising:
the disciplined controller controls the temperature of the quantum system and the laser;
and the discipline controller determines the local oscillation frequency of the CPT atomic clock under the condition that the temperature is stable.
8. A CPT atomic clock frequency disciplining control device for realizing the method as claimed in any one of claims 1 to 7, wherein the disciplining control device is included in the CPT atomic clock and comprises:
the determining unit is used for determining the local oscillation frequency of the CPT atomic clock and obtaining a first second pulse signal based on the local oscillation frequency;
a receiving unit for receiving a second pulse-per-second signal input through an external port;
the processing unit is used for determining the frequency offset of the local oscillation frequency of the CPT atomic clock in a set time interval based on the first second pulse signal and the second pulse signal;
and the adjusting unit is used for performing tame adjustment on the local oscillation frequency of the CPT atomic clock according to the frequency offset.
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