CN108172254A - A kind of Larger Dynamic range floats ground memristor equivalence element and non-linear controllable simulation resistance - Google Patents
A kind of Larger Dynamic range floats ground memristor equivalence element and non-linear controllable simulation resistance Download PDFInfo
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Abstract
The present invention proposes a kind of Larger Dynamic range and floats ground memristor equivalence element and non-linear controllable simulation resistance, and VCLR is realized using common technotron JFET, on this basis using input port boostrap circuit and output port boostrap circuit, increases dynamic range；Using two current followers, floating ground equivalence element is realized；In order to expand application range, the present invention is designed to arbitrarily convert between Two-port netwerk memristor and three Port Mirroring memristors, can also connect any other non-linear voltage source, be used as the non-linear controllable simulation resistance of a Larger Dynamic range.The Larger Dynamic range of the present invention, which floats ground memristor equivalence element, has the advantages that following electrical characteristic：Such as low cost, to the sense of static discharge muting sensitive, to the sense of electromagnetic interference muting sensitive, the floating ground circuit element that can arbitrarily access, arbitrary conversion between Two-port netwerk memristor and three Port Mirroring memristors can be achieved in Larger Dynamic range.
Description
Technical Field
The invention relates to the technical field of memristors, in particular to a memristor equivalent analog circuit.
Background
The memristor is used as a nonlinear passive two-terminal component of the loss, guessed by California and popularized to a memristor system, and has nonvolatile property. The broader definition holds that memristance can encompass all forms of two-terminal non-volatile memory based on the resistive switching effect.
The memristance M has the following relation:
whereinq and t represent magnetic flux, charge amount, and time variable, respectively. R [ q (t)]The slope of this function is called memristance, and resembles the following variable resistance:
wherein Vi(t) and Ii(t) represents memristive transient input voltage and input current.
Memristors are used today in many scientific fields to build memristive systems, such as biological process simulation, synthetic neurons, multilevel storage systems, and the like. Resistors can be generally classified into five categories: titanium dioxide memristors, polymer memristors, layered memristors, ferroelectric memristors and spin memristor systems, such as nerve-Bit memristors (Neuro-Bit) developed by Bio incorporated Technologies, LLC, usa, are the only commercially available memristors to date, which are nano-thin film resistors fabricated on a silicon wafer with memory, however, the memristor dynamic range is small, the testing equipment requirements are high, the influence of the working environment is large, and the selling price is high. The application of neural bit memristance is therefore largely limited by the above. The method has the advantages that the method is very meaningful in exploring the memristive floating equivalent element with low cost and large dynamic range.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a method for realizing a large-dynamic-Range Floating earth Memristor Equivalent element (A Large dynamic Range flowing Equivalent Circuit of memory, LDRFECM) by using a Voltage-Controlled Linear Resistor (VCLR), wherein the LDRFECM applies an input port bootstrap Circuit and an output port bootstrap Circuit, and realizes the increase of the dynamic Range; the VCLR is realized by using a common Junction Field Effect Transistor (JFET); two current followers are adopted, so that a floating equivalent element is realized; in order to expand the application range, the memory device is designed to be capable of switching between two-port memristors and three-port mirror image memristors.
The invention adopts the following technical scheme:
a large dynamic range floating ground memristive equivalent element (LDRFECM) comprising a large dynamic range floating ground Voltage Controlled Linear Resistance (VCLR) and a memristive descriptive function circuit; wherein,
the large dynamic range floating ground VCLR comprises a JFET, an input port bootstrap circuit, an output port bootstrap circuit and two current followers; the input port bootstrap circuit and the output port bootstrap circuit comprise two bootstrap circuits and two voltage followers A2,A5Subtracter A14Adder A13(ii) a The first bootstrap circuit is composed of a proportional mixer A3And adder A9The second bootstrap circuit is composed of a proportional mixer A4And adder A10the input port bootstrap circuit and the output port bootstrap circuit have a scale factor α satisfying 0 < α < 1, A3As the input port a, a of the VCLR4As the output port B of the VCLR; adder A9Mixing proportioner A4Output and voltage follower a2Following input voltage VAAddition, adder A10Mixing proportioner A3Output and voltage follower a5Following input voltage VBAddition, adder A9As the output of the first bootstrap circuit, an adderA10As the output of the second bootstrap circuit; the output voltage of the first bootstrap circuit and the output voltage of the second bootstrap circuit pass through a subtracter A14Making a difference, the adder A13A subtractor A14The output voltage of the second bootstrap circuit, the voltage of the control voltage source, and the adder a13The output of the JFET controls the driving end of the JFET; the current follower realizes the input current I of the large dynamic range floating ground VCLRinOutput current IoutDrain-source current I with JFETDSthe three are equal, so that the input resistance of the large-dynamic-range floating VCLR is enlarged by 1/α times, the memristor description function circuit comprises a memristor input end E and a control voltage output end C, and the memristor description function circuit enables the output control voltage V to be equalCAnd an input voltage VEIs related to the historical information of;
and connecting the input end of a control voltage source of the large-dynamic-range floating ground VCLR with the control voltage output end C of the memristor description function circuit to form an LDRFECM.
Furthermore, the input end of the first current follower is connected with the input port a of the VCLR, the output end of the first current follower is connected with the first port of the JFET, the input end of the second current follower is connected with the second port of the JFET, and the output end of the second current follower is connected with the output port B of the VCLR.
Further, the proportioner A3is connected with the input port A of the VCLR, the reverse end is grounded through a resistor with the resistance value r, the output end is connected with the reverse end through a resistor with the resistance value (1- α) r, and the proportional mixer A4is connected with the output port B of the VCLR, the reverse end is grounded through a resistor with the resistance value r, the output end is connected with the reverse end through a resistor with the resistance value (1- α) r, and the adder A9Output voltage V of9＝VA+(1-α)VBAnd adder A10Output voltage V of10＝VB+(1-α)VAWherein V isAIs the input voltage, V, of the VCLRBIs the output power of the VCLRAnd (6) pressing.
Further, the input port A of the VCLR and the output port B of the VCLR are used as the input and output ports of the LDRFECM, and the memristor R [ q (t) of the LDRFECM]Is always subjected to VC(t) control; at this time, the LDRFECM is a three-terminal mirror memristor.
Further, an input port A of the VCLR and an output port B of the VCLR are directly connected with the memristive input end E through a subtracter, and (V)A-VB) The electrical characteristics of the memristor are directly controlled; at this point, the LDRFECM is a two-port conventional memristor.
Further, the JFET is an N-channel JFET or a P-channel JFET.
On the other hand, the invention also provides a nonlinear controllable analog resistor with a large dynamic range, which comprises a JFET, an input port bootstrap circuit, an output port bootstrap circuit and two current followers; the input port bootstrap circuit and the output port bootstrap circuit comprise two bootstrap circuits and two voltage followers A2,A5Subtracter A14Adder A13(ii) a The first bootstrap circuit is composed of a proportional mixer A3And adder A9The second bootstrap circuit is composed of a proportional mixer A4And adder A10the input port bootstrap circuit and the output port bootstrap circuit have a scale factor α satisfying 0 < α < 1, A3As the input ports A, A of the nonlinear controllable analog resistor4The non-inverting input end of the non-linear controllable analog resistor is used as an output port B of the non-linear controllable analog resistor; adder A9Mixing proportioner A4Output and voltage follower a2Following input voltage VAAddition, adder A10Mixing proportioner A3Output and voltage follower a5Following input voltage VBAddition, adder A9As the output of the first bootstrap circuit, adder a10As the output of the second bootstrap circuit; output voltage of the first bootstrap circuit and output of the second bootstrap circuitThe output voltage passes through a subtracter A14Making a difference, the adder A13A subtractor A14The output voltage of the second bootstrap circuit, the voltage of the control voltage source, and the adder a13The output of the JFET controls the driving end of the JFET; the current follower realizes the input current I of the nonlinear controllable analog resistorinOutput current IoutDrain-source current I with JFETDSthe three are equal, so that the input resistance of the nonlinear controllable analog resistor is enlarged by 1/α times.
The invention has the beneficial effects that: the large-dynamic-range floating memristor equivalent element LDFECM realizes equivalent floating memristors by using the JFET. Compared with neural bit memristors and other memristors, the LDRFECM has the advantages of the following electrical characteristics: for example, the floating circuit element has low cost, low sensitivity to electrostatic discharge and low sensitivity to electromagnetic interference, can be accessed at will, has a large dynamic range, and can realize the random conversion between the two-port memristor and the three-port mirror memristor. In addition, the input end of the control voltage source of the large dynamic range floating ground VCLR can be not connected with the control voltage output end C of the memristor description function circuit, and the input end can be connected with any other nonlinear voltage source, and the LDRFECM is converted into a large dynamic range nonlinear controllable analog resistor.
Drawings
FIG. 1 is a circuit diagram of the high dynamic range floating VCLR of the present invention;
FIG. 2 is a circuit diagram of a hardware implementation of a descriptive function of a quadratic nonlinear magneto-controlled memristor.
Detailed Description
The invention is further described with reference to the following description and embodiments in conjunction with the accompanying drawings.
Large dynamic range floating memristor equivalent element LDRFC for realizing the inventionM, firstly realizing a large dynamic range floating voltage-controlled linear resistor VCLR, as shown in figure 1, wherein a parameter 0 < α < 1, A is an input port, B is an output port, C is an input port of the VCLR control voltage source, and V isA(t) denotes an input voltage source, VB(t) voltage source for output, VC(t) denotes a control voltage source, IinAnd IoutThe input and output currents of the VCLR are shown separately and D, G, S shows the drain, gate and source of the JFET respectively (G is drawn in the middle of the JFET channel to show D and S are interchangeable, for simplicity we will only use an N-channel JFET as an example to analyse below, and we can draw similar conclusions for a P-channel JFET).
For an N-channel JFET, it should satisfy VDSGreater than 0, when 0 < VGS＜VPAnd | VGD|＝|VGS-VDS|＜VPWhen it is operated in the variable resistance region (triode region), the drain current can be expressed as:
wherein IDS、IDSS、VP、VGS、VDSRespectively representing drain-source current, zero gate-source voltage saturation current, pinch-off voltage, gate-source voltage and drain-source voltage of the JFET. Therefore, from equation (3), the resistance R between the drain and source of the JFET can be derivedDS：
The formulae (3) and (4) show that RDSBy V onlyGSWhen V isDSVery small, JFETs are an approximation of VCLR. However, with VDSIncrease of (A) RDSNot only dependent on VGSBut follows VDSIs increased by an increase ofDSAnd VDSBegin to deviate from the linear relationship.
Therefore, to obtain a VCLR, we should increase the V of the JFETDSDynamic range. In FIG. 1, (A)3And A9)，(A4And A10) Two bootstrap circuits respectively. A. the2And A5Is two voltage followers, A3、A4Are two phase-identical proportioners, A9And A10Is two adders which can derive V3＝(2-α)VA，V4＝(2-α)VB，V′3＝(1-α)VA，V′4＝(1-α)VB，V9＝VA+(1-α)VB，V10＝VB+(1-α)VA. Then, A14Is a subtracter, we get V14＝(V9-V10)/2＝α(VA-VB)/2。A13Are adders with the same phase, we get VG＝V14+V10+VC＝α(VA-VB)/2+VB+(1-α)VA+VC. In addition, there is V according to the virtual short and virtual break characteristics of the operational amplifierD＝VN11＝VP11＝V9＝VA+(1-α)VB,VS＝VN12＝VP12＝V10＝VB+(1-α)VAAnd VDS＝VD-VS＝α(VA-VB). Thus, we obtain:
VGS＝VG-VS＝α(VA-VB)/2+VC＝VDS/2+VC. (5)
substituting formula (5) into formula (4) yields:
the expressions (6) and (7) show that V of JFETDSthe dynamic range is expanded by 1/alpha.R by the two bootstrap circuitsDSIs a composed of VCControlled VCLR. It is worth noting that for an N-channel JFET, because VDS＞0,0＜VGS＜VPAnd | VGD|＝|VGS-VDS|＜VPAs can be seen from the formula (5), VA、VB、VCShould satisfy VA＞VB，-α(VA-VB)/2＜VC＜VP-α(VA-VB) V and/2C-α(VA-VB)/2|＜VP。
Furthermore, to obtain a floating ground resistance, we need to let Iin＝Iout. In FIG. 1, (A)1,A7,A11) And (A)6,A8,A12) Respectively two current followers. Therefore, we can deduce VN12＝VP12＝V10＝VB+(1-α)VA＝V12+rIDS、VN11＝VP11＝V9＝VA+(1-α)VB＝V11-rIDS. Thus we get V12＝VB+(1-α)VA-rIDS，V11＝VA+(1-α)VB+rIDS. Thus, for A1And A6Are two voltage followers, we get:
V8＝V10+VB-V12＝VB+rIDS, (8)
V7＝V9+VA-V11＝VA-rIDS. (9)
from formulas (8) and (9), it can be obtained:
Iin＝(VA-V7)/r＝Iout＝(V8-VB)/r＝IDS. (10)
formula (10) showsin＝Iout＝IDSIs realized by more than two current followers. Therefore, the input resistance R with large dynamic range floating VCLR is derived from equation (7) and equation (10)AB(t) can be expressed as:
comparing formula (6) with formula (11), we can further see that RAB＝(1/α)RDSthe input resistance of the large dynamic range floating VCLR is increased by 1/α over the JFET alone.
Next, the memristive equivalent element ldrefcm is implemented. From equation (2), we can see that when subjected to an excitation signal, the memristor contains both the history information of the device and the information of the current excitation signal. The amount of charge passing for memristance isWhereinIs a first order integral operator. From equation (2), the memristor R [ q (t) ]can be derived]：
R[q(t)]＝M(q)+qdM(q)/dq, (12)
Under specific conditions, M [ q (t)]May be a theoretical arbitrary analytical function of q (t). Thus in order to realize the control voltage source V in fig. 2CLDRFECM of (t) and equation (11), should be based on the electrical characteristics of the memristor:
RAB(t)＝R[q(t)]. (13)
equation (13) shows that the voltage source V is controlled in order to realize FIG. 2CThe LDRFECM of (t) needs to be generated by memristive equivalent elements. The dynamic behavior of memristors is related to their different processes and materials. However, some memristor physical device modesType, it is difficult to describe mathematical expressions, such as neural point memristors, so memristors that can be modeled mathematically are more useful. Corresponding equivalent elements of different memristive dynamic mathematical models are different. Without loss of generality, a description function of a quadratic nonlinear magnetic control memristor is taken as an example of an equivalent element of the memristor, and is shown in FIG. 2. The described quadratic power memristor description function circuit is only used for producing control voltage source VC(t) one example is given. In fact, any memristor describing function circuit generated by memristor describing function circuit according to formula (1) and formula (2) broadly defined by memristor nonvolatileC(t) can be used as a control voltage source of a large dynamic range floating ground VCLR to generate a correspondingly defined memristive equivalent element.
In FIG. 2, E is the memristive input of a quadratic function, VEIs the equivalent control voltage. Port C in fig. 2 is the same as the port in fig. 1. A. the15Is an inverting integrator and A16Is a reverse ratio mixer, gM1Is the multiplicative gain of the multiplier. Therefore, according to the virtual short and virtual break characteristics of the operational amplifier, there are:
VC(t)＝-gM[-1/(rc)∫VE(t)dt]2＝-gM1/(rc)2[∫VE(t)dt]2. (14)
substituting equation (14) into equations (11) and (13) we obtain:
formula (15) shows RAB(t) relates to history information of second power memristances, the non-volatility of which depends on the second power of the equivalent control voltage integral.
It should be noted that, as can be further observed from the above discussion, first, the input terminal of the control voltage source of the large dynamic range floating ground VCLR is connected to the voltage output terminal of the memristive equivalent element, which is an ldrefec. The input and output ports (ports a and B in fig. 1) of LDRFECM are then taken as the input and output ports of the memristor, and then the memristor in the circuitry may be replaced by the large dynamic range floating memristor equivalent element of the present invention.
Secondly, in the example of fig. 2, due to the control voltage source VC(t) is the memristor R [ q (t) of LDRFECM generated by memristor equivalent element]Independent of its input potential difference (V)A-VB) And (5) controlling. Regardless of (V)A-VB) What is, the memory resistance R [ q (t) of LDRFECM]Is always subjected to VCAnd (t) controlling. Thus, under this condition, the LDRFECM is effectively a three-port mirror memristor.
Again, ports a and B in fig. 1 may be directly connected to port E in fig. 2 through a subtractor, (V)A-VB) Directly control the electrical characteristics of the memristor itself, VE(t)＝VA(t)-VB(t) of (d). In this case, the LDRFECM becomes a two-port conventional memristor.
The input end C of the control voltage source of the large-dynamic-range floating VCLR can be connected with any other nonlinear voltage source instead of the control voltage output end C of the memristor description function circuit, and the LDRFECM becomes a large-dynamic-range nonlinear controllable analog resistor which is a special case of a large-dynamic-range floating memristor equivalent element.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (10)
1. A large dynamic range floating memristive equivalent element (LDRFECM), characterized in that: the equivalent element comprises a large dynamic range floating voltage-controlled linear resistance (VCLR) and a memristive description function circuit; wherein,
the large dynamic range floating ground VCLR comprises a JFET, an input port bootstrap circuit, an output port bootstrap circuit and two current followers; the input port bootstrap circuit and the output port bootstrap circuit comprise two bootstrap circuits and two voltage followers A2,A5Subtracter A14Adder A13(ii) a First fromThe circuit is composed of a proportional mixer A3And adder A9The second bootstrap circuit is composed of a proportional mixer A4And adder A10the input port bootstrap circuit and the output port bootstrap circuit have a scale factor α satisfying 0 < α < 1, A3As the input port a, a of the VCLR4As the output port B of the VCLR; adder A9Mixing proportioner A4Output and voltage follower a2Following input voltage VAAddition, adder A10Mixing proportioner A3Output and voltage follower a5Following input voltage VBAddition, adder A9As the output of the first bootstrap circuit, adder a10As the output of the second bootstrap circuit; the output voltage of the first bootstrap circuit and the output voltage of the second bootstrap circuit pass through a subtracter A14Making a difference, the adder A13A subtractor A14The output voltage of the second bootstrap circuit, the voltage of the control voltage source, and the adder a13The output of the JFET controls the driving end of the JFET; the current follower realizes the input current I of the large dynamic range floating ground VCLRinOutput current IoutDrain-source current I with JFETDSthe three are equal, so that the input resistance of the large dynamic range floating VCLR is enlarged by 1/α times;
the memristor description function circuit comprises a memristor input end E and a control voltage output end C, and the memristor description function circuit enables the output control voltage VCAnd an input voltage VEIs related to the historical information of;
and connecting the input end of a control voltage source of the large-dynamic-range floating ground VCLR with the control voltage output end C of the memristor description function circuit to form an LDRFECM.
2. An equivalent element according to claim 1, characterized in that: using the input port A and output port B of VCLR as input and output ports of LDRFECMMemristor R [ q (t)]Is always subjected to VC(t) control; at this time, the LDRFECM is a three-terminal mirror memristor.
3. An equivalent element according to claim 1, characterized in that: directly connecting the input port A of the VCLR and the output port B of the VCLR with the memristive input end E through a subtracter, wherein (V) isA-VB) The electrical characteristics of the memristor are directly controlled; at this point, the LDRFECM is a two-port conventional memristor.
4. An equivalent element according to claim 1, characterized in that: the input end of the first current follower is connected with the input port A of the VCLR, the output end of the first current follower is connected with the first port of the JFET, the input end of the second current follower is connected with the second port of the JFET, and the output end of the second current follower is connected with the output port B of the VCLR.
5. An equivalent element according to claim 1, characterized in that: the proportioner A3is connected with the input port A of the VCLR, the reverse end is grounded through a resistor with the resistance value r, the output end is connected with the reverse end through a resistor with the resistance value (1- α) r, and the proportional mixer A4is connected with the output port B of the VCLR, the reverse end is grounded through a resistor with the resistance value r, the output end is connected with the reverse end through a resistor with the resistance value (1- α) r, and the adder A9Output voltage V of9＝VA+(1-α)VBAnd adder A10Output voltage V of10＝VB+(1-α)VAWherein V isAIs the input voltage, V, of the VCLRBIs the output voltage of the VCLR.
6. An equivalent element according to claim 1, characterized in that: the JFET is an N-channel JFET or a P-channel JFET.
7. Large-dynamic-range nonlinear controllable simulationA resistor, characterized by: the nonlinear controllable analog resistor comprises a JFET, an input port bootstrap circuit, an output port bootstrap circuit and two current followers; the input port bootstrap circuit and the output port bootstrap circuit comprise two bootstrap circuits and two voltage followers A2,A5Subtracter A14Adder A13(ii) a The first bootstrap circuit is composed of a proportional mixer A3And adder A9The second bootstrap circuit is composed of a proportional mixer A4And adder A10the input port bootstrap circuit and the output port bootstrap circuit have a scale factor α satisfying 0 < α < 1, A3As the input ports A, A of the nonlinear controllable analog resistor4The non-inverting input end of the non-linear controllable analog resistor is used as an output port B of the non-linear controllable analog resistor; adder A9Mixing proportioner A4Output and voltage follower a2Following input voltage VAAddition, adder A10Mixing proportioner A3Output and voltage follower a5Following input voltage VBAddition, adder A9As the output of the first bootstrap circuit, adder a10As the output of the second bootstrap circuit; the output voltage of the first bootstrap circuit and the output voltage of the second bootstrap circuit pass through a subtracter A14Making a difference, the adder A13A subtractor A14The output voltage of the second bootstrap circuit, the voltage of the control voltage source, and the adder a13The output of the JFET controls the driving end of the JFET; the current follower realizes the input current I of the nonlinear controllable analog resistorinOutput current IoutDrain-source current I with JFETDSthe three are equal, so that the input resistance of the nonlinear controllable analog resistor is enlarged by 1/α times.
8. The nonlinear controllable analog resistor of claim 7, wherein: the input end of the first current follower is connected with the input port A of the nonlinear controllable analog resistor, the output end of the first current follower is connected with the first port of the JFET, the input end of the second current follower is connected with the second port of the JFET, and the output end of the second current follower is connected with the output port B of the nonlinear controllable analog resistor.
9. The nonlinear controllable analog resistor of claim 7, wherein: the proportioner A3the non-linear controllable analog resistor is connected with the input end A of the non-linear controllable analog resistor at the same phase end, the reverse end is grounded through a resistor with the resistance value r, the output end is connected with the reverse end through a resistor with the resistance value of (1- α) r, and the proportional mixer A4the non-linear controllable analog resistor is connected with an output port B of the non-linear controllable analog resistor, an inverting terminal is grounded through a resistor with the resistance value r, and an output terminal is connected with the inverting terminal through a resistor with the resistance value of (1- α) r, and an adder A9Output voltage V of9＝VA+(1-α)VBAnd adder A10Output voltage V of10＝VB+(1-α)VAWherein V isAIs the input voltage, V, of the nonlinear controllable analog resistorBIs the output voltage of the nonlinear controllable analog resistor.
10. The nonlinear controllable analog resistor of claim 7, wherein: and the input end of a control voltage source of the nonlinear controllable analog resistor is connected with the nonlinear voltage source.
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| CN201810002582.5A Active CN108172254B (en) | 2018-01-02 | 2018-01-02 | Large-dynamic-range floating memristor equivalent element and nonlinear controllable analog resistor |
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| CN108172254B (en) | 2020-12-11 |
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