CN108109661A - Flash memory and its operating method - Google Patents
Flash memory and its operating method Download PDFInfo
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- CN108109661A CN108109661A CN201611055850.7A CN201611055850A CN108109661A CN 108109661 A CN108109661 A CN 108109661A CN 201611055850 A CN201611055850 A CN 201611055850A CN 108109661 A CN108109661 A CN 108109661A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
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Abstract
A kind of flash memory, using with the two-dimentional random number matrix of generation one, it is characterised in that including：One process circuit；And a two-dimensional linear feedback shift register, the process circuit is coupled, the two-dimensional linear feedback shift register indicates to perform following operation via the process circuit：One first linear feedback shift register of K bit length is provided to generate 2KOne First ray of 1 bit length；The variation combination of M kinds is wished to get, M*L bit is chosen with a constant spacing to form one second sequence than rising abruptly in i-th of the First ray；Convert a two-dimensional matrix of second sequence into MxL；And one second linear feedback shift register of L bit lengths is provided to the two-dimensional matrix to form the two-dimentional random number matrix of MxN, wherein N is equal to 2L‑1。
Description
Technical field
The present invention is related to a kind of flash memory, can particularly generate flash memory and its behaviour of two-dimentional random number matrix
Make method.
Background technology
From NAND quick-flash memory tolerance level (Endurance) and required bug patch code (Error Correcting
Code, ECC) correct the trend of bit number from the point of view of, the brilliant NAND Flash for wrapping (Single-Level Cell, SLC) of past individual layer is deposited
Reservoir is used only the bug patch code of 1 bit (bit) and smears write cycle time (Program/Erase Cycle) as 100K, has arrived 2x
Write cycle time is smeared during nanometer (nanometer) and just drops to 60K, double-deck brilliant bag (Multi-Level Cell, MLC) is then with processing procedure
Jumbo decline is presented in evolution, tolerance level, and bug patch code corrects bit number and exponential curve rising is presented.From pair of 5x nanometers of processing procedures
The write cycle time of smearing of layer crystal bag has 10K and the bug patch code of 4 bits, the write cycle time of smearing of the brilliant bag of the bilayer of 3x nanometers of processing procedures is needed to decline
To 5K and need the bug patch code of 8 bits, drop to 3K and need to 15 to 24 to the write cycle times of smearing of the brilliant bag of bilayer of 2x nanometer processing procedures
The bug patch code of bit.And three layer crystal bags (Triple-Level Cell, TLC) smear write cycle time more drop to below 1K and
Need the bug patch code of 72 to hundred bits.
Therefore, the algorithmic technique used during solving the problems, such as the data holding of NAND quick-flash memory is actually necessary.
The content of the invention
In order to which the data for increasing NAND quick-flash memory are held time, the present invention proposes that a kind of two-dimensional linear feedback shift is posted
Storage and flash memory are arranged the read and write of NAND square images with more random manner, use and reach what is equally addressed
NAND quick-flash memory reduces the chance being rewritten in a short time.The present invention should by two-dimensional linear feedback shift register
Used in flash memory, consistent, dull and similar bit crossfire (bit stream) is handled, with original data source
(data source) interaction calculates with mixing to generate new more random data stream.
According to one of specification described embodiment, a kind of application two-dimensional linear feedback shift register is provided to generate
One of one two-dimentional random number matrix flash memory, the two-dimensional linear feedback shift register is via the one of the flash memory
Process circuit indicates to perform following operation：One first linear feedback shift register of K bit length is provided to generate 2K-1
One First ray of a bit length；The variation combination of M kinds is wished to get, is risen abruptly in i-th of ratio of the First ray between a fixation
Away from choosing M*L bit to form one second sequence；Convert a two-dimensional matrix of second sequence into MxL；And provide L ratios
One second linear feedback shift register of bit length gives the two-dimensional matrix to form the two-dimentional random number matrix of MxN,
Middle N is equal to 2L-1。
According to one of specification described embodiment, a kind of flash memory is provided, which is characterized in that apply to generate
One two-dimentional random number matrix, including：One process circuit；And a two-dimensional linear feedback shift register, the process circuit is coupled,
The two-dimensional linear feedback shift register indicates to perform following operation via the process circuit：K bit length is provided
One first linear feedback shift register is to generate 2KOne First ray of -1 bit length；The variation combination of M kinds is wished to get, in institute
It states i-th of First ray and M*L bit is chosen with a constant spacing to form one second sequence than rising abruptly；Convert described second
Sequence is a two-dimensional matrix of MxL；And one second linear feedback shift register of L bit lengths is provided to the Two-Dimensional Moment
For battle array to form the two-dimentional random number matrix of MxN, wherein N is equal to 2L-1。
According to one of specification described embodiment, a kind of operating method of flash memory, the flash memory are provided
Reservoir generates a two-dimentional random number matrix, which is characterized in that the described method includes：One first linear feedback of K bit length is provided
Shift register is to generate 2KOne First ray of -1 bit length；The variation combination of M kinds is wished to get, in the of the First ray
I ratio rises abruptly chooses M*L bit to form one second sequence with a constant spacing；Second sequence is converted as the one of MxL
Two-dimensional matrix；And one second linear feedback shift register of L bit lengths is provided to the two-dimensional matrix to form MxN's
The two dimension random number matrix, wherein N are equal to 2L-1。
Wherein, the constant spacing is greater than the integer equal to 1.
Wherein, the K and L is greater than the integer equal to 2.
Wherein, the i is greater than being equal to 1 and less than 2K- 1 integer.
Wherein, each row of the two-dimensional matrix are non-full 0s.
For the enabled feature and technology contents for being further understood that the present invention, refer to below in connection with the present invention specifically
Bright and attached drawing, but these explanations are only for illustrating the present invention rather than the interest field of the present invention being appointed with institute's accompanying drawings
What limitation.
Description of the drawings
Fig. 1 shows the system block diagrams of flash memory of the present invention.
Fig. 2 shows that flash memory of the present invention is the schematic diagram of the brilliant bag of individual layer.
Fig. 3 A show the schematic diagram of linear feedback shift register of the present invention.
Fig. 3 B show the cyclic sequence schematic diagram of linear feedback shift register of the present invention.
Fig. 4 shows that flash memory of the present invention generates the flow diagram of two-dimentional random number matrix.
Fig. 5 A show the schematic diagram of linear feedback shift register of the present invention.
Fig. 5 B show the cyclic sequence schematic diagram of linear feedback shift register of the present invention.
Fig. 6 shows that flash memory of the present invention is the schematic diagram of double-deck brilliant bag.
Fig. 7 shows that flash memory of the present invention is the schematic diagram of three layer crystal bags.
Specific embodiment
Various exemplary embodiments will be more fully described referring to alterations below, shown in alterations
Exemplary embodiments.However, concept of the present invention may embody in many different forms, and it should not be construed as limited by institute herein
The exemplary embodiments of elaboration.Specifically, these exemplary embodiments are provided and so that the present invention will be detailed and complete, and will
The scope of concept of the present invention is fully conveyed to those who familiarize themselves with the technology.In all schemas, Ceng Ji areas can be lavished praise on oneself in order to clear
Size and relative size.Similar number indicates similar assembly always.
It is to be understood that although herein various assemblies or signal etc. may be described using term first, second, third, etc.,
But these components or signal should not be limited by these terms.These terms are to distinguish a component and another component, Huo Zheyi
Signal and another signal.In addition, as used herein, term "or" may list project depending on actual conditions including associated
Any one of or more persons all combinations.
It refer to shown in Fig. 1, the present invention provides a kind of flash memory 1, anti-including a process circuit 2 and a two-dimensional linear
Shift register 3 is presented, wherein two-dimentional line style feedback shift register 3 couples process circuit 2.Referring to shown in Fig. 2, being fast
Expression when flash memory 3 is individual layer crystalline substance bag, the wherein brilliant bag of individual layer are that each brilliant (cell) 4 that wrap includes a page layer (page) 5,
One page layer 5 includes a bit, i.e., one brilliant bag 4 includes a bit (bit).Flash memory 1 includes M row character code lines
(word line,WL)WL0~WLM-1, each row character code line WL0~WLM-1Respectively include a row bit line BL (bit line,
BL), bit line BL includes N number of bit BL0~BLN-1.Please again referring concurrently to shown in Fig. 3 A, Fig. 3 A are that a linear feedback shift is posted
One example of storage, Fig. 3 A are a linear feedback shift registers of 4 bits, of the invention and non-limiting linear feedback shift register
The bit number of device is 4, those skilled in the art can be according to flash memory the brilliant bag of individual layer, double-deck brilliant bag or three layer crystal bags, with
And the bit number of the number Come design linear feedback shift registers of the bit included per a line character code line.Another people in the art
It refer to during the bit number of member's design linear feedback shift register shown in the following table 1, table 1 is design linear feedback shift register
Comprising bit number n, tap is 2 linear feedback shift register (LFSR-2) and tap is that 4 linear feedback shift is posted
Storage (LFSR-4).For example, Fig. 3 A can the bit number n of the table of comparisons 1 be 4, tap is 2 linear feedback shift register (LFSR-
2) and tap position is the 3rd bit and the 4th bit.
The designing scheme of table 1 linear feedback shift register LFSR-2 and LFSR-4
As shown in figure 4, the flash memory 1 of the present invention can be applied to generate a two-dimentional random number matrix, two-dimentional line style feedback
Shift register 3 is applied in flash memory 1 to generate two-dimentional random number matrix, two-dimensional linear feedback shift register 3 via
The process circuit 2 of flash memory 1 indicates to perform two-dimentional random number matric generating method：S101) the one the of K bit length is provided
One linear feedback shift register is to generate 2KOne First ray of -1 bit length；S103 the variation combination of M kinds) is wished to get, in
I-th of ratio of First ray rises abruptly chooses M*L bit to form one second sequence with a constant spacing；S105 second) is converted
Sequence is a two-dimensional matrix of MxL；And S107) one second linear feedback shift register of L bit lengths is provided to two dimension
For matrix to form the two-dimentional random number matrix of MxN, wherein N is equal to 2L-1。
The example below is made skilled in the art realises that the present invention, not limitation is of the invention.In example, such as Fig. 3 B institutes
Show, present invention two dimension line style feedback shift register 3 is intended to generate applied to the one of flash memory 1 two-dimentional random number matrix, such as K
=4 and L=3, M=4 and N=7, i.e., including 4 row character code lines (word line, WL) WL0~WL3, each row character code line WL0~
WL3Including row bit line a BL, each row bit line BL respectively includes 7 bit BL0~BL6, wherein N is equal to 2L- 1, i.e. L=
3.In step S101) in, one first linear feedback shift register of K bit length is provided to generate 2K- 1 bit length
One First ray, wherein K are greater than the integer equal to 2, that is, provide the linear feedback shift register of K=4 bit lengths, 4 ratios
The linear feedback shift register of bit length provides 24The First ray of -1=15 bit lengths, such as with [0 11 0] for 4 bits
One initiation sequence of the linear feedback shift register of length, the linear feedback shift register of 4 bit lengths is according to side counterclockwise
It is [1 0111100010011 0] to the First ray for providing output.It is worth noting that, initiation sequence can
One group of sequence is arbitrarily chosen from Fig. 3 B, and initiation sequence is a sequence of non-full 0, First ray is a Xun Huan sequence of non-full 0
Row.
In step S103) in, the variation combination of M kinds is wished to get, rises abruptly in i-th of ratio of First ray and is chosen with a constant spacing
M*L bit is to form one second sequence, and wherein constant spacing is greater than the integer equal to 1, and L is greater than the integer equal to 2, i
It is greater than being equal to 1 and less than 2K- 1 integer.Such as it is risen abruptly using the 2nd ratio using constant spacing as 2 4*3=12 bits of selection
Second sequence is [0 1101011110 0].
In step S105) in, a two-dimensional matrix of second sequence into MxL is converted, i.e. the second sequence is converted to the two dimension of 4x3
Matrix, two-dimensional matrix is by [0 11；0 1 0；1 1 1；10 0] formed, each row of wherein two-dimensional matrix are non-full 0s
One sequence.It is worth noting that, in each row of two-dimensional matrix, when being all 0 if any 3 bits of either rank, then need to return to
Step b) reselects i-th of bit and constant spacing.
In step S107) in, one second linear feedback shift register of L bit lengths is provided to two-dimensional matrix to be formed
The two-dimentional random number matrix of MxN provides the linear feedback shift register of 3 bit lengths to two-dimensional matrix, wherein two-dimensional matrix
Each row an initiation sequence of 3 bits as the linear feedback shift register of 3 bit lengths so that each row can
Generate 2LOne sequence of -1 bit length, i.e., each row generate 23The sequence of -1=7 bit lengths is to form two-dimentional random number square
Battle array.As shown in Fig. 5 A and 5B, the initiation sequence of [0 1 1] of first row as the linear feedback shift register of 3 bit lengths,
Then the linear feedback shift register of 3 bit lengths is [0 10111 0] according to the sequence that counter clockwise direction provides output；The
Initiation sequence of [0 1 0] of two row as the linear feedback shift register of 3 bit lengths, then 3 bit lengths is linear anti-
It is [1 11001 0] that shift register, which is presented, according to the sequence that counter clockwise direction provides output；Tertial [1 1 1] are used as 3
The initiation sequence of the linear feedback shift register of bit length, then the linear feedback shift register of 3 bit lengths is according to the inverse time
The sequence that pin direction provides output is [0 01011 1]；Linear feedback of [1 0 0] of 4th row as 3 bit lengths
The initiation sequence of shift register, the then sequence that the linear feedback shift register of 3 bit lengths is exported according to counter clockwise direction offer
It is classified as [0 11100 1].
It is expression when double-deck crystalline substance wraps for flash memory 3 in addition, refer to shown in Fig. 6, wherein double-deck brilliant bag is each
Crystalline substance bag (cell) 4 includes two page layers (page) 5,6, each page of layer 5,6 includes a bit respectively, i.e. each crystalline substance bag 4
Including two bits.The difference of Fig. 6 and Fig. 2 is only that each row character code line WL0~WLM-1Include two row bit line BL respectivelylow、
BLhigh, each row bit line BLlow、BLhighInclude N number of bit BL respectively0~BLN-1.In one example, due to each row character code
Line WL0~WLM-1Including two row bit line BLlow、BLhigh, therefore caused by the two-dimentional line style feedback shift register 3 of the present invention
For the two-dimentional random number matrix of 2MxN.The present invention two-dimensional linear feedback shift register 3 via flash memory 1 process circuit
2 indicate to perform following operation：S101 one first linear feedback shift register of K bit length) is provided to generate 2K- 1
One First ray of bit length；S103 the variation combination of 2M kinds) is wished to get, is risen abruptly in i-th of ratio of First ray between a fixation
Away from choosing 2M*L bit to form one second sequence；S105 a two-dimensional matrix of second sequence into 2MxL) is converted；And
S107 one second linear feedback shift register of L bit lengths) is provided to two-dimensional matrix to form the two-dimentional random number square of 2MxN
Battle array, wherein N are equal to 2L-1。
In another example, flash memory 3 is double-deck brilliant bag, and flash memory 1 includes (M/2) row character code line (word
line,WL)WL0~WL(M/2)-1, each row character code line WL0~WL(M/2)-1Include two row bit line BL respectivelylow、BLhigh, it is each
Row bit line BLlow、BLhighInclude N number of bit BL respectively0~BLN-1, therefore two-dimentional 3 institute of line style feedback shift register of the present invention
Generate the two-dimentional random number matrix for being MxN.The present invention two-dimensional linear feedback shift register 3 via flash memory 1 place
Reason circuit 2 indicates to perform following operation：S101 one first linear feedback shift register of K bit length) is provided to generate
2KOne First ray of -1 bit length；S103 the variation combination of M kinds) is wished to get, i-th in First ray is more solid with one than rising abruptly
Determining deviation chooses M*L bit to form one second sequence；S105 a two-dimensional matrix of second sequence into MxL) is converted；And
S107 one second linear feedback shift register of L bit lengths) is provided to two-dimensional matrix to form the two-dimentional random number square of MxN
Battle array, wherein N are equal to 2L-1。
It refer to shown in Fig. 7, be expression when flash memory 3 is three layer crystal bag, wherein three layer crystal bags are each brilliant bags
(cell) 4 three page layers (page) 5,6,7 are included, each page of layer 5,6,7 includes a bit respectively, i.e. each crystalline substance bag 4
Including three bits.The difference of Fig. 7 and Fig. 2 is only that each row character code line WL0~WLM-1Include three row bit line BL respectivelylow、
BLmiddle、BLhigh, each row bit line BLlow、BLmiddle、BLhighInclude N number of bit BL respectively0~BLN-1.In one example,
Due to each row character code line WL0~WLM-1Including three row bit line BLlow、BLmiddle、BLhigh, therefore the two-dimentional line style of the present invention is anti-
The two-dimentional random number matrix for being 3MxN is presented caused by shift register 3.The present invention two-dimensional linear feedback shift register 3 via
The process circuit 2 of flash memory 1 indicates to perform following operation：S101 one first linear feedback for) providing K bit length is moved
Bit register is to generate 2KOne First ray of -1 bit length；S103 the variation combination of 3M kinds) is wished to get, in the of First ray
I ratio rises abruptly chooses 3M*L bit to form one second sequence with a constant spacing；S105 the second sequence) is converted as 3MxL's
One two-dimensional matrix；And S107) one second linear feedback shift register of L bit lengths is provided to two-dimensional matrix to be formed
The two-dimentional random number matrix of 3MxN, wherein N are equal to 2L-1。
In another example, flash memory 3 is three layer crystal bags, and flash memory 1 includes (M/3) row character code line (word
line,WL)WL0~WL(M/3)-1, each row character code line WL0~WL(M/3)-1Include three row bit line BL respectivelylow、BLmiddle、
BLhigh, each row bit line BLlow、BLmiddle、BLhighInclude N number of bit BL respectively0~BLN-1, therefore the two-dimentional line style of the present invention
It is the two-dimentional random number matrix of MxN caused by feedback shift register 3.The two-dimensional linear feedback shift register 3 of the present invention passes through
It is indicated to perform following operation by the process circuit 2 of flash memory 1：S101) one first linear feedback of K bit length is provided
Shift register is to generate 2KOne First ray of -1 bit length；S103 the variation combination of M kinds) is wished to get, in First ray
I-th of ratio rises abruptly chooses M*L bit to form one second sequence with a constant spacing；S105 the second sequence) is converted as MxL's
One two-dimensional matrix；And S107) one second linear feedback shift register of L bit lengths is provided to two-dimensional matrix to be formed
The two-dimentional random number matrix of MxN, wherein N are equal to 2L-1。
In conclusion two-dimensional linear feedback shift register of the present invention and flash memory will be consistent, dull and similar
Bit crossfire (bit stream) is handled to generate two-dimentional random number matrix, so as to original data source (data source)
Interaction calculates with mixing to generate new more random data stream.
It is all not to limit to the scope of the claims of the present invention the foregoing is merely the preferable possible embodiments of the present invention
The equivalent changes and modifications done according to scope of the present invention patent should all belong to the covering scope of the present invention.
Claims (10)
1. it is a kind of using two-dimensional linear feedback shift register to generate a flash memory of a two-dimentional random number matrix, described two
Dimensional linear feedback shift register indicates that perform following operation feature exists via a process circuit of the flash memory
In：
One first linear feedback shift register of K bit length is provided to generate 2KOne First ray of -1 bit length；
The variation combination of M kinds is wished to get, i-th in the First ray chooses M*L bit with shape than rising abruptly with a constant spacing
Into one second sequence；
Convert a two-dimensional matrix of second sequence into MxL；And
One second linear feedback shift register of L bit lengths is provided to the two-dimensional matrix to form the two dimension of MxN
Random number matrix, wherein N are equal to 2L-1。
2. flash memory as described in claim 1, which is characterized in that the constant spacing is greater than the integer equal to 1, and
K and L is greater than the integer equal to 2.
3. flash memory as described in claim 1, which is characterized in that the i is greater than being equal to 1 and less than 2K- 1 integer.
4. flash memory as described in claim 1, which is characterized in that each row of the two-dimensional matrix are non-full 0s.
5. a kind of flash memory, which is characterized in that it applies to generate a two-dimentional random number matrix, including：
One process circuit；And
One two-dimensional linear feedback shift register, couples the process circuit, the two-dimensional linear feedback shift register via
The process circuit indicates to perform following operation：
One first linear feedback shift register of K bit length is provided to generate 2KOne First ray of -1 bit length；
The variation combination of M kinds is wished to get, i-th in the First ray chooses M*L bit with shape than rising abruptly with a constant spacing
Into one second sequence；
Convert a two-dimensional matrix of second sequence into MxL；And
One second linear feedback shift register of L bit lengths is provided to the two-dimensional matrix to form the two dimension of MxN
Random number matrix, wherein N are equal to 2L-1。
6. flash memory as claimed in claim 5, which is characterized in that the constant spacing is greater than the integer equal to 1, and
The K and L is greater than the integer equal to 2.
7. flash memory as claimed in claim 5, which is characterized in that the i is greater than being equal to 1 and less than 2K- 1 integer.
8. flash memory as claimed in claim 5, which is characterized in that each row of the two-dimensional matrix are non-full 0s.
9. a kind of operating method of flash memory, the flash memory generates a two-dimentional random number matrix, which is characterized in that institute
The method of stating includes：
One first linear feedback shift register of K bit length is provided to generate 2KOne First ray of -1 bit length；
The variation combination of M kinds is wished to get, i-th in the First ray chooses M*L bit with shape than rising abruptly with a constant spacing
Into one second sequence；
Convert a two-dimensional matrix of second sequence into MxL；And
One second linear feedback shift register of L bit lengths is provided to the two-dimensional matrix to form the two dimension of MxN
Random number matrix, wherein N are equal to 2L-1。
10. the operating method of flash memory as claimed in claim 9, which is characterized in that each row of the two-dimensional matrix
It is non-full 0.
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