CN108108282B - Information processing method and device and electronic equipment - Google Patents
Information processing method and device and electronic equipment Download PDFInfo
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- CN108108282B CN108108282B CN201711285913.2A CN201711285913A CN108108282B CN 108108282 B CN108108282 B CN 108108282B CN 201711285913 A CN201711285913 A CN 201711285913A CN 108108282 B CN108108282 B CN 108108282B
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- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
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Abstract
The embodiment of the invention discloses an information processing method and device and electronic equipment. The information processing method comprises the following steps: displaying a Graphical User Interface (GUI) of the frequency reduction processing of the processor when a preset condition is met, wherein a transmission path of a frequency reduction signal which causes the frequency reduction of the processor is displayed in the GUI; and if the control operation based on the GUI and indicating to perform frequency reduction positioning is detected, positioning a node causing the frequency reduction of the processor in the transmission path according to the control operation.
Description
Technical Field
The present invention relates to the field of information technologies, and in particular, to an information processing method and apparatus, and an electronic device.
Background
When an electronic device operates, Central Processing Unit (CPU) down-conversion (throttle) is a common phenomenon in the electronic device. The frequency of the electronic device may be lowered for a variety of reasons, for example, an overheating phenomenon occurs in a certain processing link, and a jamming phenomenon occurs in a certain processing environment.
In the prior art, only the frequency reduction event is simply recorded through a log, and the simple recording is not applicable to analysis of the cause and elimination of the frequency reduction, so how to perform frequency reduction analysis and frequency reduction elimination on the frequency reduction of the processor is still a problem to be solved in the prior art.
Disclosure of Invention
In view of the above, embodiments of the present invention are directed to an information processing method and apparatus, and an electronic device, which at least partially solve the above problems.
In order to achieve the purpose, the technical scheme of the invention is realized as follows:
in a first aspect, an embodiment of the present invention provides an information processing method, including:
displaying a Graphical User Interface (GUI) of the frequency reduction processing of the processor when a preset condition is met, wherein a transmission path of a frequency reduction signal which causes the frequency reduction of the processor is displayed in the GUI;
and if the control operation based on the GUI and indicating to perform frequency reduction positioning is detected, positioning a node causing the frequency reduction of the processor in the transmission path according to the control operation.
Optionally, the display of the corresponding node and/or transmission connection on the GUI is changed according to the transfer condition of the down-conversion signal.
Optionally, an operation control is further displayed on the GUI;
the method further comprises the following steps:
detecting the control operation acting on the operation control.
Optionally, the displaying the graphical user interface of the processor frequency reduction when the predetermined condition is satisfied includes:
and displaying a transmission path containing the signal type in the GUI according to the signal type of the down-converted signal received by the processor.
Optionally, the displaying, in the GUI according to the signal type of the down-converted signal received by the processor, a transmission path including the signal type includes:
displaying a logic control graph that may cause the processor to frequency down, wherein the logic control graph comprises: a transmission path of the down-converted signal;
displaying a transmission path of the frequency-reducing signal currently causing the processor to frequency-reduce with a first display parameter;
displaying the remaining transmission paths with a second display parameter, wherein the first display parameter is different from the second display parameter.
Optionally, the displaying, in the GUI according to the signal type of the down-converted signal received by the processor, a transmission path including the signal type includes:
and inquiring the corresponding relation between the pre-configured signal type and the transmission path according to the signal type of the frequency-reducing signal causing the frequency reduction of the processor, and determining the transmission path causing the frequency reduction of the processor.
Optionally, the signal type comprises at least one of:
signals transmitted by a platform environment based control interface (PECI);
signals transmitted by a system management bus (SMbus);
signal transmitted by a thermal control circuit (PROCHOT).
Optionally, the positioning the node causing the processor to frequency down in the transmission path according to the control operation includes:
disconnecting the signal transmission between the nth node and the (n + 1) th node on the transmission path, wherein n is a positive integer;
detecting the working frequency of a processor after the signal transmission of the nth node and the (n + 1) th node is disconnected;
and if the working frequency of the processor rises, the nth node is considered as a frequency reduction node which causes the frequency reduction of the processor.
Optionally, the graphical user interface GUI for displaying a down-conversion process of the processor when a predetermined condition is satisfied includes:
when a GUI display instruction of a Baseboard Management Controller (BMC) is detected, displaying the GUI of the BMC, and displaying the GUI of the processor frequency reduction on the GUI of the BMC.
A second aspect of an embodiment of the present invention provides an information processing apparatus, including:
the display unit is used for displaying a graphical user interface GUI of the frequency reduction processing of the processor when a preset condition is met, wherein a transmission path of a frequency reduction signal which causes the frequency reduction of the processor is displayed in the graphical user interface;
a positioning unit, configured to, if a control operation indicating down-conversion positioning based on the GUI is detected, position a node causing down-conversion of the processor in the transmission path according to the control operation;
and the display unit is also used for changing the display of the corresponding node and/or the transmission connection on the GUI according to the transfer condition of the frequency reduction signal.
A third aspect of embodiments of the present invention provides an electronic device, including:
a display for displaying;
a memory for storing information, the information comprising: computer-executable instructions;
and the processor is respectively connected with the display and the memory and is used for executing the computer executable instruction and realizing the information processing method provided by one or more technical schemes.
According to the information processing method and device and the electronic equipment provided by the embodiment of the invention, when the preset condition is met, the transmission path containing the frequency reduction signal which causes the frequency reduction of the processor is displayed, so that a user can perform frequency reduction analysis based on the control operation of the GUI and at least provide the positioning of the node and/or the transmission connection which causes the frequency reduction of the processor, and further research on the reason causing the frequency reduction is facilitated, so that the frequency reduction analysis with smaller granularity is realized, the software and hardware of the electronic equipment can be realized through corresponding improvement, and the working performance of the electronic equipment is improved.
Drawings
Fig. 1 is a schematic flowchart of a first information processing method according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating a second information processing method according to an embodiment of the present invention;
FIG. 3 is a flowchart illustrating a GUI displaying a down-conversion process of a processor according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of an information processing apparatus according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present invention;
fig. 6 is a transmission architecture diagram of a down-converting signal according to an embodiment of the present invention.
Detailed Description
The technical solution of the present invention is further described in detail with reference to the drawings and the specific embodiments of the specification.
As shown in fig. 1, the present embodiment provides an information processing method including:
step S110: displaying a GUI of a down-conversion process of the processor when a predetermined condition is satisfied, wherein a transmission path of a down-conversion signal causing the down-conversion of the processor is displayed in the graphical user interface;
step S120: and if the control operation based on the GUI and indicating to perform frequency reduction positioning is detected, positioning a node causing the frequency reduction of the processor in the transmission path according to the control operation.
The information processing method provided by this embodiment may be applied to an electronic device including a processor, where the electronic device may be: electronic devices such as desktop computers, notebook computers, tablet computers or mobile phones, and also devices such as smart televisions that include processing chips or processing devices such as CPUs, Application Processors (APs), Application specific integrated circuits (asics) or programmable arrays.
The frequency of the processor is reduced, the working frequency of the processor is reduced, and therefore the operation frequency or the information processing frequency of the processor in unit time is reduced, the working efficiency of the processor is reduced, under the ordinary condition, the processor needs to be in a rated working frequency range, the working efficiency of the processor is higher relative to the lower working frequency, resources are effectively utilized, and the phenomena of overheating and the like caused by overhigh frequency can be avoided relative to the supplied working frequency, so that the electronic equipment is in a good working environment, and the reason that the service life is shortened due to long-term overhigh frequency work is avoided.
In this embodiment, the GUI for processor down-scaling is displayed when a predetermined condition is satisfied. A transmission path operating space that causes processor degradation is displayed on the GUI. For example, a signal may be transmitted directly from the source component that generated it to the CPU, or a down-converted signal generated by the source component may be sent to the processor via one or more intermediate components.
In this embodiment, the transmission path is displayed on the GPU, so that a user or a maintenance person can see a signal transmission path causing the CPU to perform down-conversion, and thereby which component causing the processor such as the CPU to perform down-conversion is located based on the corresponding transmission path, and/or a reason why the component sends a down-conversion signal of the processor is located based on the operating state of the component, so that the location of down-conversion and the removal of down-conversion are realized.
In this embodiment, there are various ways to determine that the predetermined condition is satisfied, and the following provides several options:
the first alternative is as follows:
the electronic equipment detects a frequency reduction positioning starting instruction input by a user;
the second option is:
the electronic device detects that the operating frequency of the processor decreases to a particular threshold;
the optional mode three:
and the electronic equipment judges and receives a frequency reduction positioning starting instruction sent by the control equipment.
If the electronic device receives a start instruction, which may be detected by the electronic device from the human-computer interaction interface, or a built-in instruction is generated based on a preset trigger event, or after receiving a start instruction sent by another device, the electronic device assumes that the predetermined condition is satisfied, and then starts to execute the GUI display mode in step S110.
After the GUI is displayed, a control command is detected, which may be input by a user through a keyboard or a mouse, a voice, an eye gesture, or other command input means, or may be received from a control device, and based on the control command
In this embodiment, when a predetermined condition is satisfied, the GUI is displayed so that the user can see the start of the down-positioning by various operation instructions.
In the embodiment of the invention, the frequency-reducing signal is a signal which causes the working frequency of the processor to be reduced.
The step S120 may include:
after displaying the GUI, the electronic device enters a ready state of the down positioning, and may read control instructions from various interaction interfaces or communication interfaces or from a memory to trigger the start of the down positioning.
The following are several alternative paths of signals that may cause the CPU to down-convert, including:
power supply internal register- > Platform Controller Hub (PCH) - > CPU;
power supply (EPOW _ N) - > Field-Programmable Gate Array (FPGA) - > CPU;
a power supply chip (Voltage Regulator, VR) - > FPGA- > CPU;
a Chassis Management Module (CMM) of the blade server, wherein the Chassis Management Module (CMM) is connected with the FPGA-CPU;
a substrate Management Controller (BMC) > FPGA- > CPU;
CPU->FPGA->CPU
graphics Processing Unit (GPU) - > FPGA- > CPU;
power Management Bus (Power Management Bus, PMBUS) - > FPGA- > PCH- > CPU;
PCH->FPGA->CPU；
memory or Memory (Memory) > FPGA- > CPU.
In the above description, the end of the "- >" arrow points to the next-hop node on the transmission path, and the head of the arrow points to the previous-hop node.
When the power supply of the electronic equipment is abnormal and/or corresponding components are overheated, a frequency reduction signal is sent to the CUP, so that the CPU is subjected to frequency reduction to reduce power consumption and/or reduce heat accumulation, and temperature reduction is achieved.
For example, when the voltage of the mains supply is too low or the current is too small, or the power of the electronic device is insufficient, or the supply current or the supply voltage is too small, in order to protect the electronic device, a frequency reducing and reducing (Throttle) signal is generated, transmitted to the FPGA, and then transmitted to the CPU through the FPGA.
For example, when the VR, memory, and graphic processor are overheated, a down-converted signal is generated and transmitted to the CPU through the corresponding transmission path.
In some embodiments, the method further comprises:
step S130: and changing the display of the corresponding node and/or the transmission connection on the GUI according to the transfer condition of the frequency reduction signal.
In step S130, the display parameters of the corresponding node on the GUI are also changed according to the transmission status of the current signal. For example, a node a, a node B, a node C, and a node D are provided on one transmission path, and when the signal is transmitted to which node, the display parameter of the node is at least different from the display parameters of other nodes on the transmission path. For example, the current signal is transmitted to the node C, the display color of the node C is a first color, the colors of the node a, the node B and the node D are second colors, and the second colors are different from each other, so that the color distinguishing display is realized. In other embodiments, instead of displaying a distinction of colors, a distinction of shapes may be represented by nodes, e.g., one represented by a rectangle and one represented by an ellipse. In still other embodiments, different line types may be used, a user thick line and a user thin line. In a word, by the differentiated display of the display parameters, a user can conveniently determine which node the current signal comes from according to the current signal transmission condition. This allows the location of the down conversion.
Different nodes are connected through transmission. For example, in the above example, node a and node B may be connected by transmission connection 1, and node B and node C may be connected by transmission connection 2. One of the transmission paths may be formed by one or more connected transmission connections.
If the down-converted signal is transmitted to the node B, transmission connection 1 is a transmission connection through which the down-converted signal has passed, and transmission connection 2 is a transmission connection through which the down-converted signal has not passed. In this embodiment, the transmission connection 1 and the transmission connection 2 can be represented by different colors, different thickness lines or different line types of lines to represent the transmission condition of the down-converted signal.
In this embodiment, the display parameters of the corresponding node and/or transmission connection on the GUI are changed to implement the characterization of the delivery status, and in addition to distinguishing the change of the display parameters, a delivery prompt may be directly added to the corresponding node or transmission connection to indicate the characterization of the delivery status.
In summary, at least two ways are provided in step S130 to embody the transfer condition of the down-converting signal:
the first method comprises the following steps: the representation of the transmission condition of the frequency reduction signal is realized by changing the display parameters of the corresponding nodes and/or the transmission connection;
and the second method comprises the following steps: the characterization of the transfer condition of the down-converted signal is achieved by displaying a transfer prompt on or attached to the corresponding node and/or transmission connection.
In this embodiment, the transmission condition may include the following conditions:
the first method comprises the following steps: the transfer condition may be used to characterize the node or transmission connection through which the down-converted signal has passed,
and the second method comprises the following steps: the transfer condition can be used for representing nodes or transmission connections which are not passed by the frequency reduction signal;
and the third is that: the transfer condition is used for indicating a node or a transmission connection through which the frequency-reducing signal can pass;
and fourthly: and the connection condition is used for indicating a node or a transmission path which can not be passed by the frequency reduction signal.
For example, according to the operation indication, a node may be enabled, and obviously, the down-converting signal may not pass through the node, and the transfer condition may be used to indicate a node or a transmission path through which the down-converting signal cannot pass.
For another example, the current detection is a real-time detection, which node the transfer signal sent by the real-time signal source has been transmitted to, and the transfer condition may characterize the node or transmission connection the down-converted signal has passed through, or the node or transmission connection the down-converted signal has not passed through.
In summary, in this embodiment, in order to facilitate the user or the maintenance person to perform the down-conversion positioning, the display of the corresponding node and/or the transmission connection on the GUI is changed according to the down-conversion signal transmission condition, and the change includes changing the display effect through the display parameter, and adding or changing the display content, so as to prompt the user and the maintenance person of the most likely current position where the down-conversion is to occur, thereby implementing the positioning of the down-conversion, so as to facilitate the solution of the down-conversion in the next step.
In this embodiment, an operation control is further displayed on the GUI, and the operation control may be a dialog box, a graphical button, or the like. The user can operate the touch button through a mouse, a touch screen, a touch pad or the like, and then input an operation instruction.
In this embodiment, the operation control is directly set on the GUI, instead of directly using the physical keys such as a keyboard or a mouse to implement the detection of the control operation, the operation function of the physical keys does not need to be additionally added, the improvement on the prior art is small, the compatibility with the prior art is strong, and meanwhile, the control is performed by using the graphical interface, so that the operation habit of the user is better met, and the use experience of the user can be improved.
In short, the GUI is also displayed with operation controls; the method further comprises the following steps: detecting the control operation acting on the operation control. In step S120, the down-conversion is positioned according to the control operation applied to the operation control.
Optionally, the step S110 may include:
and displaying a transmission path containing the signal type in the GUI according to the signal type of the down-converted signal received by the processor.
The down-converted signals received by the processor can be divided into different types of signals according to the type of transmission bus, the type of transmission interface, or the transmission protocol followed by the signals.
In some embodiments, the GUI may display various transmission paths for signals to the processor, which may include a down-converted signal transmission path.
In other embodiments, only the transmission path of the down-converted signal is displayed on the GUI.
For example, there are currently three signal types of signals, and in one approach all transmission paths for these three types of signals are displayed on the GUI. In another approach, only the transmission path of the signal that caused the current processor to be down-clocked would be displayed on the GUI.
As such, as shown in fig. 3, the step S110 may include:
step S111: displaying a logic control graph that may cause the processor to frequency down, wherein the logic control graph comprises: a transmission path of the down-converted signal;
step S112: displaying a transmission path of the frequency-reducing signal currently causing the processor to frequency-reduce with a first display parameter;
step S113: displaying the remaining transmission paths with a second display parameter, wherein the first display parameter is different from the second display parameter.
The logic control diagram includes: the logic block diagram of signal transmission can include in the logic control diagram: nodes and transmission connections connecting the nodes.
In general, the logic control diagram may embody logic processing and/or transmission control of various signals transmitted to the processor.
In this embodiment, the first display parameter is different from the second display parameter, and the display effect is different when the display parameters are different, so that the transmission path of the current down-converted signal and the transmission path of the signal that does not currently cause the down-conversion of the processor are distinguished, and a user can distinguish which paths need to be further detected according to the display effect, thereby locating which node or which segment of the transmission connection the down-conversion is located on.
In other words, the signal that may cause the processor to down-convert is a predetermined signal comprising: a first signal that causes the current processor to down-convert, and a second signal that does not cause the processor to down-convert; in step S110, first, transmission paths of all predetermined signals from the signal source to the processor are displayed, second, the transmission path of the first signal is displayed with the first display parameter, the transmission path of the second signal is displayed with the second display parameter, and the display is distinguished by the display parameter, so that a user can determine which transmission paths may be transmission paths causing the frequency reduction of the processor.
In some embodiments, there may be multiple transmission paths for a single type of signal, so in this embodiment, the type of signal that causes the processor to down-frequency is first located. For example, the processor may work as a log during operation, which may record the change of the operating frequency of the processor, and also record which signals are received by the processor, and first roughly determine which type of signal currently causes the processor to be down-converted according to the receiving time and the operating frequency of the signal. Of course, the determination of the first signal is merely illustrated here, and other ways may be used in the specific implementation, which is not limited to this.
In still other embodiments, since the signal type of the down-converted signal is determined, only the transmission path of the down-converted signal may be directly displayed in order to reduce the interference viewed by the user due to the display of the transmission path of the second signal. I.e. the transmission path currently displayed on the GUI is the transmission path of the type of signal that causes the processor to down-frequency, which is convenient for the user to control.
Optionally, the displaying, in the GUI according to the signal type of the down-converted signal received by the processor, a transmission path including the signal type includes:
and inquiring the corresponding relation between the pre-configured signal type and the transmission path according to the signal type of the frequency-reducing signal causing the frequency reduction of the processor, and determining the transmission path causing the frequency reduction of the processor.
The corresponding relation between the signal type and the transmission path is pre-configured in the electronic equipment, so that after the type of the frequency-reducing signal is determined, the corresponding relation can be inquired to determine which transmission paths are the transmission paths of the frequency-reducing signal. For example, if the GUI displays all transmission paths of the predetermined signal, the transmission path of the second signal may be displayed with default parameters, and the transmission path of the down-converting signal determined by querying the correspondence relationship may need to be changed, and the transmission path of the down-converting signal may be displayed with non-default display parameters.
In some embodiments, after the transmission path of the down-converting signal is determined directly according to the query of the correspondence, only the transmission path of the down-converting signal is displayed on the GUI with default display parameters.
In some embodiments, the signal type includes at least one of:
signals transmitted by a platform environment based control interface (PECI);
signals transmitted by a system management bus (SMbus);
signal transmitted by a thermal control circuit (PROCHOT).
The step S120 may include:
disconnecting the signal transmission between the nth node and the (n + 1) th node on the transmission path, wherein n is a positive integer;
detecting the working frequency of a processor after the signal transmission of the nth node and the (n + 1) th node is disconnected;
and if the working frequency of the processor rises, the nth node is considered as a frequency reduction node which causes the frequency reduction of the processor.
In this embodiment, a transmission path may include N nodes, a signal source generating one of the predetermined signals may be a 1 st node on the transmission path, a node receiving the signal may be a processor, for example, a CPU, and may be a last node, i.e., an nth node, and nodes between the signal source and the processor are referred to as intermediate nodes and may be a 2 nd node to an N-1 th node.
In this embodiment, a hop-by-hop positioning method is adopted to position the node that causes the frequency reduction. For example, the nth +1 node is a next hop node of the nth node, if the nth +1 node transmits a signal to the processor when not receiving the nth node, the processor does not generate a frequency reduction phenomenon, and if the nth +1 node receives the signal of the nth node, the signal of the nth node is directly transmitted to the processor or transmitted to the processor after conversion, so as to cause frequency reduction of the processors such as the CPU. In this way, the localization of the down-conversion node can be performed step by step along the transmission path from the signal source to the processor. The down node may be referred to herein as a node that causes the processor to down frequency.
If the working frequency of the processor does not rise and the down-conversion state is still maintained after the signal transmission from the nth node to the (n + 1) th node is disconnected, the nth node is considered to work normally and no phenomenon or event causing the down-conversion of the processor occurs, and whether the (n + 1) th node is the down-conversion node causing the down-conversion of the processor can be judged until all nodes on the transmission path are judged to be finished and all paths which may cause the down-conversion are judged to be finished or positioned to the down-conversion node caused by the processor.
There are various ways to disconnect the signal transmission from the nth node to the (n + 1) th node in step S120, and several options are provided as follows:
disabling the nth node by a disable signal, such that the nth node may switch from an operational state to a non-operational state;
the power supply of the nth node is cut off, and the nth node can be switched from the working state to the non-working state;
disabling the signal output from the nth node, for example, disabling the signal output from the output port of the nth node;
the signal transmission from the nth node to the n +1 th node is prevented by the introduction of the interrupt program;
the signal input port of the n +1 th node rejects the signal from the nth node;
the n +1 th node does not transmit the signal provided by the n-th node to the n +1 th node.
The above is only an example, and when the signal transmission from the nth node to the (n + 1) th node is specifically implemented, there are various ways, and only the signal provided by the nth node needs to be continuously transmitted to the (n + 1) th node for processing.
Optionally, the step S110 may include:
when a GUI display instruction of a Baseboard Management Controller (BMC) is detected, displaying the GUI of the BMC, and displaying the GUI of the processor frequency reduction on the GUI of the BMC.
In some embodiments, the GUI may be a GUI of a BMC, for example, the GUI with the transmission path may be a GUI newly added to a GUI set of the BMC, and may be a GUI relatively independent from an existing GUI of the BMI, but may be switched from the GUI to the existing GUI of the BMI.
In other embodiments, the GUI of the transmission path including the down-converted signal displayed in step S110 may be a component of the native GUI of the BMI. For example, GUI a is an original GUI of BMI, and a component of a transmission path for displaying a down-converted signal is added in GUI a. In this way, the GUI a can view not only other graphical interfaces for BMI management of the GUI but also an interface of a transmission path of the down-converted signal.
In this embodiment, the GUI in step S110 is a GUI of the BMI. The predetermined conditions in step S110 may include:
receiving an interface instruction of a GUI displaying the BMI; receiving an access instruction such as an access request carrying a network protocol (IP) address of a GUI accessing the BMI may be considered to satisfy the predetermined condition, or further, if it is monitored that the operating frequency of the processor is reduced to a specific threshold value or a frequency reduction phenomenon occurs while receiving the access instruction, it is considered that step S110 needs to be performed. The particular threshold may be an operating frequency at which the processor is below a nominal operating frequency range.
In some embodiments, the method further comprises:
after the down node and/or the down reason causing the processor to down frequency is located, the down node and down connection are prompted on the GUI, and/or the down reason is output.
The frequency reduction node is prompted, the frequency reduction node can be indicated by changing the display parameter of the frequency reduction node, and the frequency reduction node can also be prompted through text output and/or voice output.
For example, the down-conversion node and/or the transmission connection with the down-conversion node and its next-hop node are displayed with a red box. The transmission connection of the down-conversion node to the next node is referred to as the down-conversion connection.
Therefore, the detection of the frequency reduction node and/or the frequency reduction connection is realized, and meanwhile, the detection result of the frequency reduction is informed to a user or a worker through prompting content (namely the frequency reduction reason) and display change.
In other embodiments, the method further comprises:
and generating detection result information according to the detection result, for example, generating a detection log, facilitating subsequent analysis and viewing, and being stored locally in the electronic equipment or being sent to the detection equipment and the like.
As shown in fig. 4, the present embodiment provides an information processing apparatus, including:
a display unit 110, configured to display a graphical user interface GUI of a frequency reduction process of the processor when a predetermined condition is satisfied, where a transmission path of a frequency reduction signal that causes the frequency reduction of the processor is displayed in the graphical user interface;
a positioning unit 120, configured to, if a control operation that is based on the GUI and indicates to perform frequency down positioning is detected, position a node that causes the processor to frequency down in the transmission path according to the control operation.
The display unit 110 may be readable to correspond to various devices that may display or present information, such as a liquid crystal display, an Organic Light Emitting Diode (OLED) display, an electronic ink display, or a projection display, etc., which may display information, which may be used for the display of the GUI.
The positioning unit 120 may correspond to a processor, and may be a CPU, a microprocessor MCU, or an application processor, and may position a down-conversion node or analyze a down-conversion cause, thereby implementing a finer analysis of the down-conversion cause and/or control of the down-conversion node.
Optionally, the display unit 110 is further configured to change display of a corresponding node and/or a transmission connection on the GUI according to a transfer condition of the down-conversion signal.
An operation control is also displayed on the GUI;
the information processing apparatus further includes:
the detection unit can correspond to a human-computer interaction interface or a communication interface for communicating with other electronic equipment, or the processor reads a built-in instruction and can be used for detecting the control operation acting on the operation control.
Optionally, the display unit 110 may be configured to display, in the GUI, a transmission path including a signal type of the down-converted signal received by the processor according to the signal type.
In this embodiment, the operation control may be a dedicated control independent from the graph or icon representing the node, or may be a graph or icon multiplexing the node. For example, one transmission path includes: 3 nodes, node 1, node 2 and node 3, wherein node 1, node 2 and node 3 are each represented by a box, and the box is also used to represent operational controls for operating the node, for example, when detecting operation a of box 1, which acts on node 1, it can be considered to enable the node or disable the node from transmitting signals to the next node, receive signals of the previous hop node, and when detecting operation B of box 1, it can be considered to enable the node or resume the reception of signals of the previous hop of the node, or transmit signals to a node.
Optionally, the display unit 110 may be specifically configured to display a logic control map that may cause the processor to frequency down, where the logic control map includes: a transmission path of the down-converted signal;
displaying a transmission path of the frequency-reducing signal currently causing the processor to frequency-reduce with a first display parameter;
displaying the remaining transmission paths with a second display parameter, wherein the first display parameter is different from the second display parameter.
Optionally, the positioning unit 120 may be configured to query a pre-configured correspondence between a signal type and a transmission path according to a signal type of the down-converted signal that causes the processor to down-convert, and determine the transmission path that causes the processor to down-convert.
Optionally, the positioning unit 120 may be specifically configured to disconnect signal transmission between an nth node and an n +1 st node on the transmission path, where n is a positive integer;
detecting the working frequency of a processor after the signal transmission of the nth node and the (n + 1) th node is disconnected;
and if the working frequency of the processor rises, the nth node is considered as a frequency reduction node which causes the frequency reduction of the processor.
Optionally, the display unit 110 may be configured to display a GUI of a baseboard management controller BMC when a GUI display instruction of the BMC is detected, and display a GUI of the processor down-frequency on the GUI of the BMC.
As shown in fig. 5, an embodiment of the present invention further provides an electronic device, including:
a display 310 for displaying;
a memory 320 for storing information, the information comprising: computer-executable instructions;
the processor 330 is connected to the display 310 and the memory 320, respectively, and configured to execute the computer-executable instructions to implement the information processing method provided by one or more of the foregoing embodiments.
In an embodiment of the present invention, the display 310 may be various types of displays 310, and may be used for displaying information, such as displaying the GUI.
The memory 320 may include various types of storage media, for example, a random access storage medium, a read-only storage medium, a flash memory, a solid state disk, a mechanical hard disk, and the like, and may be used to store codes that can be recognized and executed by a computer, such as a functional component of a computer program, an application program, and/or an operating system, so as to implement the information processing method provided by one or more of the foregoing technical solutions.
The processor 330 may be connected to the memory 320 through a data bus such as an integrated circuit bus and a control bus, and may control display of the display 310 and/or information storage of the memory 320, and implement the information processing method according to one or more of the above technical solutions, thereby implementing down-conversion exception handling.
The embodiment of the invention also provides a computer storage medium, wherein the computer storage medium stores computer executable instructions, and after the computer executable instructions are executed by a processor or a processing circuit, the information processing method provided by one or more technical schemes can be realized, so that the analysis of the frequency reduction reason of the electronic equipment and/or the positioning of the frequency reduction node or the frequency reduction connection causing the frequency reduction can be assisted. The computer storage medium may be a non-transitory storage medium, or a non-volatile storage medium.
The embodiment of the invention provides a specific example based on the scheme:
example 1:
if processor frequency reduction occurs, for example, when the CPU performs frequency reduction, the intelligent judgment is made on the transmission path of the frequency reduction signal causing the processor frequency reduction and the path is highlighted, so in this example, by distinguishing the display brightness, the distinguishing display of the transmission path of the frequency reduction signal and the transmission path of other predetermined signals is realized. .
And performing switch limitation on a node on a frequency reduction signal transmission path for triggering the CPU to reduce the frequency, presenting the node in a BMC GUI in the form of a virtual control, for example, when a first operation acting on the virtual control is detected, considering that the signal output of the node is disconnected, and when a second operation of the virtual control is detected, outputting a signal which is considered to be recovered. The first operation and the second operation can be electrode operation, sliding operation and the like which act on the virtual control. Specifically, the first operation or the second operation needs to be determined according to the current state of the node or the current corresponding state of the virtual control. For example, when the current virtual control is in the first state, the click operation of the virtual control in the first state is detected, that is, the first operation is detected, and if the virtual control is in the second state, the second operation is detected if the electrode operation acting on the virtual control in the second state is detected. For example, if the current node is in the disconnected state, it may be considered that the first operation is detected when the click operation or the slide operation is detected, and if the current node is in the connected state, it may be considered that the second operation is detected when the click operation or the slide operation is detected.
When the virtual control is set to be disabled, the signal corresponding to each node cannot be transmitted to the next hop node, so that the generation positions of the frequency reduction reasons are eliminated one by one.
The advantage after adopting the scheme is that
1, GUI is presented visually, so that an engineer can conveniently debug, and the principle and the signal transmission path are more visual;
2, enabling each transmission node e through the virtual control, and facilitating problem troubleshooting
And 3, displaying a logic control diagram of CPU frequency reduction on a BMC GUI, highlighting a certain path when the path has a problem, and suggesting a troubleshooting method.
A virtual control is arranged on a logic control chart of the GUI, the internal logic of the FPGA is controlled through the SPI, the switching of internal function signals of a Management Engine (ME) is controlled through the IPMI, and the logic enables each node to be checked one by one.
Example 2:
as shown in fig. 6, the present example provides a transmission architecture diagram of a predetermined signal that may cause a CPU to down-convert, including:
the CPU, for example, may include: CPU 0 and CPU 1.
The PCH is connected with the CUP through the PECI, and the signal type transmitted to the CPU by the PCH is the PECI;
a Memory, such as a Dual Inline Memory Module (mid), sends a down-converted signal to the cpu when the Memory is overheated, and the DIMM transmits the down-converted signal through a power management bus (SMBus) in fig. 6, where the signal type of the down-converted signal is SMBus. In some cases, in order to facilitate management of the down-conversion signal sent by the BMC to the memory, the memory such as the mid is connected to the FPGA, the down-conversion signal is sent to the BMC by the FPGA, and then the down-conversion signal is transmitted to the CPU by the BMC through a Serial Peripheral Interface (SPI) or a thermal signal (PROCHOT-N). This may enable the BMC to effect reception and/or control of the predetermined signal.
Chassis Management Module (CMM);
the hot plug component can generate a frequency reduction signal when being overheated, and can transmit the frequency reduction signal through a power management bus (PMBus).
A Power Supply, for example, a Power Supply unit (Power Supply unit PSU) or the like.
Through the flash memory connected with the SPI, the down-frequency signal is sent to the CPU through the PCH when the flash memory is overheated.
As can be seen from fig. 6, the signal types are classified into at least three types:
the first method comprises the following steps: the signal format from the PCIE transmission path to the CPU is a PCIE down-conversion signal;
and the second method comprises the following steps: the signal format passing through the PROCHOT-N transmission path is a PROCHOT-N frequency reduction signal;
and the third is that: the signal format through the SMBus transmission path is a down-converted signal of the SMBus.
In fig. 6, the small circle is wired for transmission of a down-converted signal that may cause the processor to down-convert.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described device embodiments are merely illustrative, for example, the division of the unit is only a logical functional division, and there may be other division ways in actual implementation, such as: multiple units or components may be combined, or may be integrated into another system, or some features may be omitted, or not implemented. In addition, the coupling, direct coupling or communication connection between the components shown or discussed may be through some interfaces, and the indirect coupling or communication connection between the devices or units may be electrical, mechanical or other forms.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed on a plurality of network units; some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, all the functional units in the embodiments of the present invention may be integrated into one processing module, or each unit may be separately used as one unit, or two or more units may be integrated into one unit; the integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer readable storage medium, and when executed, the program performs the steps including the method embodiments; and the aforementioned storage medium includes: a mobile storage device, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (9)
1. An information processing method characterized by comprising:
displaying a Graphical User Interface (GUI) of the frequency reduction processing of the processor when a preset condition is met, wherein a transmission path of a frequency reduction signal which causes the frequency reduction of the processor is displayed in the GUI;
if the control operation of frequency reduction positioning based on the GUI and instructed is detected, disconnecting the signal transmission of the nth node and the (n + 1) th node on the transmission path, wherein n is a positive integer;
detecting the working frequency of a processor after the signal transmission of the nth node and the (n + 1) th node is disconnected;
and if the working frequency of the processor rises, the nth node is considered as a frequency reduction node which causes the frequency reduction of the processor.
2. The method of claim 1,
the method further comprises the following steps:
and changing the display of the corresponding node and/or the transmission connection on the GUI according to the transfer condition of the frequency reduction signal.
3. The method of claim 1,
an operation control is also displayed on the GUI;
the method further comprises the following steps:
detecting the control operation acting on the operation control.
4. The method according to any one of claims 1 to 3,
the graphical user interface for displaying the processor reduced frequency when the predetermined condition is met comprises:
and displaying a transmission path containing the signal type in the GUI according to the signal type of the down-converted signal received by the processor.
5. The method of claim 4,
the displaying, in the GUI according to the signal type of the down-converted signal received by the processor, a transmission path including the signal type includes:
displaying a logic control graph that may cause the processor to frequency down, wherein the logic control graph comprises: a transmission path of the down-converted signal;
displaying a transmission path of the frequency-reducing signal currently causing the processor to frequency-reduce with a first display parameter;
displaying the remaining transmission paths with a second display parameter, wherein the first display parameter is different from the second display parameter.
6. The method of claim 4,
the displaying, in the GUI according to the signal type of the down-converted signal received by the processor, a transmission path including the signal type includes:
and inquiring the corresponding relation between the pre-configured signal type and the transmission path according to the signal type of the frequency-reducing signal causing the frequency reduction of the processor, and determining the transmission path causing the frequency reduction of the processor.
7. The method according to any one of claims 1 to 3,
the GUI for displaying the down-conversion process of the processor when the predetermined condition is satisfied includes:
when a GUI display instruction of a Baseboard Management Controller (BMC) is detected, displaying a GUI of the BMC, and displaying a GUI of the processor frequency reduction on the GUI of the BMC.
8. An information processing apparatus characterized by comprising:
the display unit is used for displaying a graphical user interface GUI of the frequency reduction processing of the processor when a preset condition is met, wherein a transmission path of a frequency reduction signal which causes the frequency reduction of the processor is displayed in the graphical user interface;
the positioning unit is used for disconnecting the signal transmission between the nth node and the (n + 1) th node on the transmission path if the control operation of frequency reduction positioning based on the GUI and instructed to be performed is detected, wherein n is a positive integer; detecting the working frequency of a processor after the signal transmission of the nth node and the (n + 1) th node is disconnected; and if the working frequency of the processor rises, the nth node is considered as a frequency reduction node which causes the frequency reduction of the processor.
9. An electronic device, comprising:
a display for displaying;
a memory for storing information, the information comprising: computer-executable instructions;
a processor, connected to the display and the memory respectively, for executing the computer-executable instructions to implement the information processing method provided in any one of claims 1 to 7.
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