CN108076561B - LED drive - Google Patents
LED drive Download PDFInfo
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- CN108076561B CN108076561B CN201711102184.2A CN201711102184A CN108076561B CN 108076561 B CN108076561 B CN 108076561B CN 201711102184 A CN201711102184 A CN 201711102184A CN 108076561 B CN108076561 B CN 108076561B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/10—Controlling the intensity of the light
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/30—Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]
Abstract
The present invention discloses a kind of LED drive.In LED drive, adjusting control circuit receives pulse-width modulation signal and clock signal and exports dim signal and sampled signal.The opening time of sampled signal is less than the clock cycle of clock signal.First error amplifier receives back voltage, reference voltage and dim signal and exports offset voltage.Second error amplifier receives offset voltage and ramp signal and voltage pulse output.Drive control device receives dim signal and pulse voltage and exports control signal.Output stage receives control signal and input voltage and generates output voltage to light emitting diode string.Minimum voltage selecting unit selects minimum light-emitting diodes tube voltage.Switch unit is controlled by sampled signal and selectivity is connected so that first error amplifier receives minimum light-emitting diodes tube voltage.
Description
Technical field
The present invention be it is related with light emitting diode (Light-emitting diode, LED), especially with respect to one kind shine
Diode (led) driver.
Background technique
In general, LED drive would generally use pulsewidth in traditional light emitting display device
Modulation (Pulse Width Modulation, PWM) signal is dimmed the mode of (Dimming) to regulate and control two pole of multi-group light-emitting
The light emission luminance of pipe string.
Once however, the duty cycle (Duty of pulse-width modulation signal PWM used by LED drive
Cycle) too small, that is, the opening time (Turn-on Time) of pulse-width modulation signal PWM is much smaller than shut-in time (Turn-off
Time in the case where), it is likely that there is ripple (Ripple) phenomenon in the output voltage VO UT that will lead to LED drive,
As shown in Figure 1.Since the LED current ILED ripple that will receive output voltage VO UT influences and become unstable, also leads
The stability of photoluminescence of photoluminescence diode display is bad.
Summary of the invention
In view of this, the present invention proposes a kind of LED drive, effectively to solve what prior art was suffered from
Above-mentioned variety of problems.
A specific embodiment according to the present invention is a kind of LED drive.In this embodiment, light-emitting diodes
Pipe driver is to drive multi-group light-emitting diode string.LED drive includes adjusting control circuit, first error
Amplifier, the second error amplifier, drive control device, output stage, minimum voltage selecting unit and switch unit.Brightness adjustment control electricity
Road is to receive pulse-width modulation signal and clock signal respectively and export dim signal and sampled signal respectively, wherein sampled signal
Opening time in high levels is less than the clock cycle of clock signal.First error amplifier couples adjusting control circuit, uses
To receive back voltage, reference voltage and dim signal respectively and export offset voltage.Second error amplifier coupling first misses
Poor amplifier, to receive offset voltage and ramp signal and voltage pulse output respectively.Drive control device is respectively coupled to dim
Control circuit and the second error amplifier, to receive dim signal and pulse voltage respectively and export control signal.Output stage
It is respectively coupled to drive control device, the first end of the multi-group light-emitting diode string, input voltage and ground terminal, to receive control letter
Number and input voltage and generate output voltage to the multi-group light-emitting diode string, cause multiple LED currents respectively by this
The first end of multi-group light-emitting diode string flows to the second end of the multi-group light-emitting diode string.Minimum voltage selecting unit distinguishes coupling
The second end for connecing the multi-group light-emitting diode string, multiple light-emitting diodes of the second end to sense the multi-group light-emitting diode string
Tube voltage simultaneously selects minimum light-emitting diodes tube voltage from multiple light-emitting diodes tube voltage.Switch unit is respectively coupled to light modulation control
Circuit, first error amplifier and minimum voltage selecting unit processed, selectively turn on minimum to be controlled by sampled signal
Voltage selecting unit and the first error amplifier cause first error amplifier to receive minimum light-emitting diodes tube voltage.
In an embodiment, when sampled signal has high levels, switch unit is controlled by sampled signal and minimum is connected
Voltage selecting unit and first error amplifier.
In an embodiment, when multiple LED current is greater than 0, sampled signal just has high levels.
In an embodiment, when dim signal have low level when, drive control device just understand modulated light signal enabling and it is defeated
Signal is controlled out.
In an embodiment, the time that dim signal is in low level was offset one from another with the opening time, was caused multiple
When LED current is greater than 0, drive control device is simultaneously inactive.
In an embodiment, output stage includes inductance, transistor switch and diode, and the gate of transistor switch, which couples, to be driven
Movement controller is simultaneously controlled by control signal, and inductance and transistor switch are coupled between input voltage and ground terminal, inductance and crystalline substance
LED drive signals are generated according to control signal between body pipe switch, diode receives LED drive signals simultaneously
Generate output voltage.
In an embodiment, when dim signal has low level, control signal and LED drive signals are that
The pulse signal of this reverse phase.
In an embodiment, when first error amplifier receives dim signal, the output of first error amplifier by
It controls in dim signal and in high resistant state of value, the offset voltage for causing first error amplifier to be exported can continue to maintain its electricity
Pressure value is constant.
In an embodiment, adjusting control circuit also receives enable signal, adjusting control circuit include and lock and penetrate and
Enable signal is added with pulse-width modulation signal and obtains sampled signal by lock.
In an embodiment, adjusting control circuit also includes multiple flip-flops and is believed through multiple flip-flop according to clock pulse
Number generate multiple clock pulse input signals.
In an embodiment, adjusting control circuit also receives selection signal, and adjusting control circuit also includes multiplexer and saturating
It crosses multiplexer and dim signal is generated according to multiple clock pulse input signal of part, sampled signal and selection signal.Light-emitting diodes
Used by pipe driver
Compared to the prior art, the work week of LED drive of the invention in its pulse-width modulation signal used
It is to export the mode of sampled signal and dim signal respectively through adjusting control circuit to reach following function in the case that phase is too small
Effect:
(1) the switch unit selection through sampled signal control between error amplifier and minimum voltage selecting unit
Property be connected, cause error amplifier only can be greater than 0 Shi Caihui in light-emitting diodes tube voltage and receive minimum light emitting diode electricity
Pressure, and then generate correct offset voltage；
(2) only it just will start drive control device when dim signal is in low level and issue multiple pulse voltages to mention
For enough charges to output voltage, to maintain stable output voltage；
(3) since the time that drive control device is started by the dim signal of low level can be greater than 0 with LED current
Time offset one from another so that generated influence of noise when LED current will not be driven controller starting, with
Maintain stable LED current；And
(4) output of first error amplifier can be controlled by dim signal and be in high resistant state of value (High-Z
State), offset voltage caused by first error amplifier is caused still persistently to maintain its voltage value in the case where opening circuit
It is constant.
It can be obtained further by detailed description of the invention below and institute's accompanying drawings about the advantages and spirit of the present invention
Solution.
Detailed description of the invention
Fig. 1 is that the output voltage VO UT of traditional LED drive the signal of ripple (Ripple) phenomenon occurs
Figure.
Fig. 2 is the schematic diagram of the LED drive in a specific embodiment of the invention.
Fig. 3 is an embodiment of the sampled signal generation module in adjusting control circuit.
Fig. 4 is an embodiment of the dim signal generation module in adjusting control circuit.
Fig. 5 to Fig. 8 is respectively each when LED drive uses the pulse-width modulation signal in different operating period
The timing diagram of signal.
Main element symbol description:
2: LED drive
20: adjusting control circuit
21: first error amplifier
22: the second error amplifiers
23: drive control device
24: output stage
25: minimum voltage selecting unit
26: switch unit
200: sampled signal generation module
202: dim signal generation module
LS1~LSN: light emitting diode string
LED: light emitting diode
R: resistance
C: capacitor
L: inductance
M: transistor switch
DE: diode
GND: ground terminal
+: positive input terminal
: negative input end
K1~K2: output end
PWM: pulse-width modulation signal
SEL: selection signal
CLK: clock signal
EN: enable signal
SAMP: sampled signal
SDIM: dim signal
VREF: reference voltage
VFB: back voltage
RAMP: ramp signal
COMP: offset voltage
VPS: pulse voltage
VGN: control signal
VIN: input voltage
LX: LED drive signals
VOUT: output voltage
VLED1~VLEDN: light-emitting diodes tube voltage
ILED, ILED1~ILEDN: LED current
VMIN: minimum light-emitting diodes tube voltage
TON: opening time
TOFF: shut-in time
TPWM: the period of pulse-width modulation signal
TCLK: clock cycle
IV1~IV3: phase inverter
AND1~AND2: and lock
Enb: reverse phase enable signal
Q0: indication signal
Ck1~ck6: clock pulse input signal
DFF1~DFF7: flip-flop
OR1: or lock
NOR1~NOR3: anti-or lock
NAND1: anti-and lock
MUX: multiplexer
DIMX: dim signal
RN: inversion signal
D, Q: pin
0,1: the input terminal of multiplexer
T1~T8: time
Specific embodiment
A specific embodiment according to the present invention is a kind of LED drive.In this embodiment, light-emitting diodes
Pipe driver is to be applied to light emitting diode indicator, to drive the multi-group light-emitting diode in light emitting diode indicator
String.
Referring to figure 2., the schematic diagram of Fig. 2 LED drive in embodiment thus.As shown in Fig. 2, luminous two
Pole pipe driver 2 include adjusting control circuit 20, first error amplifier 21, the second error amplifier 22, drive control device 23,
Output stage 24, minimum voltage selecting unit 25 and switch unit 26.Wherein, adjusting control circuit 20 is respectively coupled to first error and puts
Big device 21, drive control device 23 and switch unit 26；First error amplifier 21 is respectively coupled to switch unit 26 and the second error
Amplifier 22；Second error amplifier 22 is respectively coupled to first error amplifier 21 and drive control device 23；Drive control device 23
It is respectively coupled to adjusting control circuit 20, the second error amplifier 22 and output stage 24；Output stage 24 is respectively coupled to drive control device
23, input voltage VIN, the first end of ground terminal GND and multi-group light-emitting diode string LS1~LSN；Minimum voltage selecting unit
25 are respectively coupled to the second end and switch unit 26 of multi-group light-emitting diode string LS1~LSN；Switch unit 26 is respectively coupled to adjust
Light control circuit 20, first error amplifier 21 and minimum voltage selecting unit 25.
Adjusting control circuit 20 be to receive respectively pulse-width modulation signal PWM, clock signal CLK, selection signal SEL and
Enable signal EN simultaneously exports dim signal SDIM and sampled signal SAMP respectively.In this embodiment, adjusting control circuit 20 can
Include sampled signal generation module 200 and dim signal generation module 202.Sampled signal SAMP is in the opening time of high levels
Less than the clock cycle of clock signal CLK.
First error amplifier 21 is controllable by dim signal SDIM, to penetrate its positive input terminal+and negative input respectively
End-reception back voltage VFB and reference voltage VREF simultaneously exports offset voltage COMP through its output end K1.In this embodiment
In, one end of capacitor C is coupled between the positive input terminal+of first error amplifier 21 and switch unit 26 and its other end couples
To ground terminal GND.
Second error amplifier 22 is to penetrate its positive input terminal+and negative input end-reception ramp signal RAMP respectively
And offset voltage COMP and penetrate its output end K2 voltage pulse output VPS.In this embodiment, the resistance R and capacitor C of concatenation
One end be coupled between the negative input end-of the second error amplifier 22 and the output end K1 of first error amplifier 21 and its
The other end is coupled to ground terminal GND；One end of another capacitor C is coupled to the negative input end-and first of the second error amplifier 22
Between the output end K1 of error amplifier 21 and its other end is coupled to ground terminal GND.
Drive control device 23 is to receive dim signal SDIM and pulse voltage VPS respectively and export control signal VGN.
It is activated it should be noted that drive control device 23 is only in low level Shi Caihui in dim signal SDIM and exports control signal
VGN, that is, drive control device 23 can only be started by the dim signal SDIM of low level and export control signal VGN.
Output stage 24 is to receive control signal VGN and input voltage VIN and generate output voltage VO UT to the multiple groups
Light emitting diode string LS1~LSN causes multiple LED current ILED1~ILEDN respectively by the multi-group light-emitting diode
The first end of string LS1~LSN flows to the second end of multi-group light-emitting diode string LS1~LSN.In this embodiment, output stage
24 include inductance L, transistor switch M and diode DE.The gate coupling drive control device 23 of transistor switch M is simultaneously controlled by control
Signal VGN processed.Inductance L and transistor switch M are coupled between input voltage VIN and ground terminal GND.Inductance L is opened with transistor
Close between M is to generate LED drive signals LX according to control signal VGN.Diode DE receives light emitting diode driving letter
Number LX simultaneously generates output voltage VO UT.
Minimum voltage selecting unit 25 is to sense the multiple of the second end of multi-group light-emitting diode string LS1~LSN
Light-emitting diodes tube voltage VLED1~VLEDN simultaneously selects minimum shine from multiple light-emitting diodes tube voltage VLED1~VLEDN
Diode voltage VMIN.
Switch unit 26 be to be controlled by sampled signal SAMP and selectively turn on minimum voltage selecting unit 25 with
The positive input terminal of first error amplifier 21+, cause first error amplifier 21 can be through its positive input terminal+receive minimum
Light-emitting diodes tube voltage VMIN.
Referring to figure 3., Fig. 3 is an embodiment of the sampled signal generation module 200 in adjusting control circuit 20.Such as Fig. 3
Shown, sampled signal generation module 200 may include and lock AND1 and phase inverter IV1.And lock AND1 is to by enable signal EN
It is added with pulse-width modulation signal PWM and generates sampled signal SAMP.Phase inverter IV1 is to obtain and enable signal EN reverse phase
Reverse phase enable signal enb.Sampled signal generation module 200 can be smoothly according to enable signal EN and pulse-width modulation signal PWM as a result,
Sampled signal SAMP is generated, to opening or closing for selectively control switch unit 26.
Referring to figure 4., Fig. 4 is an embodiment of the dim signal generation module 202 in adjusting control circuit 20.Such as Fig. 4
Shown, dim signal generation module 202 can be made of multiple logic elements, include multiple flip-flop DFF1~DFF7 or lock
OR1, anti-or lock NOR1~NOR3 and lock AND2, phase inverter IV2~IV3, anti-and lock NAND1 and multiplexer MUX, but not with this
It is limited.
In this embodiment, flip-flop DFF1 receives input voltage VIN and sampled signal SAMP respectively and exports instruction letter
Number q0；Flip-flop DFF2 receives clock signal CLK and indication signal q0 respectively and exports clock pulse input signal ck1；Flip-flop
DFF3 receives clock signal CLK and clock pulse input signal ck1 respectively and its output end couples or an input terminal of lock OR1, and or
Another input terminal of lock OR1 receives reverse phase enable signal enb and the output end of lock OR1 exports clock pulse input signal ck2；Flip-flop
DFF4 receives clock signal CLK and clock pulse input signal ck2 respectively and its output end couples anti-or lock NOR1 a input terminal, and
Anti- or lock NOR1 another input terminal receives sampled signal SAMP and anti-or lock NOR1 output end exports clock pulse input signal
ck3；Flip-flop DFF5 receives clock signal CLK and clock pulse input signal ck3 respectively and the coupling of its output end is anti-or lock NOR2
One input terminal, and anti-or lock NOR2 another input terminal receives sampled signal SAMP and anti-or lock NOR2 output end exports clock pulse
Input signal ck4；Flip-flop DFF6 receive respectively clock signal CLK and clock pulse input signal ck4 and the coupling of its output end it is anti-or
An input terminal of lock NOR3, and anti-or lock NOR3 another input terminal receives sampled signal SAMP and anti-or lock NOR3 output end
Export clock pulse input signal ck5；Flip-flop DFF7 receives clock signal CLK and clock pulse input signal ck5 respectively and exports clock pulse
Signal ck6；And lock AND2 receives enable signal EN and clock pulse input signal ck6 respectively and exports inversion signal RN to flip-flop
DFF1~DFF6.
The input terminal of phase inverter IV2 receives clock pulse input signal ck5 and its output end couples anti-and lock NAND1 a input
End, and anti-and lock NAND1 another input terminal then receives clock pulse input signal ck2 and anti-and lock NAND1 output end output is adjusted
The input terminal 0 of optical signal DIMX to multiplexer MUX；The input terminal of phase inverter IV3 receives sampled signal SAMP and its output end coupling
Connect the input terminal 1 of multiplexer MUX；Multiplexer MUX is controlled by selection signal SEL to be believed according to the sampling of dim signal DIMX and reverse phase
Number SAMP generates dim signal SDIM.Dim signal generation module 202 can be smoothly according to pulse-width modulation signal PWM, cause as a result,
Energy signal EN, clock signal CLK and selection signal SEL generate dim signal SDIM and are exported respectively to first error amplifier 21
And drive control device 23.
Then, respectively work as LED drive 2 to Fig. 8, Fig. 5 to Fig. 8 referring to figure 5. and use the different operating period
Pulse-width modulation signal when each signal timing diagram.
In a preferred embodiment, as shown in figure 5, sampled signal SAMP is in the opening time TON meeting of high levels
Clock cycle TCLK less than clock signal CLK.Assuming that the frequency of clock signal CLK is 1MHz and clock cycle TCLK is 1 micro-
Second (us), the frequency of pulse-width modulation signal PWM is 25KHz and the cycle T PWM of pulse-width modulation signal PWM is 40 microseconds (us), is opened
It opens 1 ﹪ for the duty cycle (Duty cycle) that time TON is pulse-width modulation signal PWM and is 0.4 microsecond (us), due to opening
Time TON is much smaller than 16 microseconds (us), therefore selection signal SEL is in low level, and but not limited to this.
In this embodiment, clock signal CLK can be become high levels in time T1 from low level and maintain one section of high levels
Become low level from high levels in time T2 after time.In a period of time T1 to T2, sampled signal SAMP can then continue to locate
In low level, and LED current ILED can also be continuously in low level.
Then, sampled signal SAMP in time T3 can become high levels from low level and maintain high levels for a period of time after in
Time T4 becomes low level from high levels.Similarly, LED current ILED can also be become followed at time T3 from low level
High levels simultaneously maintain high levels in time T4 to become low level from high levels after for a period of time.In a period of time T3 to T4,
Clock signal CLK can then be continuously in low level, and the flip-flop DFF1 in Fig. 4 is according to input voltage VIN and sampled signal
Indication signal q0 caused by SAMP then can persistently be maintained at high levels after time T3 becomes high levels from low level.
Then, clock signal CLK can become from low level high levels in time T5 and maintain high levels for a period of time after in
Time T6 becomes low level from high levels.And the flip-flop DFF2 in Fig. 4 is according to produced by clock signal CLK and indication signal q0
Clock pulse input signal ck1 then can persistently be maintained at high levels after time T5 becomes high levels from low level.Extremely in time T5
In a period of T6, sampled signal SAMP can be continuously in low level, and LED current ILED can also be continuously in low level
It is quasi-.
Believed in time T7, the flip-flop DFF3 that clock signal CLK can be become from low level in high levels and Fig. 4 according to clock pulse
Clock pulse input signal ck2 caused by number CLK and clock pulse input signal ck1 can also be become high levels from low level, and originally one
The straight dim signal SDIM in high levels then can become low level from high levels in time T7 and persistently be maintained at low level.
It is inputted as the clock pulse according to caused by clock signal CLK and clock pulse input signal ck2 of the flip-flop DFF4 in Fig. 4
Flip-flop DFF5 clock pulse input signal according to caused by clock signal CLK and clock pulse input signal ck3 in signal ck3, Fig. 4
Flip-flop DFF6 clock pulse input signal ck5 according to caused by clock signal CLK and clock pulse input signal ck4 in ck4 and Fig. 4
Also high levels sequentially can be become from low level.In addition, indication signal q0 and clock pulse input signal ck1~ck5 can be in time T8
Become low level from high levels, and the inversion signal RN for being maintained at high levels originally also can become low from high levels in time T8
Level.
When dim signal SDIM becomes low level from high levels, drive control device 23 can be by the dim signal of low level
SDIM starts and exports control signal VGN, and form can include 3 pulse voltages as shown in Figure 5, and but not limited to this.
Then can be with control signal VGN reverse phase as LED drive signals LX, form can include 3 pulses as shown in Figure 5
Voltage, by giving output voltage VO UT to remain to provide enough charges in the case where the opening time, TON was very short, so that output
Voltage VOUT is able to maintain that stabilization.
Further, since the time that drive control device 23 is started by the dim signal SDIM of low level can be with light emitting diode electricity
Time (that is, opening time TON) of the stream ILED greater than 0 offsets one from another, so that LED current ILED will not be driven
Generated influence of noise when starting of controller 23, by maintain stable LED current ILED.
Then, Fig. 6 to Fig. 8 is please referred to, Fig. 6 to Fig. 8 is respectively the opening time TON that sampled signal SAMP is in high levels
The different embodiments of clock cycle TCLK greater than clock signal CLK.
In embodiment depicted in Fig. 6, it is assumed that the frequency of clock signal CLK is 1MHz and clock cycle TCLK is 1 micro-
Second (us), the frequency of pulse-width modulation signal PWM is 25KHz and the cycle T PWM of pulse-width modulation signal PWM is 40 microseconds (us), is opened
It opens 7.5 ﹪ for the duty cycle (Duty cycle) that time TON is pulse-width modulation signal PWM and is 3 microseconds (us), due to opening
Time TON is less than 16 microseconds (us), therefore selection signal SEL is in low level, and but not limited to this.
In embodiment shown in Fig. 7, it is assumed that the frequency of clock signal CLK is 1.2MHz and clock cycle TCLK is
0.833 microsecond (us), the frequency of pulse-width modulation signal PWM is 25KHz and the cycle T PWM of pulse-width modulation signal PWM is 40 microseconds
(us), 15 ﹪ for the duty cycle (Duty cycle) that opening time TON is pulse-width modulation signal PWM and be 6 microseconds (us), by
In opening time TON less than 16 microseconds (us), therefore selection signal SEL is in low level, and but not limited to this.
In embodiment shown in Fig. 8, it is assumed that the frequency of clock signal CLK is 1.2MHz and clock cycle TCLK is
0.833 microsecond (us), the frequency of pulse-width modulation signal PWM is 25KHz and the cycle T PWM of pulse-width modulation signal PWM is 40 microseconds
(us), 40 ﹪ for the duty cycle (Duty cycle) that opening time TON is pulse-width modulation signal PWM and be 16 microseconds (us),
Since opening time TON is equal to 16 microseconds (us), therefore selection signal SEL is in high levels, and but not limited to this.
Compared to the prior art, the work week of LED drive of the invention in its pulse-width modulation signal used
It is to reach following function in such a way that adjusting control circuit exports sampled signal and dim signal respectively in the case that phase is too small
Effect:
(1) it is selected by switch unit of the sampled signal control between error amplifier and minimum voltage selecting unit
Property be connected, cause error amplifier only can be greater than 0 Shi Caihui in light-emitting diodes tube voltage and receive minimum light emitting diode electricity
Pressure, and then generate correct offset voltage；
(2) only it just will start drive control device when dim signal is in low level and issue multiple pulse voltages to mention
For enough charges to output voltage, to maintain stable output voltage；
(3) since the time that drive control device is started by the dim signal of low level can be greater than 0 with LED current
Time offset one from another so that generated influence of noise when LED current will not be driven controller starting, with
Maintain stable LED current；And
(4) output of first error amplifier can be controlled by dim signal in high resistant state of value, cause first error
Offset voltage caused by amplifier still can persistently maintain its voltage value constant in the case where opening circuit.
By the above detailed description of preferred embodiments, it is intended to more clearly describe feature and spirit of the invention, and
Not scope of the invention is limited with above-mentioned disclosed preferred embodiment.On the contrary, the purpose is to wish
Various changes can be covered and have being arranged in the scope of the scope of the patents to be applied of the invention of equality.
Claims (11)
1. a kind of LED drive, to drive multi-group light-emitting diode string, which is characterized in that the light emitting diode drives
Dynamic device includes:
One adjusting control circuit, to receive a pulse-width modulation signal and a clock signal respectively and export a dim signal respectively
And a sampled signal, the opening time that wherein sampled signal is in high levels are less than a clock cycle of the clock signal；
One first error amplifier, couples the adjusting control circuit, to receive a back voltage, a reference voltage respectively and be somebody's turn to do
Dim signal simultaneously exports an offset voltage；
One second error amplifier couples the first error amplifier, to receive the offset voltage and a ramp signal respectively
And export a pulse voltage；
One drive control device is respectively coupled to the adjusting control circuit and second error amplifier, to receive the light modulation respectively
Signal and the pulse voltage simultaneously export a control signal；
One output stage is respectively coupled to the drive control device, a first end of the multi-group light-emitting diode string, an input voltage and one
Ground terminal is caused to receive the control signal and the input voltage and generate an output voltage to the multi-group light-emitting diode string
Multiple LED currents are made to flow to the multi-group light-emitting diode string by the first end of the multi-group light-emitting diode string respectively
A second end；
One minimum voltage selecting unit is respectively coupled to the second end of the multi-group light-emitting diode string, to sense multiple groups hair
Multiple light-emitting diodes tube voltages of the second end of optical diode string simultaneously select a minimum from multiple light-emitting diodes tube voltage
Light-emitting diodes tube voltage；And
One switch unit is respectively coupled to the adjusting control circuit, the first error amplifier and the minimum voltage selecting unit, uses
Selectively turn on the minimum voltage selecting unit and the first error amplifier to be controlled by the sampled signal, cause this
One error amplifier receives the minimum light-emitting diodes tube voltage.
2. LED drive as described in claim 1, which is characterized in that when the sampled signal has high levels,
The switch unit is controlled by the sampled signal and the minimum voltage selecting unit and the first error amplifier is connected.
3. LED drive as described in claim 1, which is characterized in that when multiple LED current is greater than
When 0, which just has high levels.
4. LED drive as described in claim 1, which is characterized in that when the dim signal has low level,
The drive control device can just be started by the dim signal and export the control signal.
5. LED drive as claimed in claim 4, which is characterized in that the dim signal is in the time of low level
It is to offset one from another with the opening time, when multiple LED current being caused to be greater than 0, the drive control device is simultaneously inactive.
6. LED drive as described in claim 1, which is characterized in that the output stage includes an inductance, a crystal
Pipe switch and a diode, the gate of the transistor switch couple the drive control device and are controlled by the control signal, the inductance
It is coupled between the input voltage and the ground terminal with the transistor switch, according to the control between the inductance and the transistor switch
Signal processed generates a LED drive signals, which receives the LED drive signals and export output electricity
Pressure.
7. LED drive as claimed in claim 6, which is characterized in that when the dim signal has low level,
The control signal and LED drive signals are pulse signal inverting each other.
8. LED drive as described in claim 1, which is characterized in that when the first error amplifier receives this
When dim signal, the first error amplifier it is output-controlled in the dim signal and be in high resistant state of value, cause this first
The offset voltage that error amplifier is exported can continue to maintain its voltage value constant.
9. LED drive as described in claim 1, which is characterized in that the adjusting control circuit also receives an enable
Signal, the adjusting control circuit include one and lock and through should and lock the enable signal is added with the pulse-width modulation signal and is obtained
To the sampled signal.
10. LED drive as claimed in claim 9, which is characterized in that the adjusting control circuit also includes multiple
Flip-flop simultaneously generates multiple clock pulse input signals according to the clock signal through multiple flip-flop.
11. LED drive as claimed in claim 10, which is characterized in that the adjusting control circuit also receives a choosing
Signal is selected, which also includes a multiplexer and input letter according to multiple clock pulse of part through the multiplexer
Number, the sampled signal and the selection signal generate the dim signal.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201662420023P | 2016-11-10 | 2016-11-10 | |
| US62/420,023 | 2016-11-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108076561A CN108076561A (en) | 2018-05-25 |
| CN108076561B true CN108076561B (en) | 2019-11-19 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711102184.2A Active CN108076561B (en) | 2016-11-10 | 2017-11-10 | LED drive |
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| Country | Link |
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| US (1) | US10143054B2 (en) |
| CN (1) | CN108076561B (en) |
| TW (1) | TWI642046B (en) |
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| US11032881B2 (en) * | 2019-07-22 | 2021-06-08 | O2Micro Inc. | Controller for controlling light source module |
| CN110687954B (en) * | 2019-11-01 | 2021-12-14 | 上海艾为电子技术股份有限公司 | Backlight chip and screen light supplement circuit |
| CN112804786B (en) * | 2019-11-13 | 2022-10-14 | 圣邦微电子（北京）股份有限公司 | LED drive circuit and control circuit thereof |
| TW202334934A (en) * | 2020-01-10 | 2023-09-01 | 瑞鼎科技股份有限公司 | Micro-led display system |
| CN112562574B (en) * | 2020-12-01 | 2022-06-10 | Tcl华星光电技术有限公司 | Switch module and display device |
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| US7855520B2 (en) * | 2008-03-19 | 2010-12-21 | Niko Semiconductor Co., Ltd. | Light-emitting diode driving circuit and secondary side controller for controlling the same |
| US8390262B2 (en) * | 2008-11-17 | 2013-03-05 | Lepower Semiconductor Inc. | Methods and circuits for LED drivers and for PWM dimming controls |
| CN101754517B (en) * | 2008-11-28 | 2013-03-27 | 盛群半导体股份有限公司 | Control drive device of luminous diode |
| US20130278145A1 (en) * | 2008-12-12 | 2013-10-24 | O2Micro Inc. | Circuits and methods for driving light sources |
| CN103179743A (en) * | 2009-03-04 | 2013-06-26 | 立锜科技股份有限公司 | Led driver with direct ac-dc conversion and control, and method and integrated circuit therefor |
| AT508969B1 (en) * | 2009-10-22 | 2011-07-15 | Lunatone Ind Elektronik Gmbh | LED POWER SUPPLY |
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2017
- 2017-11-09 US US15/808,636 patent/US10143054B2/en active Active
- 2017-11-10 TW TW106138952A patent/TWI642046B/en active
- 2017-11-10 CN CN201711102184.2A patent/CN108076561B/en active Active
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| Publication number | Publication date |
|---|---|
| TW201818389A (en) | 2018-05-16 |
| US10143054B2 (en) | 2018-11-27 |
| US20180132321A1 (en) | 2018-05-10 |
| CN108076561A (en) | 2018-05-25 |
| TWI642046B (en) | 2018-11-21 |
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