CN108054214A - The production method of transistor arrangement and transistor - Google Patents
The production method of transistor arrangement and transistor Download PDFInfo
- Publication number
- CN108054214A CN108054214A CN201711076141.1A CN201711076141A CN108054214A CN 108054214 A CN108054214 A CN 108054214A CN 201711076141 A CN201711076141 A CN 201711076141A CN 108054214 A CN108054214 A CN 108054214A
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- Prior art keywords
- indium gallium
- zinc oxide
- gallium zinc
- active layer
- described hole
- Prior art date
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims abstract description 91
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims abstract description 47
- 229910052733 gallium Inorganic materials 0.000 claims abstract description 47
- 229910052738 indium Inorganic materials 0.000 claims abstract description 47
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims abstract description 47
- 239000011787 zinc oxide Substances 0.000 claims abstract description 45
- 239000002086 nanomaterial Substances 0.000 claims abstract description 19
- 239000000758 substrate Substances 0.000 claims description 22
- 239000011148 porous material Substances 0.000 claims description 16
- 238000001338 self-assembly Methods 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 12
- 238000002161 passivation Methods 0.000 claims description 9
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 239000000693 micelle Substances 0.000 claims description 5
- 238000005755 formation reaction Methods 0.000 claims description 4
- 230000007246 mechanism Effects 0.000 claims description 3
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims 1
- 239000004744 fabric Substances 0.000 claims 1
- 229910052725 zinc Inorganic materials 0.000 claims 1
- 239000011701 zinc Substances 0.000 claims 1
- 239000010409 thin film Substances 0.000 abstract description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 19
- 239000000463 material Substances 0.000 description 16
- 238000010586 diagram Methods 0.000 description 15
- 239000004973 liquid crystal related substance Substances 0.000 description 15
- 229910052814 silicon oxide Inorganic materials 0.000 description 9
- 239000002159 nanocrystal Substances 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 5
- 238000003786 synthesis reaction Methods 0.000 description 4
- 238000003795 desorption Methods 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 239000002070 nanowire Substances 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 230000035699 permeability Effects 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 238000012216 screening Methods 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000004094 surface-active agent Substances 0.000 description 3
- 229910008051 Si-OH Inorganic materials 0.000 description 2
- 229910006358 Si—OH Inorganic materials 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000003912 environmental pollution Methods 0.000 description 2
- 239000003205 fragrance Substances 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000013335 mesoporous material Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 239000003381 stabilizer Substances 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- 238000003917 TEM image Methods 0.000 description 1
- 238000001354 calcination Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000005357 flat glass Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000016507 interphase Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 238000003980 solgel method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Nonlinear Science (AREA)
- Manufacturing & Machinery (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention discloses the production methods of a kind of transistor arrangement and transistor.Thin-film transistor structure of the present invention includes：Source electrode, drain electrode and the active layer between source electrode and drain electrode；The active layer includes indium gallium zinc oxide frame, and the active layer includes indium gallium zinc oxide frame, the nano materials for including indium gallium zinc oxide are set in the indium gallium zinc oxide frame.The present invention can promote the performance of thin film transistor (TFT).
Description
Technical field
The present invention relates to display technology field, more specifically, being related to the making side of a kind of transistor arrangement and transistor
Method.
Background technology
Liquid crystal display has many merits such as thin fuselage, power saving, radiationless, is widely used.Existing market
On liquid crystal display largely for backlight liquid crystal display, including liquid crystal panel and backlight module (Backlight
Module).The operation principle of liquid crystal panel is that liquid crystal molecule is placed among the parallel glass substrate of two panels, and in two sheet glass
Apply driving voltage on substrate to control the direction of rotation of liquid crystal molecule, the light of backlight module is reflected into generation picture
Face.
Wherein, Thin Film Transistor-LCD (Thin Film Transistor-Liquid Crystal
Display, TFT-LCD) due to performances such as low power consumption, excellent picture quality and higher production yields, at present
The leading position of display field is gradually occupied.Equally, Thin Film Transistor-LCD includes liquid crystal panel and backlight
Module, liquid crystal panel include color membrane substrates (Color Filter Substrate, CF Substrate, also referred to as colored filter
Substrate) and thin-film transistor array base-plate (Thin Film Transistor Substrate, TFT Substrate), it is above-mentioned
There are transparent electrodes for the relative inner of substrate.One layer of liquid crystal molecule (Liquid Crystal, LC) is pressed from both sides between two plate bases.Liquid crystal
Panel is the control to liquid crystal molecular orientation by electric field, changes the polarization state of light, and realizes wearing for light path by polarizer
Thoroughly with stop, the purpose of display is realized.
The basis that high performance TFT devices are high-quality LCD is prepared, the thin film transistor (TFT) (TFT) of a new generation uses at present
Indium gallium zinc oxide (indium gallium zinc oxide, IGZO) be used as active layer material, come connect the source electrode of TFT and
Drain electrode, the carrier mobility of IGZO is 20~30 times of non-crystalline silicon, can greatly improve charge and discharge speed of the TFT to pixel electrode
Rate improves the response speed of pixel, realizes faster refresh rate, while response faster also substantially increases the row scanning of pixel
Rate.The present invention proposes a kind of new IGZO active layer technical solutions, can further promote the performance of TFT.
The content of the invention
The production method that the technical problems to be solved by the invention are to provide a kind of transistor arrangement and transistor, with into one
Step promotes the performance of transistor.
The purpose of the present invention is what is be achieved through the following technical solutions：
According to an aspect of the present invention, the invention discloses a kind of transistor arrangement, including：
Source electrode,
Drain electrode and
Active layer between source electrode and drain electrode；
Insulating layer is formed on active layer；
Dielectric layer is formed on the insulating layer；
Grid is formed on the dielectric layer；
Passivation layer is formed on grid；
The active layer includes indium gallium zinc oxide frame, is set in the indium gallium zinc oxide frame comprising indium gallium zinc oxygen
The nano materials of compound.
Further, the indium gallium zinc oxide frame includes the hole of several cylinders, and described hole runs through indium gallium zinc
Oxide framework, the nano materials are filled in described hole.This is a kind of specific indium gallium zinc oxide frame knot
Structure is facilitated using pore space structure and is implemented using self assembly molecule template solution oxide.
Further, the indium gallium zinc oxide frame further includes molecule masterplate, and the molecule masterplate uses organic molecule
Masterplate self-assembling technique is made.Mesoporous silicon oxide has specific pore passage structure, have it is hollow, density is small, large specific surface area, thus
With unique permeability, screening molecule ability, optical property and adsorptivity, active layer characteristic can be obviously improved.
Further, the indium gallium zinc oxide frame includes indium gallium zinc oxide nano material.Indium gallium zinc oxide material
The nanocrystal of material more can be mixed equably with mesoporous silicon oxide, improve electric conductivity.
Further, the diameter range of described hole is 2-7 nanometers；The pore wall thickness scope of described hole is 1-2 nanometers.
This is a kind of more preferred bore hole size.
Further, described hole presses hexagon regular array.Hexagon regular array can form the structure of class honeycomb,
Stability is good.
According to another aspect of the present invention, the invention also discloses a kind of display panel, including：
Substrate；And
Transistor arrangement of the present invention.
According to another aspect of the present invention, the invention also discloses a kind of production method of transistor, including：
The active layer between source electrode and drain electrode and source electrode and drain electrode is formed on substrate；
Insulating layer is formed on active layer；
Dielectric layer is formed on the insulating layer；
Grid is formed on the dielectric layer；
Passivation layer is formed on grid；
The forming method of the active layer includes：
Indium gallium zinc oxide frame is formed in the active layer structure of transistor；
The nano materials for including indium gallium zinc oxide are formed in indium gallium zinc oxide frame.
Further, the method for forming indium gallium zinc oxide frame includes：
Form micella；
By micelle forma-tion micella stick；
Micella stick is formed into hexagonal array by hexagonal array；
Hexagonal array is formed into template middle groups according to organic molecule templating self-assembly mechanism；
Removing template is gone to form indium gallium zinc oxide frame template middle groups roast.
For the hexagonal array formed by the use of micella stick as masterplate, template is both setting agent and stabilizer in itself, is passed through
Expectations of control to material structure can be realized by changing its shape and size；In addition, experimental provision is simple, operation is easy.And glue
Fasces can reuse, and reduce waste, advantageously reduce cost and reduce environmental pollution.
Further, the indium gallium zinc oxide frame includes the hole of several cylinders, and described hole runs through indium gallium zinc
Oxide framework, the nano materials are filled in described hole；The diameter range of described hole is 2-7 nanometers；It is described
The pore wall thickness scope of hole is 1-2 nanometers.
According to another aspect of the present invention, the invention also discloses a kind of display panel, substrates；And the present invention is any
The transistor.
Present invention employs the self assembly molecule template solution oxidation technology of indium gallium zinc oxide frame in rule, positioned at visitor
Nanometer indium gallium zinc oxide (nano-IGZO source) in body so that positioned at the microcosmic porous indium gallium zinc oxide frame of main body
The hydrogen-oxygen root functionality group of frame (Meso-porous IGZO framework) hole surface can be converted to a nanometer indium gallium zinc oxide
Required ion (Nano- (IGZO) x).The electric conductivity of active layer is so significantly improved, and then improves transistor
Performance.
Description of the drawings
Included attached drawing is used for providing being further understood from the embodiment of the present application, which constitutes one of specification
Point, for illustrating presently filed embodiment, and with word description come together to illustrate the principle of the application.Under it should be evident that
Attached drawing in the description of face is only some embodiments of the present application, for those of ordinary skill in the art, is not paying wound
On the premise of the property made is laborious, other attached drawings are can also be obtained according to these attached drawings.In the accompanying drawings：
Fig. 1 is the display panel structure schematic diagram of the embodiment of the present invention；
Fig. 2 is the microstructure schematic diagram of active layer of the embodiment of the present invention；
Fig. 3 is self assembly mesoporous silicon oxide framework technology schematic diagram of the embodiment of the present invention；
Fig. 4 is cylindrical micelle schematic diagram of the embodiment of the present invention；
Fig. 5 is IGZO block schematic illustrations of the embodiment of the present invention；
Fig. 6 is organic molecule masterplate self assembly schematic diagram of the embodiment of the present invention；
Fig. 7 is the aperture of hole of the embodiment of the present invention and desorption strength relation schematic diagram；
Fig. 8 is the TEM image schematic diagrames of active layer of the embodiment of the present invention；
Fig. 9 is X-ray intensity of the embodiment of the present invention and temperature curve schematic diagram；
Figure 10 is the microstructure schematic diagram of synthesis nano wire of the embodiment of the present invention；
Figure 11 is the production method flow diagram of thin film transistor (TFT) of the embodiment of the present invention；
Figure 12 is the production method flow diagram of the another thin film transistor (TFT) of the embodiment of the present invention；
Figure 13 is self assembly mesoporous silicon oxide framework technology schematic diagram of the embodiment of the present invention；
Figure 14 is the preparation method schematic diagram of nano-stephanoporate silicon dioxide medium of the embodiment of the present invention；
Figure 15 is that the microcosmic-IGZO frames of rule of the embodiment of the present invention pass through self assembly molecule template method flow diagram.
Figure 16 is IGZO of embodiment of the present invention frames assembling method flow schematic diagram.
Wherein, 10, source electrode；11st, drain；12nd, grid；13rd, active layer；14th, dielectric layer；15th, passivation layer；16th, side slope knot
Structure；17th, substrate；18th, IGZO frames；19th, molecule (organic molecule masterplate)；20th, nanometer-IGZO；21st, cylindrical micelle；22nd, six
Square filling liquid crystalline phase；23rd, nanocrystal；24th, silica hole wall；25th, surfactant micellar；26th, hexagonal matrix；27th, certainly
Assemble hybrid (fine structure material)；28th, mesoporous material；29th, xerogel；30th, aeroge；31st, sol solution；32、
Surfactant；33rd, gel；34th, micella；35th, micella stick；36th, self assembly mesoporous silicon oxide；37th, masterplate interphase；38、
The masterplate removed；39th, hole；40th, insulating layer.D1：Aperture diameter；D2：Pore wall thickness；Si(OR)4：Inorganic fragrance.
Specific embodiment
The invention discloses the production methods of a kind of transistor arrangement and transistor.Transistor arrangement includes：Substrate is formed
Active layer between the source electrode of substrate surface and drain electrode and source electrode and drain electrode；The insulating layer being formed on active layer；It is formed
Dielectric layer on the insulating layer；Form grid on the dielectric layer；The passivation layer being formed on grid；The active layer includes indium
Gallium zinc oxide frame (IGZO frames), the IGZO frames are interior to set the nano materials for including IGZO.
Disclosed by the invention kind of display panel includes：Substrate；And transistor arrangement, the side of being disposed on the substrate；Side slope knot
Structure is arranged on transistor both sides；The transistor includes source electrode, drain electrode and connection source electrode and the active layer of drain electrode；It is described to have
Active layer includes IGZO frames, and the nano materials for including IGZO are set in the IGZO frames.
The production method of transistor disclosed by the invention includes：
The active layer between source electrode and drain electrode and source electrode and drain electrode is formed on substrate；
Insulating layer is formed on active layer；
Dielectric layer is formed on the insulating layer；
Grid is formed on the dielectric layer；
Passivation layer is formed on grid；
The forming method of the active layer includes：
IGZO frames are formed in the active layer structure of transistor；
The nano materials comprising IGZO and molecule masterplate are formed in IGZO frames.
Present invention employs the self assembly molecule template solution oxidation technology of IGZO frames in rule, receiving in object
Rice IGZO (nano-IGZO source) so that positioned at microcosmic porous IGZO frames (the Meso-porous IGZO of main body
Framework) the hydrogen-oxygen root functionality group of hole surface can be converted to the ion (Nano- (IGZO) x) needed for nanometer IGZO.So
The electric conductivity of active layer is significantly improved, and then improves the performance of transistor.
Concrete structure and function detail disclosed herein are only representative, and are for describing showing for the present invention
The purpose of example property embodiment.But the present invention can be implemented by many alternative forms, and be not interpreted as
It is limited only by the embodiments set forth herein.
In the description of the present invention, it is to be understood that term " " center ", " transverse direction ", " on ", " under ", "left", "right",
The orientation or position relationship of the instructions such as " vertical ", " level ", " top ", " bottom ", " interior ", " outer " be based on orientation shown in the drawings or
Position relationship is for only for ease of the description present invention and simplifies description rather than instruction or imply that signified device or element must
There must be specific orientation, with specific azimuth configuration and operation, therefore be not considered as limiting the invention.In addition, art
Language " first ", " second " are only used for description purpose, and it is not intended that instruction or implying relative importance or implicit indicating institute
The quantity of the technical characteristic of instruction." first " is defined as a result, one can be expressed or be implicitly included to the feature of " second "
Or more this feature.In the description of the present invention, unless otherwise indicated, " multiple " are meant that two or more.
In addition, term " comprising " and its any deformation, it is intended that cover non-exclusive include.
In the description of the present invention, it is necessary to illustrate, unless otherwise clearly defined and limited, term " installation ", " phase
Even ", " connection " should be interpreted broadly, for example, it may be being fixedly connected or being detachably connected or be integrally connected；It can
To be mechanical connection or be electrically connected；It can be directly connected, can also be indirectly connected by intermediary, Ke Yishi
Connection inside two elements.For the ordinary skill in the art, with concrete condition above-mentioned term can be understood at this
Concrete meaning in invention.
Term used herein above is not intended to limit exemplary embodiment just for the sake of description specific embodiment.Unless
Context clearly refers else, otherwise singulative used herein above "one", " one " also attempt to include plural number.Should also
When understanding, term " comprising " and/or "comprising" used herein above provide stated feature, integer, step, operation,
The presence of unit and/or component, and do not preclude the presence or addition of other one or more features, integer, step, operation, unit,
Component and/or its combination.
Below in conjunction with the accompanying drawings 1 to 16 and preferred embodiment present embodiment is described in further detail.
The transistor arrangement of one embodiment of present embodiment, including：
Source electrode 10,
Drain electrode 11 and
Active layer 13 between source electrode 10 and drain electrode 11；
The active layer 13 includes IGZO frames 18, and the synthesis nanometer material for including IGZO is set in the IGZO frames 18
Material.
Wherein, source electrode 10, drain electrode 11 and active layer 13 are arranged on substrate surface；The active layer has been sequentially arranged above absolutely
Edge layer 40, dielectric layer 14, grid 12 and passivation layer 15；The source electrode and drain electrode are partially submerged into the edge slope structure；It is described blunt
Change the surface of layer segment covering edge slope structure.Present embodiment with source electrode and drain electrode positioned at substrate-side TFT structure for example,
But for other structures, the TFT as grid is located at substrate-side is equally applicable.
IGZO frames 18 include the hole of several cylinders, and described hole runs through IGZO frames 18, the synthesis nanometer material
Material is filled in described hole.Facilitated using pore space structure and implemented using self assembly molecule template solution oxide, hole can be with
It is that cylindrical or polygon, different manufacture crafts and product requirement can produce pore space structure of different shapes,
Therefore, variously-shaped pore space structure is all in present embodiment conception range.
Wherein, the diameter range of hole 39 is 2-7 nanometers；The pore wall thickness scope of described hole 39 is 1-2 nanometers.Hole
39th, the size of hole wall is too big and too small all improper, and inventor draws pass of Fig. 7 bore dias with desorption strength by Test Summary
System, it is seen that the diameter range of hole 39, which is 2-7 nanometers, the pore wall thickness scope of hole 39 is 1-2 nanometers can ensure active layer 13
Performance.
Wherein, hole 39 presses hexagon regular array.Hexagon regular array can form the structure of class honeycomb, stability
It is good.
Wherein, the IGZO frames are made of organic molecule masterplate self-assembling technique.Mesoporous silicon oxide has particular bore
Road structure, has that hollow, density is small, large specific surface area, thus with unique permeability, screening molecule ability, optical property
And adsorptivity, 13 characteristic of active layer can be obviously improved.
With reference to figure 10, the hole wall to be formed is made including earth silicon material in the indium gallium zinc oxide frame；The hole
The nanocrystal of IGZO materials is provided on wall.The nanocrystal of IGZO materials more can be mixed equably with mesoporous silicon oxide
It closes, improves electric conductivity.
Embodiment shown in FIG. 1, which discloses a kind of display panel, to be included：
Substrate 17；And
Transistor, the side of being disposed on the substrate；
Edge slope structure 16 is arranged on transistor both sides；
Wherein, thin film transistor (TFT) can be used in the transistor, and transistor arrangement refers to the above embodiment.
The embodiment of Figure 12, which discloses a kind of production method of transistor, to be included：
S11, IGZO frames 18 are formed in 13 structure of active layer of transistor；
S12, the nano materials for including IGZO are formed in IGZO frames 18.Nano material can be nano wire.
Self assembly molecule masterplate technology may be employed to realize in IGZO frames 18.Self assembly molecule masterplate technology with make from
It is illustrated exemplified by assembly mesoporous silica framework.With reference to figure 14, using sol-gel method by inorganic fragrance Si (OR)4Turn
Change Si (OR) into3On the other hand surfactant micellar, is arranged in hexagonal matrix, by hexagonal by Si-OH by self-assembling technique
The micella and Si (OR) of matrix3Si-OH forms the fine structure material of organic/inorganic hybrid by collaborative assembly technology self assembly,
Then mesoporous material is formed by drying and calcination.The preparation method of nano-stephanoporate silicon dioxide medium may be referred to Figure 15.
IGZO frames include the hole 39 of several cylinders, and described hole 39 runs through IGZO frames 18, the synthesis nanometer
Material is filled in described hole 39.Facilitated using 39 structure of hole and implemented using self assembly molecule template solution oxide, hole
Hole 39 can be cylindrical or polygon, and different manufacture crafts and product requirement can be produced of different shapes
39 structure of hole, therefore, variously-shaped 39 structure of hole is all in present embodiment conception range.
Wherein, the diameter range of hole 39 is 2-7 nanometers；The pore wall thickness scope of described hole 39 is 1-2 nanometers.Hole
39th, the size of hole wall is too big and too small all improper, and inventor draws pass of Fig. 7 bore dias with desorption strength by Test Summary
System, it is seen that the diameter range of hole 39, which is 2-7 nanometers, the pore wall thickness scope of hole 39 is 1-2 nanometers can ensure active layer 13
Performance.
Wherein, hole 39 presses hexagon regular array.Hexagon regular array can form the structure of class honeycomb, stability
It is good.
Mesoporous silicon oxide has specific pore passage structure, has that hollow, density is small, large specific surface area, thus with unique
Permeability, screening molecule ability, optical property and adsorptivity, can be obviously improved 13 characteristic of active layer.
With reference to figure 10, molecule masterplate makes the hole wall to be formed including earth silicon material；IGZO is provided on the hole wall
The nanocrystal of material and organic molecule masterplate.The nanocrystal of IGZO materials more can be mixed equably with mesoporous silicon oxide
It closes, improves electric conductivity.
Figure 13,16 embodiment disclose a kind of production method of transistor, including
S21, micella is formed；
S22, by micelle forma-tion micella stick；
S23, micella stick is formed into hexagonal array by hexagonal array；
S24, hexagonal array is formed into template middle groups according to organic molecule templating self-assembly mechanism；
S25, template middle groups roast is gone removing template form IGZO frames 18；
S26, the nano materials for including IGZO are formed in IGZO frames 18.Nano material can be nano wire.
For the hexagonal array formed by the use of micella stick as masterplate, template is both setting agent and stabilizer in itself, is passed through
Expectations of control to material structure can be realized by changing its shape and size；In addition, experimental provision is simple, operation is easy.And glue
Fasces can reuse, and reduce waste, advantageously reduce cost and reduce environmental pollution.
The preparation method of nano-stephanoporate silicon dioxide medium may be referred to Figure 15.
In the above-described embodiments, transistor can be thin film transistor (TFT), and display panel may include liquid crystal panel, plasma face
Plate, oled panel, QLED panels etc..In addition, display panel can be plane panel or curved face type panel.
The above content is the further descriptions made with reference to specific preferred embodiment to present embodiment, it is impossible to
Assert that the specific implementation of present embodiment is confined to these explanations.For the ordinary skill of present embodiment technical field
For personnel, on the premise of present embodiment design is not departed from, several simple deduction or replace can also be made, should all be regarded
To belong to the protection domain of present embodiment.
Claims (10)
1. a kind of transistor, which is characterized in that including：
Source electrode,
Drain electrode and
Active layer between source electrode and drain electrode；
Insulating layer is formed on active layer；
Dielectric layer is formed on the insulating layer；
Grid is formed on the dielectric layer；
Passivation layer is formed on grid；
The active layer includes indium gallium zinc oxide frame, is set in the indium gallium zinc oxide frame comprising indium gallium zinc oxide
Nano materials.
2. transistor according to claim 1, which is characterized in that the indium gallium zinc oxide frame includes several cylinders
Hole, described hole runs through indium gallium zinc oxide frame, and the nano materials are filled in described hole.
3. transistor according to claim 2, which is characterized in that the diameter range of described hole is 2-7 nanometers；The hole
The pore wall thickness scope in hole is 1-2 nanometers.
4. transistor according to claim 1, which is characterized in that the indium gallium zinc oxide frame uses organic molecule mould
Version self-assembling technique is made.
5. transistor according to claim 2, which is characterized in that described hole presses hexagon regular array.
6. a kind of production method of transistor, which is characterized in that including：
The active layer between source electrode and drain electrode and source electrode and drain electrode is formed on substrate；
Insulating layer is formed on active layer；
Dielectric layer is formed on the insulating layer；
Grid is formed on the dielectric layer；
Passivation layer is formed on grid；
The forming method of the active layer includes：
Indium gallium zinc oxide frame is formed in the active layer structure of transistor；
The nano materials for including indium gallium zinc oxide are formed in indium gallium zinc oxide frame.
7. the production method of transistor according to claim 6, which is characterized in that the formation indium gallium zinc oxide frame
Method include：
Form micella；
By micelle forma-tion micella stick；
Micella stick is formed into hexagonal array by hexagonal array；
Hexagonal array is formed into template middle groups according to organic molecule templating self-assembly mechanism；
Removing template is gone to form indium gallium zinc oxide frame template middle groups roast.
8. the production method of transistor according to claim 6, which is characterized in that the indium gallium zinc oxide frame includes
The hole of several cylinders, described hole run through indium gallium zinc oxide frame, and the nano materials are filled in described hole
It is interior；The diameter range of described hole is 2-7 nanometers；The pore wall thickness scope of described hole is 1-2 nanometers.
9. the production method of transistor according to claim 8, which is characterized in that described hole is by hexagon rule row
Cloth.
10. a kind of transistor, which is characterized in that including：
Source electrode,
Drain electrode and
Connect source electrode and the active layer of drain electrode；
Insulating layer is formed on active layer；
Dielectric layer is formed on the insulating layer；
Grid is formed on the dielectric layer；
Passivation layer is formed on grid；
Wherein, the active layer includes indium gallium zinc oxide frame, is set in the indium gallium zinc oxide frame comprising indium gallium zinc
The nano materials of oxide；
Wherein, indium gallium zinc oxide frame includes the hole of several cylinders, and described hole runs through indium gallium zinc oxide frame, institute
It states nano materials to be filled in described hole, described hole presses hexagon regular array, and the diameter range of described hole is
2-7 nanometers；The pore wall thickness scope of described hole is 1-2 nanometers.
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| CN109669301A (en) * | 2019-03-01 | 2019-04-23 | 惠科股份有限公司 | Quantum dot color membrane substrates and display device |
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