CN108037690A - L EU processing board system, program and software system - Google Patents
L EU processing board system, program and software system Download PDFInfo
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Abstract
The invention provides a L EU processing board system, a program and a software system for realizing modular design of a flow on a L EU processing board, wherein the L EU processing board system comprises a L EU processing board and a software system, and the L EU processing board is used as an operation platform of the software system, wherein the software system comprises one or more of an acquisition configuration module, an acquisition module, a communication processing module, a message selection module, a task level synchronization module, a message output module and a self-checking and fault processing module.
Description
Technical Field
The invention belongs to the technical field of railway signal processing, and particularly relates to an LEU processing board system, a program and a software system.
Background
A response Transmission system (BTS) is a safety Transmission system based on point information Transmission, and realizes safety information Transmission between roadside equipment or ground equipment and vehicle-mounted equipment. The transponder transmission system comprises three basic components, namely a transponder transmission module (BTM), a vehicle-mounted Antenna Unit (AU), an active transponder (Controlled Balise), a passive transponder (Fixed Balise) and a ground electronic unit (LEU).
The transponder installed in the center of the track does not need an external power supply, the BTM continuously radiates energy to the ground through the antenna unit AU during the running period of the train, the transponder receives the power radiated by the antenna unit to work, internal coded information or coded information (only limited by an active transponder) of a ground electronic unit (LEU) is sent to the vehicle-mounted antenna AU, the vehicle-mounted antenna transmits a received uplink signal to the BTM, and the BTM sends the received data to the vehicle-mounted control core.
The data information that the transponder transmission system can provide includes signal data, control data, location and geographical information, train target operation information, route information, line speed, temporary speed limits, and the like.
The main function of the ground electronic unit LEU device is to select an appropriate message according to the external input state (for example, serial input, relay contact state or current state) of the interface S; or extracting the message in the communication data of the interface S and sending the message to the active responder through the interface C.
As shown in the schematic structural diagram of the LEU device shown in fig. 1, the LEU device includes an acquisition module, a processing module, an output module, a switching module, a monitoring module, an acquisition module, a communication interface, a power supply interface, and the like. Wherein:
the safety acquisition and self-checking functions of the LEU equipment are distributed in the acquisition module, and the related functions of the communication data processing of the interface S, the message selection, the equipment self-checking and the like are distributed in the processing board module. The processing module architecture is designed to take two 2oo2 failure-safety principle structures.
And the output module is responsible for carrying out DPBL coding on the transmission message sent by the processing board, converting the transmission message into a signal meeting the index requirement of the interface C and sending the signal to the active responder.
The switching module adopts relay logic and is responsible for selecting the final output of two paths of redundant C interface signals when the LEU is in redundant use.
The monitoring module monitors and records various operation state data in the LEU operation process.
The communication interface receives message information from equipment such as a train control center or an interlock, and the power supply interface supplies power to the LEU equipment by using a 24V power supply provided by a power supply system.
In the prior art, the conditions of different configurations and different use scenes are not fully considered for the operation flow of the LEU processing board, and the efficiency is low in the process that relevant supporting software operates and executes the corresponding flow on the LEU processing board.
Disclosure of Invention
In order to solve the technical problems, the invention improves the process design method, the module and the program on the LEU processing board, modularly designs the program, the software and the method which run in the LEU processing board from the aspect of functional process, is more suitable for each hardware module of the LEU processing board, and integrally improves the efficiency of the operation process of the LEU processing board.
The invention provides an LEU processing board system, which comprises an LEU processing board and a software system, wherein the LEU processing board is used as an operating platform of the software system; wherein the software system comprises one or more of the following modules:
a collection configuration module;
an acquisition module;
a communication processing module;
a message selection module;
a task level synchronization module;
a message output module;
and the self-checking and fault processing module.
Further, the system configuration module acquires processor identification information when starting, reads configuration data and completes verification; and/or providing interfaces for other modules to acquire system configuration data during the operation of the software system.
Further, the system configuration module includes:
the input module reads the processor ID, the FPGA version number, the system configuration, the acquisition configuration, the message configuration and/or the production information;
and the output module outputs system configuration data and/or configuration parameter fault information.
Further, the acquisition module generates an acquisition command to be sent to an acquisition board when the software system works in an acquisition mode; and/or reading and analyzing the acquisition result sent back by the acquisition board to obtain the acquisition state.
Further, the acquisition module comprises:
the input module reads an acquisition result, reads system configuration information from the system configuration module, obtains a self-checking request from the self-checking and fault processing module and/or obtains an acquisition clock from the task level synchronization module;
and the output module outputs the acquisition state of each acquisition channel and/or outputs fault information.
Further, the communication processing module performs communication data transceiving and/or security protocol analysis when the software system is configured in a communication mode.
Further, the communication processing module includes:
the input module acquires a working mode and/or a safety protocol parameter from configuration data; acquiring communication data from the outside;
and the output module outputs the verified data, the data sent to the outside and/or the output fault information.
Further, the message selection module selects a message to be sent according to the acquisition result or the communication data; and/or according to the interactive comparison of the dual-channel CPU, confirming the finally sent message.
Further, the message selection module includes:
the input module acquires an acquisition result from the acquisition module, communication data from the communication processing module and/or configuration information from the system configuration module;
and the output module outputs the message for confirming output and/or the output fault information.
Further, the task-level synchronization module performs clock management, task synchronization management, and/or dual-channel data interaction.
Further, the task-level synchronization module includes:
the input module receives interactive data of each module;
an output module that outputs a system clock, a timestamp, a dual channel data comparison result, and/or fault information.
Further, the message output module processes the message to be output, and then sends the message.
Further, the message output module includes:
the input module receives a timestamp, system configuration and/or a message to be sent;
and the output module outputs the message.
Furthermore, the self-checking and fault processing module performs self-checking on each function of the processing board when the processing board is started or operated, and decomposes fault information reported by other modules for processing.
Further, the self-checking and fault handling module comprises:
the input module receives fault information and/or external detection related signals of each module;
an output module that outputs a fault handling result and/or a health signal.
The invention also provides an LEU processing board program comprising any one or more of any of the following procedures:
the flow of the configuration is collected and processed,
the flow of the collection is carried out,
the flow of the communication process is as follows,
the process of selecting the message is carried out,
the task-level synchronization process is performed,
the process of outputting the message is carried out,
self-checking and fault processing flow.
Further, the acquisition configuration process acquires processor identification information when starting, reads configuration data from the nonvolatile memory and completes verification; and/or providing an interface for acquiring system configuration data for other processes in the program running process.
Further, the collecting and configuring process includes:
an input flow that reads a processor ID from hardware; and/or reading the FPGA version number from the FPGA; and/or reading system configuration, acquisition configuration, message configuration and/or production information from the Flash;
and outputting the system configuration data and/or the configuration parameter fault information by the output process.
Further, the acquisition flow generates an acquisition command to be sent to an acquisition board when the program works in an acquisition mode; and/or reading and analyzing the acquisition result sent back by the acquisition board to obtain the acquisition state.
Further, the collecting process includes:
the method comprises the steps of inputting a flow, wherein the input flow reads an acquisition result, system configuration information from an acquisition configuration flow, a self-inspection request from a self-inspection and fault processing flow and/or an acquisition clock from a task-level synchronous flow;
and outputting the acquisition state of each acquisition channel and/or outputting fault information.
Further, the communication processing flow performs communication data transmission and reception and/or security protocol analysis when the program is configured in the communication mode.
Further, the communication processing flow comprises:
an input process, wherein the input process acquires a working mode and/or a safety protocol parameter from configuration data; and/or obtaining communication data from the outside;
the output process outputs the verified data and/or outputs the data sent to the outside; and outputting fault information.
Further, the message selection process selects a message to be sent according to the acquisition result or the communication data; and/or according to the interactive comparison of the dual-channel CPU, confirming the finally sent message.
Further, the packet selection process includes:
an input process, wherein the input process acquires an acquisition result from an acquisition process, acquires communication data from a communication processing process and/or acquires configuration information from an acquisition configuration process;
and outputting the output message and/or the fault information by the output process.
Further, the task-level synchronization process performs clock management, task synchronization management, and/or dual-channel data interaction.
Further, the task-level synchronization process includes:
the method comprises the steps of inputting a flow, wherein the input flow receives interactive data of each flow;
and outputting a process, wherein the output process outputs a system clock, a timestamp, a dual-channel data comparison result and/or fault information.
Further, the message output process processes the message to be output, and then sends the message.
Further, the message output process includes:
an input process, wherein the input process receives a timestamp, system configuration and/or a message to be sent;
and outputting a flow, wherein the output flow outputs a message.
Furthermore, the self-checking and fault processing flow carries out self-checking on each function of the processing board when the processing board is started or operated, and decomposes fault information reported by other flows for processing.
Further, the self-checking and fault handling process includes:
the input process receives fault information fed back by each process; externally detecting the relevant signal;
an output process that outputs a fault handling result and/or a health signal.
The invention also provides an LEU processing board software system which is characterized in that,
the software system comprising a program as described in any of the above;
the software system calls each flow in the program according to the processing requirements of the LEU processing board.
The invention carries out modularization and hierarchical design on the program flow executed in the LEU processing board. The software designed by the invention can adapt to external input under different application scenes according to different configurations.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
FIG. 1 shows a block schematic diagram of a prior art LEU processing board;
FIG. 2 illustrates a schematic block diagram of a basic principle of an LEU processing board software system according to an embodiment of the present invention;
FIG. 3 shows a software architecture and timing flow diagram according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In order to meet the requirements of the software requirement specification of the relevant processing board, the software, the process and the like running on the LEU processing board are designed hierarchically and modularly in the embodiment. The software, processes may be executed in respective components, e.g., processing modules, execution modules, on the LEU processing board.
As shown in fig. 2, the processing board software can be divided into the following flow modules:
m1: a collection configuration module;
m2: an acquisition module;
m3: a communication processing module;
m4: a message selection module;
m5: a task level synchronization module;
m6: a message output module;
m7: and the self-checking and fault processing module.
Wherein,
m1 system configuration module:
the system configuration module acquires processor identification information when starting, reads configuration data from the nonvolatile memory and completes verification; and in the software running process, providing an interface for acquiring system configuration data for other modules.
The system configuration module includes:
a module input to read processor Identification (ID) data from hardware; reading the FPGA version number from the FPGA; reading system configuration, acquisition configuration, message configuration and production information from Flash;
module output, which can output system configuration data to other modules, such as an acquisition module, a communication processing module, a task level synchronization module, and the like; configuration parameter failure information may be output to other modules, such as self-test and failure handling modules.
M2 acquisition module:
the acquisition module generates an acquisition command sent to an acquisition board when the software works in an acquisition mode; and reading and analyzing the acquisition result sent back by the acquisition board to obtain an acquisition state.
The acquisition module comprises:
module input, reading the acquisition result from the FPGA; reading system configuration information such as a working mode, a state table and the like from a system configuration module; obtaining a self-checking request from a self-checking and fault processing flow; acquiring an acquisition clock from a task-level synchronization module;
module output, which outputs the collection state of each collection channel to other modules, such as a message selection module or a task level synchronization module; and outputting the fault information to the self-checking and fault processing module.
M3 communication processing module:
and the communication processing module is used for receiving and transmitting communication data and analyzing a safety protocol when the software is configured in a communication mode.
The communication processing module includes:
module input, obtaining working mode and safety protocol parameter from configuration data; acquiring communication data from external systems or equipment such as a Train Control Center (TCC) and interlocking;
module output, which outputs the checked data to the message selection module or the task level synchronization module; outputting data transmitted to the outside; and outputting the fault information to the self-checking and fault processing module.
M4 message selection module:
the message selection module selects a message to be sent according to the acquisition result or the communication data; and confirming the finally sent message according to the interactive comparison of the dual-channel CPU.
The message selection module comprises:
module input, acquiring an acquisition result from the acquisition module; acquiring communication data from a communication processing module; acquiring configuration such as parameters and messages from an acquisition configuration process;
module output, confirming the received message, and outputting the message to the task level synchronous processing module; and outputting the fault information to the self-checking and fault processing module.
M5 task level synchronization module:
and the task level synchronization module completes clock management, task synchronization management and double-channel data interaction.
The task-level synchronization module comprises:
module input, which receives interactive data of each module, such as receiving acquisition results from an acquisition module, receiving message information from a message selection module, and receiving communication data and status from a communication processing module;
module output, system clock and time stamp are output; outputting a dual-channel data comparison result to a message output module; and outputting the fault information to the self-checking and fault processing module.
M6 message output module:
and the message output module processes the message to be output and then sends the message.
The message output module comprises:
the module input is used for receiving a timestamp from the task level synchronization module, receiving system configuration from the system configuration module and receiving a message to be sent from the message selection module;
and the module outputs and outputs the message.
M7 self-test and failure handling module:
the self-checking and fault processing module performs self-checking on each function of the processing board when the processing board is started or operated, decomposes fault information reported by other modules, and performs related processing, such as alarming, program execution stopping and the like.
The self-checking and fault handling module comprises:
module input, receiving fault information of each module, such as a system configuration module, an acquisition module, a communication processing module, a message selection module, a task level synchronization module, a message output module and the like; externally detecting a relevant signal, such as a detection instruction for a relevant module;
module output, output the fault processing result; a health signal.
The software in the embodiment of the invention is embedded into the LEU processing board and is embedded software. The software is designed in a layered and modularized design mode, an operating system is not used for running the software, and programs periodically process data.
Because an operating system is not adopted, the software scheduling is designed into a foreground and background mode, namely, each task is scheduled periodically in a main function by using an infinite loop. Each task has a respective trigger condition, and if the condition is met, the task is called; if not, suspending the non-execution.
Fig. 3 shows the software flow for the LEU processing board on which the software is running, and the LUE processing board invokes the relevant flow modules to execute the corresponding flows or steps according to the processing requirements. As shown, the software flow may include the following basic flows:
a program entry;
initializing hardware resources and software resources;
reading configuration parameters and starting self-checking;
and periodically and circularly scheduling the flow.
The periodic cycle scheduling process includes a basic communication timestamp processing process, a short task process, a data receiving or message sending process, a long task process and a background task. The short task is mainly used for acquiring tasks and synchronizing time; the long task mainly completes the work of double-channel comparison, message selection, self-checking, fault processing and the like.
In the periodic circular scheduling process, the flow modules M1-M7 can be called by means of interruption, active call, etc. to execute the corresponding processing. For example, as shown, the M2 collection module is called by a message output request interrupt to obtain the message status; and calling an M7 self-checking and fault processing module through FPGA fault interruption to acquire fault information. During the running process of the program, a watchdog is arranged to ensure the normal execution of the program, wherein the watchdog related function is mainly realized by using an M7 self-checking and fault processing module.
Each flow and each module only represent a logic relation of signal transmission, and do not necessarily represent a position relation; the flows and modules introduced in the embodiments of the specification in a sequential manner do not necessarily indicate that a front-back order exists between the related flows and modules.
The method of the invention can be realized by a computer or an embedded program controlled system. Accordingly, in accordance with an embodiment of the present invention, there is provided an LEU processing board system, an LEU processing board, a processor/execution unit, a memory; the memory stores one of the above software modules/processes, and the processor/execution unit calls the software module in the memory and executes the called software module.
Wherein the memory is communicatively coupled to the one or more processors and has stored therein instructions executable by the one or more processors to cause the one or more processors to perform the method of the present invention.
Also, the present invention provides a computer or embedded program product comprising computer or embedded chip executable instructions that may perform the method described in any of the above embodiments.
All of the modules, processes of the present invention may be processed by one or more processors in a system. The processor may be any programmable microprocessor, microcomputer or multiple processor chip or chips that can be configured by software instructions (applications) to perform a variety of functions, including the functions of the various embodiments described herein. The processor may include internal memory sufficient to store the application software instructions, which may be volatile or non-volatile memory (e.g., flash memory) or a mixture of both. For the purposes of this description, a general reference to memory refers to all memory accessible by the processor, including internal memory, removable memory plugged into the apparatus, and memory within the processor itself.
In the present invention, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in hardware, the functionality may be implemented within circuitry that may be suitable for use in processing circuitry in a system. The steps of a method or algorithm disclosed herein may be embodied in a processor-executable software module executed, which may reside on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.
Finally, it should be noted that: the above examples are only for illustrating the technical solutions of the present invention, and are not limited thereto. The specification, including the drawings, does not necessarily mean a direct electrical connection between the various devices, apparatuses, and the specification represents a logical relationship, and only the transmission of signals is exemplarily represented; the steps and flows appearing before and after in the present invention do not necessarily indicate a sequential order of the steps. The various modules in the present invention do not necessarily represent hardware modules, but may also be software modules, program modules, or firmware modules.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (31)
1. An LEU processing board system comprises an LEU processing board and a software system, wherein the LEU processing board is used as an operation platform of the software system; wherein the software system comprises one or more of the following modules:
a collection configuration module;
an acquisition module;
a communication processing module;
a message selection module;
a task level synchronization module;
a message output module;
and the self-checking and fault processing module.
2. The LEU processing plate system of claim 1,
the system configuration module acquires processor identification information when being started, reads configuration data and completes verification; and/or providing interfaces for other modules to acquire system configuration data during the operation of the software system.
3. The LEU processing plate system of claim 1 or 2,
the system configuration module includes:
the input module reads the processor ID, the FPGA version number, the system configuration, the acquisition configuration, the message configuration and/or the production information;
and the output module outputs system configuration data and/or configuration parameter fault information.
4. The LEU processing plate system of claim 1,
the acquisition module generates an acquisition command sent to an acquisition board when the software system works in an acquisition mode; and/or reading and analyzing the acquisition result sent back by the acquisition board to obtain the acquisition state.
5. The LEU processing plate system of claim 1 or 4,
the acquisition module comprises:
the input module reads an acquisition result, reads system configuration information from the system configuration module, obtains a self-checking request from the self-checking and fault processing module and/or obtains an acquisition clock from the task level synchronization module;
and the output module outputs the acquisition state of each acquisition channel and/or outputs fault information.
6. The LEU processing plate system of claim 1,
and the communication processing module is used for receiving and transmitting communication data and/or analyzing a safety protocol when the software system is configured in a communication mode.
7. The LEU processing plate system of claim 1 or 6,
the communication processing module includes:
the input module acquires a working mode and/or a safety protocol parameter from configuration data; acquiring communication data from the outside;
and the output module outputs the verified data, the data sent to the outside and/or the output fault information.
8. The LEU processing plate system of claim 1,
the message selection module selects a message to be sent according to the acquisition result or the communication data; and/or according to the interactive comparison of the dual-channel CPU, confirming the finally sent message.
9. The LEU processing plate system of claim 1 or 8,
the message selection module comprises:
the input module acquires an acquisition result from the acquisition module, communication data from the communication processing module and/or configuration information from the system configuration module;
and the output module outputs the message for confirming output and/or the output fault information.
10. The LEU processing plate system of claim 1,
the task level synchronization module completes clock management, task synchronization management and/or dual-channel data interaction.
11. The LEU processing plate system of claim 1 or 10,
the task-level synchronization module comprises:
the input module receives interactive data of each module;
an output module that outputs a system clock, a timestamp, a dual channel data comparison result, and/or fault information.
12. The LEU processing plate system of claim 1,
and the message output module processes the message to be output and then sends the message.
13. The LEU processing plate system of claim 1 or 12,
the message output module comprises:
the input module receives a timestamp, system configuration and/or a message to be sent;
and the output module outputs the message.
14. The LEU processing plate system of claim 1,
the self-checking and fault processing module performs self-checking on each function of the processing board when the processing board is started or operated, and decomposes fault information reported by other modules for processing.
15. The LEU processing plate system of claim 1 or 14,
the self-checking and fault handling module comprises:
the input module receives fault information and/or external detection related signals of each module;
an output module that outputs a fault handling result and/or a health signal.
16. An LEU processing board program, the program comprising any one or more of any of the following procedures:
the flow of the configuration is collected and processed,
the flow of the collection is carried out,
the flow of the communication process is as follows,
the process of selecting the message is carried out,
the task-level synchronization process is performed,
the process of outputting the message is carried out,
self-checking and fault processing flow.
17. The LEU processing board program of claim 16,
the acquisition configuration process acquires identification information of the processor when starting, reads configuration data from the nonvolatile memory and completes verification; and/or providing an interface for acquiring system configuration data for other processes in the program running process.
18. The LEU processing board program of claim 16 or 17,
the acquisition configuration process comprises the following steps:
an input flow that reads a processor ID from hardware; and/or reading the FPGA version number from the FPGA; and/or reading system configuration, acquisition configuration, message configuration and/or production information from the Flash;
and outputting the system configuration data and/or the configuration parameter fault information by the output process.
19. The LEU processing board program of claim 16,
the acquisition flow generates an acquisition command sent to an acquisition board when the program works in an acquisition mode; and/or reading and analyzing the acquisition result sent back by the acquisition board to obtain the acquisition state.
20. The LEU processing board program of claim 16 or 19,
the acquisition process comprises the following steps:
the method comprises the steps of inputting a flow, wherein the input flow reads an acquisition result, system configuration information from an acquisition configuration flow, a self-inspection request from a self-inspection and fault processing flow and/or an acquisition clock from a task-level synchronous flow;
and outputting the acquisition state of each acquisition channel and/or outputting fault information.
21. The LEU processing board program of claim 16,
and the communication processing flow carries out communication data transceiving and/or safety protocol analysis when the program is configured in a communication mode.
22. The LEU processing board program of claim 16 or 21,
the communication processing flow comprises the following steps:
an input process, wherein the input process acquires a working mode and/or a safety protocol parameter from configuration data; and/or obtaining communication data from the outside;
the output process outputs the verified data and/or outputs the data sent to the outside; and outputting fault information.
23. The LEU processing board program of claim 16,
the message selection process selects a message to be sent according to the acquisition result or the communication data; and/or according to the interactive comparison of the dual-channel CPU, confirming the finally sent message.
24. The LEU processing board program of claim 16 or 23,
the message selection process comprises the following steps:
an input process, wherein the input process acquires an acquisition result from an acquisition process, acquires communication data from a communication processing process and/or acquires configuration information from an acquisition configuration process;
and outputting the output message and/or the fault information by the output process.
25. The LEU processing board program of claim 16,
the task-level synchronization process completes clock management, task synchronization management and/or dual-channel data interaction.
26. The LEU processing board program of claim 16 or 25,
the task-level synchronization process comprises:
the method comprises the steps of inputting a flow, wherein the input flow receives interactive data of each flow;
and outputting a process, wherein the output process outputs a system clock, a timestamp, a dual-channel data comparison result and/or fault information.
27. The LEU processing board program of claim 16,
and the message output flow processes the message to be output and then sends the message.
28. The LEU processing board program of claim 16 or 27, wherein,
the message output process comprises the following steps:
an input process, wherein the input process receives a timestamp, system configuration and/or a message to be sent;
and outputting a flow, wherein the output flow outputs a message.
29. The LEU processing board program of claim 16,
the self-checking and fault processing flow carries out self-checking on each function of the processing board when starting or running, and decomposes fault information reported by other flows for processing.
30. The LEU processing board program of claim 16 or 29, wherein,
the self-checking and fault processing flow comprises the following steps:
the input process receives fault information fed back by each process; externally detecting the relevant signal;
an output process that outputs a fault handling result and/or a health signal.
31. An LEU processing board software system is characterized in that,
the software system comprising the program of any one of claims 16-30;
the software system, invoking respective procedures in the program of any one of claims 16-30 according to the processing requirements of the LEU processing board.
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