CN108023518B - Excitation regulator - Google Patents
Excitation regulator Download PDFInfo
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- CN108023518B CN108023518B CN201711139181.6A CN201711139181A CN108023518B CN 108023518 B CN108023518 B CN 108023518B CN 201711139181 A CN201711139181 A CN 201711139181A CN 108023518 B CN108023518 B CN 108023518B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P9/00—Arrangements for controlling electric generators for the purpose of obtaining a desired output
- H02P9/14—Arrangements for controlling electric generators for the purpose of obtaining a desired output by variation of field
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Abstract
An excitation regulator has a signal input source including a ramp gate. The racing gate includes a first input and a second input. The first input end is connected with a first frequency comparison unit, the first frequency comparison unit comprises a first frequency judgment gate and a first competition low gate, and the first competition low gate is used for inputting a small signal between the V/f signal and an output signal of the first frequency judgment gate to the first input end; the second input end is connected with the first frequency comparison unit, the second frequency comparison unit comprises a second frequency judgment gate and a second competition low gate, and the second competition low gate is used for inputting a smaller signal between the UEL signal and an output signal of the second frequency judgment gate to the second input end. The excitation regulator provided by the application avoids that a rival high gate frequently replaces and outputs a V/f signal and a UEL signal when the system voltage is near a low excitation limit threshold value, so that the system voltage is fluctuated.
Description
Technical Field
The application relates to the field of excitation regulation, in particular to an excitation regulator.
Background
In an electric power system, maintaining the output voltage of a generator at an allowable level is one of the basic conditions for ensuring safe, economical, and stable operation of the generator and other electric power equipment. An excitation regulator is an electrical device that regulates the output voltage of a generator, and the regulation process of the excitation regulator is usually described by a transfer function.
Referring to fig. 1, which is a schematic structural diagram of a transfer function model of an excitation regulator in the prior art, as shown in fig. 1, a signal input source of the transfer function model includes a first inertia unit 1, a ramp gate 2 and an Upss signal, where after a V/f signal and a UEL signal pass through the ramp gate 2, a larger V/f signal or UEL signal is superimposed on the first inertia unit 1 and the Upss signal. The superposed signals are respectively input into a proportional link, a differential link and an integral link in the PID control unit 3 for simultaneous adjustment. Wherein, the proportion link is used for adjusting deviation; the integration link is used for eliminating steady-state errors, and then the steady-state errors can be further micro-regulated by a first-order differential unit 4; the differential element is used to adjust the rate of change of the deviation, which can then be further fine-tuned by the second inertial unit 5. After signals output by the proportional element, the first-order differential unit 4 and the second inertia unit 5 are superposed, the signals are delayed through the third inertia unit 6 to prevent sudden change; and then the excitation voltage signal Uf is obtained after amplitude limiting by the amplitude limiting unit 7.
In the above transfer function, the V/f signal is used for voltage frequency limitation, and the value of V/f is a fixed value, for example, when the system frequency f changes, the V/f signal correspondingly adjusts the output voltage of the generator; the UEL signal is used to perform excitation system low excitation limiting, e.g., when the system voltage drops to a low excitation limit threshold, the UEL signal controls the generator to increase the output voltage. After the V/f signal and the UEL signal are both input into the racing gate 2, when the system voltage is greater than the low excitation limit threshold, the racing gate 2 outputs the V/f signal, and when the system voltage is less than the low excitation limit threshold, the racing gate 2 outputs the UEL signal.
If the power system fails, causing the system frequency f to drop rapidly and for a short time, the racing gates 2 will output a V/f signal to lower the generator output voltage since the system voltage is still greater than the low excitation limit threshold. When the system voltage drops below the low excitation limit threshold, the racing gate 2 outputs a UEL signal to increase the output voltage of the generator so as to increase the system voltage. However, the system voltage increase causes the output of the ramp-up gate to be converted into a V/f signal, which reduces the generator output voltage if the system frequency f is not recovered. Therefore, the V/f signal and the UEL signal are frequently and alternately output, so that the system voltage is severely fluctuated near the low excitation limit threshold, and the safe operation of the power equipment in the power system is seriously influenced.
Disclosure of Invention
The application provides an excitation regulator to solve the problem of system voltage fluctuation.
The application provides an excitation regulator, and a signal input source of the excitation regulator comprises a raising gate, wherein the raising gate comprises a first input end and a second input end, and the raising gate comprises:
the first input end is connected with a first frequency comparison unit, the first frequency comparison unit comprises a first frequency judgment gate and a first competition low gate, the first frequency judgment gate is used for judging whether the system frequency is greater than a threshold frequency, if so, a V/f signal is output, if not, 0 is output, the output end of the first frequency judgment gate is connected with one input end of the first competition low gate, the other input end of the first competition low gate is used for inputting the V/f signal, and the first competition low gate is used for inputting a smaller signal between the V/f signal and the output signal of the first frequency judgment gate to the first input end;
the second input end is connected with the second frequency comparison unit, the second frequency comparison unit comprises a second frequency judgment gate and a second competition low gate, the second frequency judgment gate is used for judging whether the system frequency is greater than the threshold frequency, if so, 0 is output, if not, a UEL signal is output, the output end of the second frequency judgment gate is connected with one input end of the second competition low gate, the other input end of the second competition low gate is used for inputting the UEL signal, and the second competition low gate is used for inputting a smaller signal between the UEL signal and the output signal of the second frequency judgment gate to the second input end.
Preferably, the threshold frequency is the minimum value in the excitation regulator operating frequency range.
Preferably, the signal input source of the excitation regulator further comprises a first inertial cell and an Upss input signal.
Preferably, the field regulator further includes a PID control unit, a third inertia unit, and a limiting unit, wherein:
the PID control unit, the third inertia unit and the amplitude limiting unit are sequentially connected in series;
and the input end of the PID control unit is connected with the signal input source.
Preferably, the PID control unit includes a proportional element, an integral element and a differential element connected in parallel.
Preferably, the excitation regulator further includes a first order differential unit and a second inertial unit, an input end of the first order differential unit is connected to an output end of the integrating element, and an input end of the second inertial unit is connected to an output end of the differential element.
Preferably, the input signal of the first inertial unit is a generator output voltage.
The excitation regulator provided by the application has the beneficial effects that:
the excitation regulator provided by the application has the advantages that the signal input source comprises a raising gate. The racing gate comprises a first input end and a second input end, the first input end is connected with the first frequency comparison unit, and the second input end is connected with the second frequency comparison unit. The first frequency comparison unit comprises a first frequency judgment gate and a first competition low gate, and is used for outputting a V/f signal through the first competition low gate when the system frequency is greater than the threshold frequency, otherwise, outputting 0; the second frequency comparison unit comprises a second frequency judgment gate and a second competition low gate, and is used for outputting 0 through the second competition low gate when the system frequency is greater than the threshold frequency, otherwise, outputting a UEL signal; the high-race gate is used for outputting the larger signal of the first low-race gate output signal and the second low-race gate output signal. Through the first frequency comparison unit and the second frequency comparison unit, the signals are selectively output to the rival high gate according to the system frequency, and the situation that when the system voltage is close to the low excitation limit threshold value, the rival high gate outputs the V/f signal and the UEL signal instead frequently, so that the system voltage fluctuation is avoided. Because before the trouble is solved, be difficult to obtain great promotion after the system frequency descends, the big or small relation between system frequency and the threshold value frequency can not frequently change, consequently the output of competing high door in this application can not frequently change, has avoided the fluctuation of system voltage, has improved electric power system security.
Drawings
In order to more clearly explain the technical solution of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious to those skilled in the art that other drawings can be obtained according to the drawings without any creative effort.
FIG. 1 is a schematic diagram of a prior art excitation regulator;
fig. 2 is a schematic structural diagram of an excitation regulator according to an embodiment of the present application.
Detailed Description
The present application provides an excitation regulator, and referring to fig. 2, a schematic structural diagram of an excitation regulator provided in an embodiment of the present application is shown in fig. 2, where a signal input source of the excitation regulator includes a racing gate 2, a first inertial cell 1, and an Upss input signal.
Specifically, the racing gate 2 includes a first input terminal, a second input terminal, and an output terminal, and the first input terminal is connected to the first frequency comparing unit. The first frequency comparing unit comprises a first frequency judging gate 8 and a first competition low gate 9, wherein the first frequency judging gate 8 is used for judging whether the system frequency is greater than the threshold frequency, if so, a V/f signal is output, and if not, 0 is output. The first racing-low gate 9 includes two inputs and one output. The output end of the first frequency judging gate 8 is connected with one input end of the first competition low gate 9, and the other input end of the first competition low gate 9 is used for inputting a V/f signal. The first flip flop gate 9 is used to compare the output signal of the output of the first frequency decision gate 8 with the V/f signal and output the smaller of these two signals to the first input of the flip flop gate 2. For example, if the output signal of the output terminal of the first frequency judgment gate 8 is a V/f signal, the first racing low gate 9 outputs the V/f signal; if the output signal of the output terminal of the first frequency judgment gate 8 is 0, the first racing low gate 9 outputs 0.
The system frequency is the working frequency of the power system and is 50 Hz. The threshold frequency is a preset frequency that can be set to the minimum value in the operating frequency range of the excitation regulator. For example, in a large grid power system, the threshold frequency is set to 47.5 Hz; in isolated grid power systems, the threshold frequency is set at 42 Hz. According to the regulation of the operation and maintenance regulations of the generator, when the voltage frequency of the power system of the large power grid is lower than 47.5Hz and the voltage frequency of the power system of the isolated power grid is lower than 42Hz, the excitation regulator exits from operation, so that the excitation regulator exits from operation when the voltage frequency of the system is greatly reduced due to the fault of the power system or the generator, the excitation regulator can regulate the power grid, the fault is prevented from further worsening, and the capability of recovering the operation of the power grid is ensured.
The second frequency comparing unit comprises a second frequency judging gate 10 and a second competition low gate 11, wherein the second frequency judging gate 10 is used for judging whether the system frequency is greater than the threshold frequency, if so, 0 is output, and if not, a UEL signal is output. The second racing-low gate 11 includes two inputs and one output. The output of the second frequency decision gate 10 is connected to one of the inputs of the second race low gate 11, and the other input of the second race low gate 11 is used for inputting the UEL signal. Second race low gate 11 is arranged to compare the output signal of second frequency decision gate 10 with the UEL signal and to output the smaller of these two signals to the second input of race high gate 2. If the output signal of the output end of the second frequency judgment gate 10 is a UEL signal, the first competition low gate 9 outputs the UEL signal; if the output signal of the output terminal of the second frequency decision gate 10 is 0, the second racing low gate 11 outputs 0.
The racing-high gate 2 is used for comparing signals input by the first input terminal and the second input terminal and outputting the larger signal of the two signals to the output terminal of the racing-high gate 2.
The input signal of the first inertial unit 1 is a generator terminal voltage Ut, that is, an output voltage of the generator, the output voltage of the generator is fed back to the signal input terminal of the excitation regulator through the first inertial unit 1, that is, the generator terminal voltage Ut serves as a signal input source of the excitation regulator, and an excitation voltage error output by the excitation regulator is further reduced. It is noted that the output signal of the first inertial unit 1 is a negative feedback signal.
The Upss signal is a voltage signal output by a power system stabilizer, an input signal of the power system stabilizer is an active power swing signal with a low frequency of 0.3-2.5Hz, the power system stabilizer is used for amplifying and phase-adjusting the swing signal and then superposing the amplified swing signal on an output signal of the first inertial unit 1, and positive damping can be applied to the generator and is used for offsetting negative damping generated by voltage deviation adjustment in the excitation regulator, so that low-frequency oscillation of the power system is prevented, and the dynamic stability of the power system is improved.
And after the output signal of the competition altitude gate 2, the output signal of the first inertia unit 1 and the Upss signal are superposed, the superposed signals are transmitted to a PID (proportion integration differentiation) regulating unit 3 for regulation.
The PID adjusting unit 3 comprises a proportional link, an integral link and a differential link which are connected in parallel. The signal input to the PID adjusting unit 3 is adjusted by the three links described above, respectively. Wherein, the proportion link is used for carrying out proportion adjustment and reducing errors. When the proportion is larger, the adjustment can be accelerated, and the error can be reduced, but the stability of the system is reduced due to the larger proportion.
The integration element is used for eliminating steady-state errors. In the integration link, a proper integration time constant Ti can be selected according to the error, and the smaller Ti is, the stronger the integration effect is. However, the integral adjustment also degrades the system stability and slows down the dynamic response.
The differential link is used for adjusting the variation rate of the deviation, plays a role in controlling the advance, eliminates the deviation which can occur before the deviation is formed, and can improve the dynamic performance of the system. And the overshoot can be reduced and the adjusting time can be reduced by selecting the proper differential time. However, the differential has an amplification effect on noise interference, and therefore, too strong differential adjustment will reduce the anti-interference performance of the system.
In this embodiment, in order to prevent overshoot caused by too strong integration, even system oscillation, the first-order differentiation unit 4 is connected to the output end of the integration element, and is used to adjust the deviation change rate of the output signal of the integration element, and improve the dynamic performance of the system.
In order to prevent overshoot caused by too strong differential action and even system oscillation, the output end of the differential link is connected with a second inertia unit 5 for delaying time and avoiding signal mutation.
The output signal of the proportional element, the output signal of the first-order differential unit 4 and the output signal of the second inertial unit 5 are superposed and then sequentially processed by a third inertial unit 6 and a limiting unit 7 which are connected in series. Wherein the third inertia unit 6 is used for delaying the signal to prevent sudden change; the amplitude limiting unit 7 is used for limiting the signal, so that the excitation regulator finally outputs an excitation voltage signal Uf with a proper amplitude.
In an electric power system, system frequency is detected by a voltage transformer installed on a power transmission line, the voltage transformer can detect voltage and frequency on the power transmission line, an excitation regulator obtains the system frequency detected by the voltage transformer, and excitation voltage of a generator is regulated according to the excitation regulator.
When the power system normally operates, the system frequency f is the power frequency; when the generator set fails due to line short-circuit faults, turn-to-turn short-circuit faults of the transformer and the like, if part of the generator is cut off, active output of the generator set is reduced, and the system frequency f is rapidly reduced from the power frequency. Before the system frequency f is reduced to the threshold frequency w, f is larger than w, the first comparison logic gate outputs a V/f signal, the first input end and the second input end of the first competition low gate 9 both input the V/f signal, and the first competition low gate 9 outputs the V/f signal. The second comparison logic gate outputs 0, the first input end of the second competition low gate 11 inputs 0, the second input end UEL signal, the second competition low gate 11 outputs 0, two input ends of the competition high gate 2 respectively input V/f signal and 0, the competition high gate 2 outputs and inputs V/f signal, and according to the fact that the value of V/f is a fixed value, f is smaller than power frequency, the excitation voltage output by the excitation regulator is reduced, the output voltage of the generator is reduced, and the system voltage is reduced. It can be seen that with the excitation regulator provided in the embodiment of the present application, the voltage frequency limitation regulates the generator output voltage before the system frequency f drops to the threshold frequency w, and the UEL exits from operation.
After the system frequency f is reduced to the threshold frequency w, f is smaller than w, the first comparison logic gate outputs 0, the first input end of the first competition low gate 9 inputs 0, the second input end of the first competition low gate 9 outputs a V/f signal, and the first competition low gate 9 outputs 0. The second comparison logic gate outputs a UEL signal, the first input end of the second competition low gate 11 inputs the UEL signal, the second input end UEL signal, the second competition low gate 11 outputs the UEL signal, two input ends of the competition high gate 2 respectively input the UEL signal and 0, the competition high gate 2 outputs the UEL signal, the excitation voltage is increased, the output voltage of the generator is increased, the system voltage is further increased, the normal operation of the power system is ensured, and the buffer time is provided for fault repair and system frequency increase. The direct cutting of the generator set due to the fact that the system voltage is too low is avoided, the voltage and the frequency of the system are further reduced, and system faults are aggravated. If the generator fails to operate normally, time can be won for increasing active power output of other generators or removing stable frequency of related loads (namely, power users). If the generator failure is not severe, time may be strived for eliminating the generator failure.
As can be seen from the foregoing embodiments, the excitation regulator provided in the embodiments of the present application regulates the excitation voltage of the generator according to the system frequency and the threshold frequency. Because before the failure is solved, the system frequency is difficult to be greatly improved after being reduced, therefore, the output of the competition gate is controlled according to the magnitude relation between the system frequency and the threshold frequency, the output of the competition gate cannot be frequently replaced, the conflict between V/f and UEL is avoided, the fluctuation of the system voltage between the increase and the decrease is avoided, and the safety of the power system is improved.
The above-described embodiments of the present invention should not be construed as limiting the scope of the present invention.
Claims (7)
1. An excitation regulator, wherein a signal input source of the excitation regulator comprises a flop-gate (2), wherein the flop-gate (2) comprises a first input terminal and a second input terminal, and wherein:
the first input end is connected with a first frequency comparison unit, the first frequency comparison unit comprises a first frequency judgment gate (8) and a first competition low gate (9), the first frequency judgment gate (8) is used for judging whether the system frequency is greater than the threshold frequency, if so, a V/f signal is output, if not, a 0 is output, the output end of the first frequency judgment gate (8) is connected with one input end of the first competition low gate (9), the other input end of the first competition low gate (9) is used for inputting the V/f signal, and the first competition low gate (9) is used for inputting a smaller signal between the V/f signal and the output signal of the first frequency judgment gate (8) to the first input end;
the second input end is connected with a second frequency comparison unit, the second frequency comparison unit comprises a second frequency judgment gate (10) and a second competition low gate (11), the second frequency judgment gate (10) is used for judging whether the system frequency is larger than the threshold frequency, if so, 0 is output, and if not, a UEL signal is output, the output end of the second frequency judgment gate (10) is connected with one input end of the second competition low gate (11), the other input end U of the second competition low gate (11) is used for inputting the UEL signal, and the second competition low gate (11) is used for inputting a smaller signal between the UEL signal and the output signal of the second frequency judgment gate (10) to the second input end.
2. The field regulator of claim 1, wherein said threshold frequency is the minimum of the field regulator operating frequency range.
3. The excitation regulator of claim 1, wherein the signal input source of the excitation regulator further comprises a first inertial cell (1) and an Upss input signal.
4. The field regulator according to claim 1, further comprising a PID control unit (3), a third inertial unit (6) and a limiting unit (7), wherein:
the PID control unit (3), the third inertia unit (6) and the amplitude limiting unit (7) are sequentially connected in series;
and the input end of the PID control unit (3) is connected with the signal input source.
5. The excitation regulator according to claim 4, wherein the PID control unit (3) comprises a proportional element, an integral element and a derivative element connected in parallel.
6. An excitation regulator according to claim 5, further comprising a first order differential unit (4) and a second inertial unit (5), an input of the first order differential unit (4) being connected to an output of the integrating element and an input of the second inertial unit (5) being connected to an output of the differential element.
7. The excitation regulator of claim 3, wherein the input signal of the first inertial unit (1) is a generator output voltage.
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| CN109739082A (en) * | 2019-01-25 | 2019-05-10 | 广东电网有限责任公司 | A kind of lag observation method and device |
| CN112217432B (en) * | 2020-09-15 | 2022-06-17 | 国网冀北电力有限公司电力科学研究院 | Low excitation control parameter adjusting method and system |
| CN112953325B (en) * | 2021-03-22 | 2021-12-03 | 华中科技大学 | Brushless double-fed power generation system and control method thereof |
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