CN108022831A - Groove preparation method and semiconductor device preparation method - Google Patents
Groove preparation method and semiconductor device preparation method Download PDFInfo
- Publication number
- CN108022831A CN108022831A CN201610959001.8A CN201610959001A CN108022831A CN 108022831 A CN108022831 A CN 108022831A CN 201610959001 A CN201610959001 A CN 201610959001A CN 108022831 A CN108022831 A CN 108022831A
- Authority
- CN
- China
- Prior art keywords
- semiconductor devices
- laser
- side wall
- groove structure
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- High Energy & Nuclear Physics (AREA)
- Optics & Photonics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The present invention relates to a kind of groove preparation method, including provide semiconductor devices；Etching forms groove structure on the semiconductor devices；And the control semiconductor devices rotates and carries out melt process to the side wall of the groove structure using laser.Above-mentioned groove preparation method, it also add laser melting step after the step of traditional etching forms groove structure, the rotation of laser melting process combination semiconductor devices greatly improves the electrical leakage problems of semiconductor device so as to which the groove that base angle is mellow and full and side wall is smooth finally be prepared.The present invention also provides a kind of semiconductor device preparation method.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of groove preparation method and semiconductor device preparation side
Method.
Background technology
In the processing procedure of extra high tension power metal-oxide-semiconductor (Power metal-oxide-semiconductors), spy of groove structure (Trench) pattern to grid oxygen
Property has a major impact.Trench side walls are rough or Trench bottom roundings are small to cause device creepage to become larger, so that
Reduce the reliability of power MOS pipe device.The bottom roundings for the groove that traditional groove preparation method is prepared are small to cause point
Discharge at angle serious, while side wall smoothness not enough also generates electric leakage deterioration effect.
The content of the invention
Based on this, it is necessary to a kind of preparation method that the groove that base angle is mellow and full and side wall is smooth can be prepared is provided,
A kind of semiconductor device preparation method is also provided.
A kind of groove preparation method, including semiconductor devices is provided；Etching forms groove knot on the semiconductor devices
Structure；And the control semiconductor devices rotates and carries out melt process to the side wall of the groove structure using laser.
Above-mentioned groove preparation method, laser melting is also add after the step of traditional etching forms groove structure
Step, so as to finally be prepared, base angle is mellow and full and side wall is smooth for the rotation of laser melting process combination semiconductor devices
Groove, greatly improves the electrical leakage problems of semiconductor device.
In one of the embodiments, the control semiconductor devices rotates and utilizes laser to the groove structure
Side wall carry out melt process the step of in, the rotating rotating speed of semiconductor devices be less than 1000 rpms.
In one of the embodiments, the control semiconductor devices rotates and utilizes laser to the groove structure
Side wall the step of carrying out melt process in, the side wall of the groove structure is carried out using laser melt process when a length of 5
~10 seconds.
In one of the embodiments, the control semiconductor devices rotates and utilizes laser to the groove structure
Side wall the step of carrying out melt process in, the wavelength of the laser is 200 nanometers~460 nanometers；The pulse energy of the laser
Metric density is every square centimeter in 400,000,000 burnt every square centimeter~600,000,000 Jiao.
In one of the embodiments, the control semiconductor devices rotates and utilizes laser to the groove structure
Side wall the step of carrying out melt process in, the incident angle of the laser is 0 degree~45 degree；The incident angle swashs to be described
Light and the angle on vertical direction.
In one of the embodiments, the control semiconductor devices rotates and utilizes laser to the groove structure
Side wall carry out melt process the step of after, further include to the semiconductor devices carry out crystalline phase reparation the step of.
In one of the embodiments, the step of progress crystalline phase reparation to the semiconductor devices is, to described half
Conductor device is made annealing treatment.
In one of the embodiments, the step of being cleaned to the semiconductor devices is further included.
In one of the embodiments, the control semiconductor devices rotates and utilizes laser to the groove structure
Side wall carry out melt process the step of after, further include step：The semiconductor devices is placed in boiler tube and carries out dry oxygen oxygen
Change to form sacrificial oxide layer in the semiconductor device surface；And the sacrificial oxide layer is removed.
A kind of semiconductor device preparation method, including the groove preparation method described in foregoing any embodiment.
Brief description of the drawings
Fig. 1 is the flow chart of the groove preparation method in an embodiment；
Fig. 2 is the groove schematic diagram that the groove preparation method in embodiment illustrated in fig. 1 is prepared；
Fig. 3 is the groove schematic diagram that traditional lithographic method is prepared；
Fig. 4 is the flow chart of the groove preparation method in another embodiment；
Fig. 5 is the local flow chart of the groove preparation method in another embodiment；
Fig. 6 is the local flow chart of the groove preparation method in another embodiment.
Embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, with reference to the accompanying drawings and embodiments, it is right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
Fig. 1 is the flow chart of the groove preparation method in an embodiment, which comprises the following steps：
S110, there is provided semiconductor devices.
Offer needs to prepare the semiconductor devices of groove.
S120, etches form groove structure on the semiconductor device.
The etching process of groove structure etches to obtain using traditional lithographic method in this step.Specifically, to semiconductor
Device carries out photoetching, and groove (Trench) structure is prepared using the method for electric paste etching after photoetching.
S130, control semiconductor devices rotate and carry out melt process to the side wall of groove structure using laser.
Laser uses range of wavelengths to be controlled in [400mj/ in the laser of [200nm, 460nm], its pulse energy density
cm2, 600mj/cm2].The incident angle of laser can be adjusted according to the depth-to-width ratio for the groove for being actually needed processing.Laser
Incident angle refers to laser and the angle on vertical direction.The incident angle of laser is between [0 degree, 45 degree] according to actual conditions
It is adjusted.Laser carries out melt process to side wall, so that the side wall silicon of groove structure has micro- local mobility.In this reality
Apply in example, laser to side wall carry out melt process when a length of 5~10 seconds.Specific duration can also be adjusted according to actual needs
It is whole.Semiconductor devices rotation can start before laser carries out melt process to groove structure side wall, can also be melted with laser
Melt the synchronous progress of processing, or be slightly later than laser melting start time.The rotating rotating speed of semiconductor devices is the slow-speed of revolution, usually
It is set smaller than 1000r/min.When adjusting the incident angle of laser, handled with reference to different rotating speeds, so as to suitable
For some special graphs (as etching be easier to occur topography issues ISO trench figures) wafer (wafer) in, with into
Row side wall is smooth and base angle mellow and fullization is handled, and the groove structure for finally obtain disclosure satisfy that demand, and then enters and reduce
Due to not caused enough the electrical leakage problems of trench bottom corners roundness degree and side wall smoothness.
Above-mentioned groove preparation method, laser melting is also add after the step of traditional etching forms groove structure
Step, the rotation of laser melting process combination semiconductor devices is so as to finally obtain the ditch that base angle is mellow and full and side wall is smooth
Groove, can be to avoid the semiconductor devices being finally prepared since channel bottom fillet is small and side wall smoothness not enough causes point
Angle discharge and caused by electrical leakage problems occur, improve the reliability of semiconductor devices.
Fig. 2 is the groove structure schematic diagram being prepared by the above method, and Fig. 3 is obtained by conventional groove preparation method
Groove structure schematic diagram.It can substantially be illustrated by the contrast of Fig. 2 and Fig. 3, prepared by the groove preparation method in the present embodiment
Obtained groove has the fillet of bigger and more smooth side wall.Also, technological limits is not present in above-mentioned preparation method, therefore
The special graph (the smaller or more intensive figure of such as line width) that some etchings are easy to cause poor pattern can still use this side
Formula processing.Meanwhile the process stabilizing of above-mentioned preparation method, have wide range of applications.
Fig. 4 is the flow chart of the groove preparation method in another embodiment, which comprises the following steps：
S210, there is provided semiconductor devices.
S220, etches form groove structure on the semiconductor device.
S230, control semiconductor devices rotate and carry out melt process to the side wall of groove structure using laser.
S240, cleans semiconductor devices.
Some chips and other surface masses can be formed during laser melting in device surface.To ensure ditch
The smoothness of groove sidewall and the roundness degree at base angle, and avoid detrital material from being had an impact to crystalline phase repair process, it is necessary to clean
Remove the part surface material.Specifically, by dilute HF acid cleaning semiconductor device surface with remove groove structure and other
Partial surface mass.Laser-formed surface mass is removed by cleaning, can further optimize the ditch being finally prepared
The pattern of groove.
S250, crystalline phase reparation is carried out to semiconductor devices.
In the present embodiment, the crystalline phase reparation to semiconductor devices is realized by the way of annealing.Specifically, in high vacuum
Under semiconductor devices is heat-treated.The temperature of heat treatment process is 300 degrees Celsius.It can be also passed through in heat treatment process pre-
If inert gas (such as N of amount2) and micro reducibility gas (such as H2), aoxidized to avoid flute surfaces.Annealing process is usual
At 20~30 minutes.Annealing can repair the crystalline phase defect of surface silicon, improve the overall performance of product.Implement in others
In example, crystalline phase reparation can also be carried out using such as laser treatment mode.In other embodiments, after completion S230 is performed
S240 can not be performed and directly perform S250, i.e., crystalline phase reparation directly be carried out to the semiconductor devices after melt process.
Above-mentioned groove preparation method, can also carry out surface mass cleaning and crystalline phase after laser melting namely S230
Repair, so that it is guaranteed that there is the semiconductor devices finally obtained preferable electric property to go forward side by side the groove that one-step optimization is prepared
Pattern.
In one embodiment, can be with after the step of groove preparation method described in foregoing any embodiment
Including step S310 and S320, as shown in Figure 5.
S310, semiconductor devices is placed in boiler tube and carries out dry-oxygen oxidation to form sacrifice oxidation in semiconductor device surface
Layer.
The semiconductor devices obtained in previous embodiment is placed in boiler tube and carries out dry-oxygen oxidation, so as to be formed on surface
Sacrificial oxide layer.The thickness of the sacrificial oxide layer of formation is 110 angstroms.
S320, sacrificial oxide layer is removed.
(namely S310 and S320) is removed it again by preparing sacrificial oxide layer, can carry out two suboptimums to groove pattern
Change so that the base angle roundness degree bigger and side wall of groove are more smooth.
In one embodiment, a cleaning step can be carried out after one step of every execution or several steps, with
The impurity for avoiding producing in preparation process changes or destroys the performance of semiconductor devices.Therefore, in the present embodiment, in S130
Afterwards, before S310, or after S250, before S310, step S410 can also be included, as shown in Figure 6.
S410, cleans semiconductor devices.
The characteristic of the impurity cleaned as needed selects corresponding pickling agent.In the present embodiment, made to remove
The surfaces such as the organic impurities produced during standby are dirty, utilize H2SO4+H2O2Acid treatment is carried out to semiconductor device surface to go
Except surface is dirty, avoid the problem that the dirty residual in surface causes properties of product to reduce and occurs.Double optimization step is being carried out to groove
Acid treatment is carried out to semiconductor devices before rapid, it is possible to reduce the influence that soil confrontation subsequent step produces, improves product
Can be gone forward side by side the pattern of one-step optimization groove.
The step of being cleaned to semiconductor devices can be interspersed in whole preparation flow as needed, and be not limited to
The step of defined in above example.Meanwhile to improve cleaning performance, execution cleaning step can also be continuously repeated.
Above-mentioned groove preparation method can be included in semiconductor device preparation process, so that what is finally obtained partly leads
The electric leakage performance of body device is greatly improved.It is prepared by the power MOS pipe that above-mentioned groove preparation method is particularly suitable for super-pressure
In method.
Each technical characteristic of embodiment described above can be combined arbitrarily, to make description succinct, not to above-mentioned reality
Apply all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, the scope that this specification is recorded all is considered to be.
Embodiment described above only expresses the several embodiments of the present invention, its description is more specific and detailed, but simultaneously
Cannot therefore it be construed as limiting the scope of the patent.It should be pointed out that come for those of ordinary skill in the art
Say, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to the protection of the present invention
Scope.Therefore, the protection domain of patent of the present invention should be determined by the appended claims.
Claims (10)
1. a kind of groove preparation method, including
Semiconductor devices is provided；
Etching forms groove structure on the semiconductor devices；And
Control the semiconductor devices to rotate and melt process is carried out to the side wall of the groove structure using laser.
2. according to the method described in claim 1, it is characterized in that, the control semiconductor devices rotates and utilizes laser
In the step of carrying out melt process to the side wall of the groove structure, the rotating rotating speed of semiconductor devices be less than 1000 turns it is every
Minute.
3. according to the method described in claim 1, it is characterized in that, the control semiconductor devices rotates and utilizes laser
In the step of carrying out melt process to the side wall of the groove structure, the side wall of the groove structure is melted using laser
Processing when a length of 5~10 seconds.
4. according to the method described in claim 1, it is characterized in that, the control semiconductor devices rotates and utilizes laser
In the step of carrying out melt process to the side wall of the groove structure, the wavelength of the laser is 200 nanometers~460 nanometers；Institute
The pulse energy density for stating laser is every square centimeter in 400,000,000 burnt every square centimeter~600,000,000 Jiao.
5. according to the method described in claim 1, it is characterized in that, the control semiconductor devices rotates and utilizes laser
In the step of carrying out melt process to the side wall of the groove structure, the incident angle of the laser is 0 degree~45 degree；It is described enter
Firing angle degree is the laser and the angle on vertical direction.
6. according to the method described in claim 1, it is characterized in that, the control semiconductor devices rotates and utilizes laser
After the step of carrying out melt process to the side wall of the groove structure, further include and crystalline phase reparation is carried out to the semiconductor devices
The step of.
7. the according to the method described in claim 6, it is characterized in that, step that crystalline phase reparation is carried out to the semiconductor devices
Suddenly it is that the semiconductor devices is made annealing treatment.
8. according to the method described in claim 1, it is characterized in that, further include the step cleaned to the semiconductor devices
Suddenly.
9. according to the method described in claim 1, it is characterized in that, the control semiconductor devices rotates and utilizes laser
After the step of carrying out melt process to the side wall of the groove structure, step is further included：
The semiconductor devices is placed in boiler tube and carries out dry-oxygen oxidation to form sacrifice oxidation in the semiconductor device surface
Layer；And
The sacrificial oxide layer is removed.
10. a kind of semiconductor device preparation method, including the groove preparation method as described in claim 1~9 is any.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610959001.8A CN108022831B (en) | 2016-11-03 | 2016-11-03 | Groove preparation method and semiconductor device preparation method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610959001.8A CN108022831B (en) | 2016-11-03 | 2016-11-03 | Groove preparation method and semiconductor device preparation method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108022831A true CN108022831A (en) | 2018-05-11 |
| CN108022831B CN108022831B (en) | 2021-06-04 |
Family
ID=62083912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610959001.8A Active CN108022831B (en) | 2016-11-03 | 2016-11-03 | Groove preparation method and semiconductor device preparation method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108022831B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110504156A (en) * | 2018-05-17 | 2019-11-26 | 美光科技公司 | Method for reducing silicon consumption, the method for forming semiconductor structure, and the method for forming isolation structure |
| CN115458400A (en) * | 2022-09-28 | 2022-12-09 | 上海积塔半导体有限公司 | Method for manufacturing trench in semiconductor substrate and semiconductor device |
Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20050115404A (en) * | 2004-06-03 | 2005-12-07 | 매그나칩 반도체 유한회사 | Method of manufacturing an isolation in semiconductor device |
| CN101728308A (en) * | 2008-10-24 | 2010-06-09 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing shallow trench isolation structure |
| CN101740461A (en) * | 2008-11-24 | 2010-06-16 | 中芯国际集成电路制造(北京)有限公司 | Method for manufacturing semiconductor device |
| CN101924018A (en) * | 2009-06-11 | 2010-12-22 | 上海华虹Nec电子有限公司 | Method for improving corner at top of groove into rounded corner |
| CN102239571A (en) * | 2008-12-04 | 2011-11-09 | 三菱电机株式会社 | Method for manufacturing thin-film photoelectric conversion device |
| CN102361007A (en) * | 2011-11-02 | 2012-02-22 | 上海宏力半导体制造有限公司 | Method for etching groove and semiconductor device |
| CN102456607A (en) * | 2010-10-19 | 2012-05-16 | 上海宏力半导体制造有限公司 | Manufacturing method for shallow trench isolation structure |
| CN103846554A (en) * | 2012-11-29 | 2014-06-11 | 三星钻石工业股份有限公司 | Laser processing method and laser processing apparatus |
| CN104039988A (en) * | 2011-12-29 | 2014-09-10 | Posco公司 | Electric mattress and method for manufacturing same |
| US20140315340A1 (en) * | 2009-09-17 | 2014-10-23 | Soraa Laser Diode, Inc. | Laser diodes with scribe structures |
| CN104947181A (en) * | 2015-07-07 | 2015-09-30 | 山东大学 | Method for reducing dislocation density in SiC single crystals grown through physical vapor transport method |
| CN105047542A (en) * | 2015-09-06 | 2015-11-11 | 国网智能电网研究院 | Method for manufacturing grooved silicon carbide MOSFET power device |
-
2016
- 2016-11-03 CN CN201610959001.8A patent/CN108022831B/en active Active
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20050115404A (en) * | 2004-06-03 | 2005-12-07 | 매그나칩 반도체 유한회사 | Method of manufacturing an isolation in semiconductor device |
| CN101728308A (en) * | 2008-10-24 | 2010-06-09 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing shallow trench isolation structure |
| CN101740461A (en) * | 2008-11-24 | 2010-06-16 | 中芯国际集成电路制造(北京)有限公司 | Method for manufacturing semiconductor device |
| CN102239571A (en) * | 2008-12-04 | 2011-11-09 | 三菱电机株式会社 | Method for manufacturing thin-film photoelectric conversion device |
| CN101924018A (en) * | 2009-06-11 | 2010-12-22 | 上海华虹Nec电子有限公司 | Method for improving corner at top of groove into rounded corner |
| US20140315340A1 (en) * | 2009-09-17 | 2014-10-23 | Soraa Laser Diode, Inc. | Laser diodes with scribe structures |
| CN102456607A (en) * | 2010-10-19 | 2012-05-16 | 上海宏力半导体制造有限公司 | Manufacturing method for shallow trench isolation structure |
| CN102361007A (en) * | 2011-11-02 | 2012-02-22 | 上海宏力半导体制造有限公司 | Method for etching groove and semiconductor device |
| CN104039988A (en) * | 2011-12-29 | 2014-09-10 | Posco公司 | Electric mattress and method for manufacturing same |
| CN103846554A (en) * | 2012-11-29 | 2014-06-11 | 三星钻石工业股份有限公司 | Laser processing method and laser processing apparatus |
| CN104947181A (en) * | 2015-07-07 | 2015-09-30 | 山东大学 | Method for reducing dislocation density in SiC single crystals grown through physical vapor transport method |
| CN105047542A (en) * | 2015-09-06 | 2015-11-11 | 国网智能电网研究院 | Method for manufacturing grooved silicon carbide MOSFET power device |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110504156A (en) * | 2018-05-17 | 2019-11-26 | 美光科技公司 | Method for reducing silicon consumption, the method for forming semiconductor structure, and the method for forming isolation structure |
| CN115458400A (en) * | 2022-09-28 | 2022-12-09 | 上海积塔半导体有限公司 | Method for manufacturing trench in semiconductor substrate and semiconductor device |
| CN115458400B (en) * | 2022-09-28 | 2023-09-12 | 上海积塔半导体有限公司 | Method for manufacturing trench in semiconductor substrate and semiconductor device |
| WO2024067703A1 (en) * | 2022-09-28 | 2024-04-04 | 上海积塔半导体有限公司 | Method for manufacturing trench in semiconductor substrate, and semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108022831B (en) | 2021-06-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103107066B (en) | A kind of photoresist minimizing technology and semiconductor manufacturing process | |
| JP2009158958A (en) | Method of manufacturing semiconductor device, and its semiconductor device | |
| JP2007281120A (en) | Method of manufacturing simox wafer and simox wafer manufactured by the method | |
| JP2007227424A (en) | Production process of simox wafer | |
| CN108022831A (en) | Groove preparation method and semiconductor device preparation method | |
| JP2010526431A (en) | Improved process for making cleaned strained silicon surfaces | |
| KR100718265B1 (en) | Method for manufacturing a semiconductor device | |
| JP2009094454A (en) | Method of manufacturing semiconductor device | |
| JP2007194333A (en) | Method for manufacturing semiconductor device | |
| CN102376552B (en) | Method for preventing grid electrode from damage in ion implantation process | |
| CN113838857B (en) | Three-dimensional memory and method for preparing same | |
| JPH06291107A (en) | Manufacture of semiconductor integrated circuit | |
| FR2734403A1 (en) | ISOLATION PLAN IN INTEGRATED CIRCUITS | |
| CN107910247A (en) | A kind of semiconductor manufacturing process | |
| CN102054674B (en) | Metal gate electrode and method for manufacturing metal gate electrode | |
| JP3896881B2 (en) | Manufacturing method of semiconductor device | |
| CN106783565A (en) | The method for improving active area pit corrosion defect | |
| JPS6120337A (en) | Manufacture of semiconductor device | |
| KR100196420B1 (en) | Method for forimg isolation region in semiconductor device | |
| JPS5812732B2 (en) | Manufacturing method for semiconductor devices | |
| CN110938434A (en) | Etching method of inner side wall, etching gas and preparation method of nanowire device | |
| KR19990086523A (en) | Semiconductor device manufacturing method | |
| CN105097643B (en) | The forming method of fleet plough groove isolation structure | |
| CN113257743B (en) | Semiconductor device, manufacturing method and three-dimensional memory | |
| JP2005317736A (en) | Method for manufacturing semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |