CN107995140B - Symbol judgment method, symbol judgment circuit and digital receiving circuit - Google Patents
Symbol judgment method, symbol judgment circuit and digital receiving circuit Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/345—Modifications of the signal space to allow the transmission of additional information
Abstract
A symbol judgment method includes storing a look-up table in a symbol judgment circuit; receiving a first signal and generating a set of coordinate signals corresponding to the first signal according to the first signal, wherein the set of coordinate signals is located in a first decision region; and reading the comparison table according to the set of coordinate signals to output a first symbol corresponding to the first signal, wherein the first symbol is a first constellation point corresponding to the first decision region.
Description
Technical Field
The present invention relates to a symbol determination method, a symbol determination circuit and a digital receiving circuit, and more particularly, to a symbol determination method, a symbol determination circuit and a digital receiving circuit for demodulating a high-order modulation signal or an irregular modulation signal.
Background
Digital communication systems are widely used in daily life, and conventional digital communication systems mostly use a Regular Modulation Scheme (Modulation Scheme) to modulate signals, such as BPSK, QPSK, 16PSK, 64QAM, 256QAM, and other Modulation schemes. Since the arrangement of the constellation points of the regular modulation method on a constellation plane is regular, the Demodulator (Demodulator) or symbol estimator (Slicer) corresponding to the regular modulation method is simple.
However, with the demand for transmission rate of communication systems, new generation communication systems (such as DVB S2X) have begun to use a high-order Modulation Scheme or Irregular Modulation Scheme (e.g. 256APSK) to modulate signals, In other words, the constellation points of the Irregular Modulation Scheme have Irregular arrangement on the constellation plane, i.e. there is no regular relative relationship between the amplitude/Magnitude (Magnitude), Phase, real/In-Phase (In Phase) or imaginary/Quadrature (Quadrature) components corresponding to the transmission symbols of the Irregular Modulation Scheme.
For example, referring to fig. 9 and 10, fig. 9 and 10 are schematic diagrams of constellation points of a regular modulation method and an irregular modulation method on a constellation plane, respectively. For convenience of illustration, fig. 9 and 10 only show a first quadrant of the constellation plane. As can be seen from fig. 9, the constellation points of the regular modulation scheme are regularly arranged on the constellation plane, that is, the amplitude, phase, in-phase component or imaginary component of the symbols (i.e., the constellation points) corresponding to the transmission symbols have a regular relative relationship, and in contrast to fig. 10, the constellation points of the irregular modulation scheme are not completely arranged on the constellation plane (compared to fig. 9).
The conventional technique does not develop a corresponding Demodulation (Demodulation) method for irregular and regular modulation, that is, the conventional digital receiver or symbol estimator cannot correctly demodulate the modulation signal transmitted by the transmitting end, so that the error rate of the communication system is increased and the overall performance of the communication system is reduced.
Therefore, it is an object of the present invention to demodulate the irregular modulation signal.
Disclosure of Invention
Therefore, the present invention is directed to a symbol determining method, a symbol determining circuit and a digital receiving circuit for demodulating a high-order modulated signal or an irregular modulated signal, so as to overcome the drawbacks of the prior art.
The invention discloses a symbol judging method, which is used for judging a first symbol corresponding to a first signal, and comprises the steps of storing a Look-Up Table (LUT) in a symbol judging circuit, wherein the Look-Up Table is stored in the corresponding relation between a plurality of coordinate points and a plurality of Constellation points (Constellation points) on a Constellation plane, a decision interval is formed by the first coordinate points corresponding to the same Constellation Point, the Constellation plane is provided with a plurality of decision intervals, each decision interval corresponds to a single Constellation Point, and the distribution situation of the Constellation points on the Constellation plane is related to a modulation mode of the first signal; receiving the first signal, and generating a set of coordinate signals corresponding to the first signal according to the first signal, wherein the set of coordinate signals corresponds to a first decision region of the plurality of decision regions; and reading the comparison table according to the set of coordinate signals to output a first symbol corresponding to the first signal, wherein the first symbol is a first constellation point corresponding to the first decision region.
The present invention further discloses a symbol determining circuit applied to a digital receiving circuit, the symbol determining circuit includes a coordinate unit for receiving a first signal and generating a coordinate signal set corresponding to the first signal, wherein the first signal includes a signal modulated by a Modulation Scheme; and a comparison unit, coupled to the coordinate unit, storing a comparison table, for outputting a first symbol corresponding to the first signal according to the comparison table and the set of coordinate signals; the modulation method comprises a plurality of Constellation points (Constellation points) on a Constellation plane, the comparison table stores the corresponding relation between a plurality of coordinate points on the Constellation plane and the Constellation points, a decision interval is formed by a plurality of first coordinate points corresponding to the same Constellation Point, the Constellation plane comprises a plurality of decision intervals, and each decision interval corresponds to a single Constellation Point.
The invention further discloses a digital receiving circuit, which comprises an error feedback circuit for outputting a first signal according to a plurality of coefficients; a symbol judgment circuit, coupled to the error feedback circuit, including a coordinate unit for receiving the first signal and generating a coordinate signal set corresponding to the first signal, wherein the first signal includes a signal modulated by a Modulation Scheme; and a comparison unit, coupled to the coordinate unit, storing a comparison table, for outputting a first symbol corresponding to the first signal according to the comparison table and the set of coordinate signals; the modulation method comprises a plurality of Constellation points (Constellation points) on a Constellation plane, a comparison table stores the corresponding relation between a plurality of coordinate points on the Constellation plane and the Constellation points, a decision interval is formed by a plurality of first coordinate points corresponding to the same Constellation Point, the Constellation plane comprises a plurality of decision intervals, and each decision interval corresponds to a single Constellation Point; a subtraction unit coupled to the error feedback circuit and the symbol judgment circuit for generating an error signal; the error feedback circuit adjusts the coefficients according to the error signal.
Drawings
Fig. 1 is a block diagram of a digital receiving circuit according to an embodiment of the invention.
Fig. 2 is a schematic diagram of a constellation plane according to an embodiment of the present invention.
Fig. 3 is a block diagram of a symbol determination circuit according to an embodiment of the present invention.
FIG. 4 is a diagram illustrating a plurality of decision intervals according to an embodiment of the present invention.
Fig. 5 is a schematic diagram of a plurality of constellation points according to an embodiment of the present invention.
FIG. 6 is a diagram of a lookup table according to an embodiment of the present invention.
Fig. 7 is a schematic diagram of a symbol determination process according to an embodiment of the invention.
Fig. 8 is a schematic diagram of a digital receiving circuit according to an embodiment of the invention.
Fig. 9 is a schematic diagram of a plurality of constellation points of a regular modulation method.
Fig. 10 is a schematic diagram of a plurality of constellation points in an irregular modulation manner.
Description of the symbols
10. 80 digital receiving circuit
100. 800 error feedback circuit
102 symbol judgment circuit
120 coordinate unit
122 collation unit
70 symbol judgment process
700 to 704
82. 84 phase extraction unit
c index pointer
CP _ 1-CP _ K constellation points
DR _ 1-DR _ K decision region
e、s、s1、s2、x Signal
LUT look-up table
RS coordinate position
w1～wNCoefficient of performance
SUB subtraction unit
z symbol
(s1,s2) Set of coordinate signals
Phase of angle s and angle z
Detailed Description
Referring to fig. 1, fig. 1 is a block diagram of a digital receiving circuit 10 according to an embodiment of the present invention, and as shown in fig. 1, the digital receiving circuit 10 includes an error feedback circuit 100, a symbol determining circuit 102, and a subtracting unit SUB. The error feedback circuit 100 includes an Adaptive Filter (not shown in fig. 1) for performing a signal processing on a signal x according to a coefficient w1～wNThe signal x is processed to output a first signal s. The Symbol determining circuit 102 is a Slicer (Slicer) coupled to the error feedback circuit 100, and the Symbol determining circuit 102 receives the first signal s and determines a first Symbol (Symbol) z corresponding to the first signal s according to the first signal s. The subtracting unit SUB is coupled to the error feedback circuit 100 and the symbol determining circuit 102, and is configured to generate an error signal e to the error feedback circuit 100, where the error signal is a subtraction result of the first signal s and the first symbol z (i.e., e is s-z). The error feedback circuit 100 can adjust the coefficient w according to the error signal e1～wN. In one embodiment, the error feedback circuit 100 may be a Feed Forward Equalizer (FFE), in which case the digital receiving circuit 10 is an Equalizer circuit.
In detail, the first signal s includes a signal modulated by a specific Modulation Scheme (Modulation Scheme) and a noise, and the specific Modulation Scheme may be a Regular Modulation Scheme (Regular Modulation Scheme) or an Irregular Modulation Scheme (Irregular Modulation Scheme). For example, the regular modulation scheme may be BPSK, QPSK, 16PSK, 64QAM, 256QAM, etc., that is, the constellation points of the regular modulation scheme exhibit a regular arrangement on a constellation plane, for example, a plurality of amplitudes, phases, real/In-Phase components (In Phase components) or imaginary/Quadrature components (Quadrature components) corresponding to a plurality of transmission symbols (i.e., a plurality of constellation points) transmitted by the transmitting end have a regular relationship. In contrast, the amplitudes, phases, in-phase components or quadrature components corresponding to the transmitted symbols in the irregular modulation scheme have no regular relationship, i.e., the constellation points associated with the irregular modulation scheme are irregularly arranged on the constellation plane.
For example, referring to fig. 2, fig. 2 is a schematic diagram of a constellation plane 20 according to an embodiment of the invention, and fig. 2 also illustrates a distribution/arrangement of a plurality of constellation points CP _1 to CP _ K associated with a modulation method MC on the constellation plane 20. Wherein the modulation MC is a random modulation, and the constellation plane 20 can be a Complex Number (Complex Number) plane, which is composed of a real part axis Re and an imaginary part axis Im. In fact, the constellation plane 20 can be divided into a first Quadrant (quad/Quadrant), a second Quadrant, a third Quadrant, and a fourth Quadrant according to signs of the real part and the imaginary part, and fig. 2 only shows a portion of the first Quadrant of the constellation plane 20 (only the constellation points CP _1 to CP _9 of the constellation points CP _1 to CP _ K are shown for convenience of description). In one embodiment, the first signal s may comprise a signal modulated by a modulation method MC. In this case, the symbol determining circuit 102 can output the first symbol z as the constellation point closest to a coordinate position of the first signal s on the constellation plane 20, that is, output the first symbol z as the constellation point closest to (the coordinate position where) the first signal s is located. For example, assume that the first signal s is located at a coordinate position RS (as shown in fig. 2) on the constellation plane 20, and the constellation point closest to the coordinate position RS is the constellation point CP _6, so that the symbol determination circuit 102 receives the first signal s located at the coordinate position RS and then outputs the first symbol z as the constellation point CP _ 6.
Furthermore, the corresponding relationship between the plurality of coordinate points and the constellation points CP _1 to CP _ K in the constellation plane 20 may be pre-stored in a look-up table LUT, and when the symbol determination circuit 102 receives the first signal s, the coordinate position of the first signal s may be used to search the look-up table LUT to output the first symbol z as the constellation point closest to (the coordinate position where) the first signal s is located.
In brief, the constellation plane 20 may be divided into a plurality of decision regions DR _1 to DR _ K (fig. 2 only shows the decision regions DR _1 to DR _9), wherein a plurality of first coordinate points in the decision region DR _ K all correspond to constellation points CP _ K (K is 1 to 9), and when the symbol determination circuit 102 determines that the first signal s belongs to the decision region DR _ K according to the coordinate position of the first signal s (by looking up the look-up table LUT), the symbol determination circuit 102 may output the first symbol z as the constellation point CP _ K corresponding to the decision region DR _ K. The corresponding relationship between the decision regions DR _1 to DR _ K and the constellation points CP _1 to CP _ K may be stored in the look-up table LUT, that is, the corresponding relationship between the plurality of coordinate points in the constellation plane 20 and the constellation points CP _1 to CP _ K is stored in the look-up table LUT, wherein a plurality of first coordinate points in the decision region DR _ K all correspond to the constellation points CP _ K, that is, the plurality of first coordinate points corresponding to the constellation points CP _ K form the decision region DR _ K.
Referring to fig. 3, fig. 3 is a block diagram of the symbol determination circuit 102 according to an embodiment of the present invention, and as can be seen from fig. 3, the symbol determination circuit 102 includes a coordinate unit 120 and a comparison unit 122, the coordinate unit 120 receives the first signal s and generates a coordinate signal set(s) of the first signal s on the constellation plane 20 (s is a set of coordinate signals1,s2) The comparison unit 122 is coupled to the coordinate unit 120, and the comparison unit 122 may utilize a set of coordinate signals(s)1,s2) As an Index pointer (Index) or Address (Address) required for looking up the LUT to output the first symbol z corresponding to the first signal s.
In one embodiment, the set of coordinate signals(s)1,s2) May be a Coordinate representation in a Rectangular Coordinate system (Rectangular Coordinate), i.e. the first signal s may be represented as s ═ s1+js2Or s ═ sI+jsQThus, the coordinate signal s1-Can represent the in-phase component s of the first signal sIAnd a coordinate signal s2-May represent the quadrature component s of the first signal sQI.e. s1＝sIRe(s) and s2＝sQIm(s), where Re (·) is a real operator and Im (·) is an imaginary operator.
In addition, the method for establishing the LUT is not limited, for example, the distances between the coordinate points in the constellation plane 20 and the constellation points CP _1 to CP _ K may be calculated first, and a plurality of second coordinate points near the constellation point CP _ K may be corresponded to the constellation point CP _ K. More precisely, for the second coordinate points corresponding to the constellation point CP _ K, a distance d _ K between each of the second coordinate points and the constellation point CP _ K is a minimum value of first distances d _1 to d _ N between the second coordinate point and the constellation points CP _1 to CP _ K, in other words, the second coordinate points have first distances d _1 to d _ N from the constellation points CP _1 to CP _ K, respectively, and the distance d _ K between the second coordinate point and the constellation point CP _ K is d _ K ═ min { d _1, …, d _ N } (the distance d _ K is the first minimum distance). The first distances d _1 to d _ N can be calculated by calculating norms (Norm) between the second coordinate points and the constellation points CP _1 to CP _ K, which can be Euclidean Norm (Euclidean Norm), Absolute-Value Norm (Absolute-Value Norm), Maximum Norm (Maximum Norm), Manhattan Norm (Manhattan Norm) or other p-norms (l-p Norm). As a result, each coordinate point in the constellation plane 20 and the corresponding constellation point are stored in the look-up table LUT, and the constellation point corresponding to each coordinate point is the closest constellation point to the coordinate point.
In one embodiment, the symbol determination circuit 102 may represent the set of coordinate signals(s) by using a digital method1,s2). For example, the symbol determination circuit 102 may utilize 6 bits (Bit) to represent the in-phase component sIMagnitude of | sIAnd represents the orthogonal component s with 6 bitsQMagnitude of | sQL. Thus, taking the first quadrant of the constellation plane 20 as an example, the real axis Re can be divided into 26Individual interval, constellationThe imaginary axis Im of the plane 20 may also be divided into 26An interval, in this case, the first quadrant of the constellation plane 20 may be divided into 26×26Taking fig. 2 as an example, the look-up table LUT stores the correspondence between 256 (Quantized) coordinate points and the corresponding constellation points CP _1 to CP _ 9. It should be noted that the symbol determination circuit 102 uses a plurality of bits to represent the coordinate signal set(s)1,s2) The boundary between the decision region and the decision region will exhibit a jagged demarcation (as shown in fig. 4) rather than a smooth demarcation as shown in fig. 2.
The symbol judgment circuit 102 is used to represent the coordinate signal group(s)1,s2) The more bits the number of the decision regions is, the smoother the boundary between the decision regions is, and the memory space required for the look-up table LUT increases. In order to reduce the memory requirement of the LUT, the Symmetry (Symmetry) of the modulation MC can be used to save the memory space required by the LUT. For example, referring to fig. 5, fig. 5 is a schematic diagram illustrating a plurality of constellation points of a modulation MC on a constellation plane 20, as shown in fig. 5, the step-by-step manner of the constellation points of the modulation MC is symmetric with respect to a real part axis Re, and the distribution manner of the constellation points is also symmetric with respect to an imaginary part axis Im, under the condition that the modulation MC has symmetry, the LUT can only store the corresponding relationship between a plurality of coordinate points located in a first quadrant and a plurality of constellation points located in the first quadrant, and the symbol determination circuit 102 can first determine the coordinate signal s1And a coordinate signal s2Positive and negative signs (i.e. judging in-phase component s)IAnd the orthogonal component sQPositive or negative sign of) and then based on the coordinate signal s1Magnitude of | s1I and the coordinate signal s2Magnitude of | s2L looking up table, and finally, the coordinate signal s1And a coordinate signal s2Is applied to the first symbol z and output. For example, assume that a first signal s 'received by the symbol determination circuit 102 is located at a coordinate position RS' shown in fig. 5, and its coordinate is(s)1’,s2') and located in the second quadrant, the symbol determination circuit 102 can first determine the determination coordinate signal s1' and coordinate signal s2The sign of' is (-, +), i.e.(s)1’,s2') can be represented as (- | s)1’|,+|s2' |) and then based on the coordinate signal s1Magnitude of | s1I and the coordinate signal s2Magnitude of | s2If the constellation point CP _6 represents a signal a + jb, the symbol determination circuit 102 may output a first symbol z 'as z' ═ a + jb. In this way, the LUT only needs to store the corresponding relationship between the coordinate points of the first quadrant and the constellation points of the first quadrant, and the coordinate points and the constellation points of the other quadrants can utilize the coordinate signal set(s) of the first signal s1,s2) The sign of (2) can be estimated, thus reducing the requirement of the LUT on the memory space.
In addition, in order to reduce the memory requirement of the LUT, the symbol determination circuit 102 can use the indirect method to find the first symbol z corresponding to the first signal s, i.e. the symbol determination circuit 102 first corresponds the first signal s to an index pointer c, and then corresponds the index pointer c to the first symbol z. Specifically, as shown in fig. 6, the lookup table LUT may include a first sub-lookup table LUT _1 and a second sub-lookup table LUT _2, the first sub-lookup table LUT _1 stores the corresponding relationship between the plurality of coordinate points and the plurality of index pointers, and the second lookup table LUT _2 stores the corresponding relationship between the plurality of index pointers and the plurality of constellation points, wherein each index pointer corresponds to a constellation point. For example, when the first signal s is located at the coordinate position RS (shown in fig. 2) in the constellation plane 20, the first sub-lookup table LUT _1 may first correspond the first signal s to an index pointer c, where the index pointer c is an integer (e.g., an integer 6, i.e., c equals 6), and then the second lookup table LUT _2 may correspond the index pointer c to a constellation point CP _6 (the constellation point CP _6 represents a signal a + jb), and the symbol determination circuit 102 may output the first symbol z as a + jb. In other words, the symbol determination circuit 102 can first read the first sub-lookup table LUT _1 to determine the coordinate signal set(s)1,s2) Reads the index pointer c corresponding to the first signal s, and reads the second look-up table LUT _2 to obtain the indexThe pointer c reads the first symbol z corresponding to the index pointer c. Because the index pointer c is an integer data type, less memory space is occupied; on the other hand, a + jb is usually a floating-point data type, and occupies a large memory space. Therefore, the memory space requirement of the LUT can be reduced by indirectly searching the first symbol z corresponding to the first signal s.
The operation of the symbol determination circuit 102 in fig. 1 can be further summarized as a symbol determination process. Referring to fig. 7, fig. 7 is a schematic diagram of a symbol determination process 70 according to an embodiment of the invention. The symbol determination process 70 can be executed by the symbol determination circuit 102 in fig. 1, and includes the following steps:
step 700: the look-up table LUT is stored in the symbol determination circuit 102.
Step 702: receiving a first signal s and, based on the first signal s, generating a set of coordinate signals(s) corresponding to the first signal s1,s2)。
Step 704: from sets of coordinate signals(s)1,s2) The LUT is read to output a first symbol z corresponding to the first signal s.
For details of the operation of the symbol determination process 70, please refer to the related paragraphs, which are not described herein.
As can be seen from the above, the present invention can store the corresponding relationship between the plurality of coordinate points and the plurality of constellation points in the look-up table LUT, and after receiving the first signal s, the symbol determination circuit 102 only needs to look up the look-up table LUT to output the first symbol z corresponding to the first signal s. Compared with the prior art, the invention can be used for demodulating high-order modulation signals or irregular modulation signals, which can be applied to digital television systems (such as DVB S2X CR20/30) and used for demodulating 256APSK modulation signals specified in DVB S2X systems.
It should be noted that the above-mentioned embodiments are provided to illustrate the concept of the present invention, and those skilled in the art can make various modifications without departing from the scope of the invention. For example, the error feedback circuit of the digital receiving circuit is not limited to be a feedforward equalizer, but the error feedback circuit may be a Phase recovery (Phase R)ecovery) circuit. Referring to fig. 8, fig. 8 is a schematic diagram of a digital receiving circuit 80 according to an embodiment of the invention. The digital receiving circuit 80 is similar to the digital receiving circuit 10, so the same elements use the same symbols, and different from the digital receiving circuit 10, the digital receiving circuit 80 includes an error feedback circuit 800 and Phase retrieving units 82 and 84, the error feedback circuit 800 is a Phase Recovery (Phase Recovery) circuit, and the error signal e is a subtraction result between a Phase of the first signal s and a Phase of the first symbol z (i.e., e ═ s-z). Provided that the error feedback circuit 100 adjusts the coefficients w of its filter in accordance with the error signal e1～wNI.e., to meet the needs of the present invention.
In addition, a set of coordinate signals(s)1,s2) Not limited to coordinate representations in a rectangular coordinate system, sets of coordinate signals(s)1,s2) The Coordinate representation method may be a Polar Coordinate system (Polar Coordinate), that is, the Coordinate signal s may be represented as s ═ s | exp (j ≦ s) when the first signal s is represented as s ═ s ≦ s1-A magnitude signal | s | which may represent the first signal s, and a coordinate signal s2-A phase signal s which can represent the first signal s, i.e. s1Is | s | and s2Is equal to s. Provided that the error feedback circuit 100 is based on the set(s) of coordinate signals1,s2) The look-up table is looked up, and the first symbol z corresponding to the first signal s is output, which satisfies the requirement of the present invention.
Those skilled in the art will appreciate that the functional units/circuits shown in fig. 1, 3, 6 and 8 can be implemented or realized by Digital circuits (e.g., RTL circuits) or a Digital Signal Processor (DSP), which will not be described herein.
In summary, the present invention can store the corresponding relationship between the plurality of coordinate points and the plurality of constellation points in the comparison table of the symbol determination circuit, and the symbol determination circuit can output the first symbol corresponding to the first signal by looking up the comparison table after receiving the first signal, where the first symbol is the constellation point closest to the first signal. Compared with the prior art, the invention is suitable for signal demodulation of high-order modulation signals or irregular modulation signals.
The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made in accordance with the claims of the present invention should be covered by the present invention.
Claims (18)
1. A symbol determining method for determining a first symbol corresponding to a first signal, the symbol determining method comprising:
storing a comparison table in a symbol judgment circuit, wherein the comparison table stores the corresponding relationship between a plurality of coordinate points and a plurality of constellation points on a constellation plane, a decision section is formed by a plurality of first coordinate points corresponding to the same constellation point, the constellation plane is provided with a plurality of decision sections, each decision section corresponds to a single constellation point, and the distribution situation of the constellation points on the constellation plane is related to a modulation mode of the first signal;
receiving the first signal, and generating a set of coordinate signals corresponding to the first signal according to the first signal, wherein the set of coordinate signals is located in a first decision region of the plurality of decision regions; and
reading the comparison table according to the set of coordinate signals to output the first symbol corresponding to the first signal, wherein the first symbol is a first constellation point corresponding to the first decision region;
wherein the modulation method is an irregular modulation method.
2. The method of claim 1 further comprising:
the comparison table is established.
3. The method of claim 2 wherein the step of establishing the lookup table comprises:
calculating distances between a plurality of coordinate points of the constellation plane and the plurality of constellation points; and
and corresponding a plurality of second coordinate points in the plurality of coordinate points to a second constellation point, wherein each second coordinate point of the plurality of second coordinate points has a plurality of first distances from the plurality of constellation points, each second coordinate point has a first minimum distance from the second constellation point, and the first minimum distance is the minimum value of the plurality of first distances.
4. The method of claim 1 wherein the step of reading the lookup table according to the set of coordinate signals to output the first symbol corresponding to the first signal comprises:
reading a first sub-comparison table of the comparison table according to the coordinate signal group, and outputting an index pointer; and
reading a second sub-lookup table of the lookup table according to the index pointer, and outputting the first symbol corresponding to the first signal.
5. The method of claim 1 wherein the set of coordinate signals is an in-phase signal and an orthogonal signal of the first signal.
6. The method of claim 1 wherein the set of coordinate signals is a magnitude signal and a phase signal of the first signal.
7. The symbol determination method of claim 1 wherein the modulation is amplitude phase shift modulation.
8. The method of claim 1 wherein a number of the constellation points corresponding to the modulation scheme is greater than or equal to 32.
9. A symbol judgment circuit is applied to a digital receiving circuit, and comprises:
a coordinate unit for receiving a first signal and generating a coordinate signal set corresponding to the first signal, wherein the first signal comprises a signal modulated by a modulation method; and
a comparison unit coupled to the coordinate unit, storing a comparison table, and outputting a first symbol corresponding to the first signal according to the comparison table and the coordinate signal set;
the modulation mode is provided with a plurality of constellation points on a constellation plane, the comparison table stores the corresponding relation between a plurality of coordinate points on the constellation plane and the plurality of constellation points, a decision interval is formed by a plurality of first coordinate points corresponding to the same constellation point, the constellation plane is provided with a plurality of decision intervals, and each decision area corresponds to a single constellation point;
wherein the modulation method is an irregular modulation method.
10. The symbol decision circuit of claim 9 wherein the lookup table corresponds a plurality of second coordinate points of the constellation plane to a second constellation point, each of the second coordinate points has a plurality of first distances from the constellation points, each of the second coordinate points has a first minimum distance from the second constellation point, the first minimum distance is the minimum of the first distances, and the first minimum distance is the minimum of the first distances.
11. The symbol decision circuit of claim 9 wherein the look-up table comprises:
a first sub-lookup table for outputting an index pointer according to the set of coordinate signals; and
a second sub-lookup table for outputting the first symbol corresponding to the first signal according to the index pointer.
12. The symbol decision circuit of claim 9 wherein the coordinate unit generates the set of coordinate signals as an in-phase signal and an orthogonal signal of the first signal.
13. The symbol decision circuit of claim 9 wherein the coordinate unit generates the set of coordinate signals as a magnitude signal and a phase signal of the first signal.
14. The symbol decision circuit of claim 9 wherein the modulation is amplitude phase shift modulation.
15. The symbol decision circuit of claim 9 wherein a number of the constellation points corresponding to the modulation scheme is greater than or equal to 32.
16. A digital receiving circuit, comprising:
an error feedback circuit for outputting a first signal according to a plurality of coefficients;
a symbol judgment circuit, coupled to the error feedback circuit, comprising:
a coordinate unit for receiving the first signal and generating a coordinate signal set corresponding to the first signal, wherein the first signal comprises a signal modulated by a modulation method; and
a comparison unit coupled to the coordinate unit, storing a comparison table, and outputting a first symbol corresponding to the first signal according to the comparison table and the coordinate signal set;
the modulation mode is provided with a plurality of constellation points on a constellation plane, the comparison table stores the corresponding relation between a plurality of coordinate points on the constellation plane and the plurality of constellation points, a decision interval is formed by a plurality of first coordinate points corresponding to the same constellation point, the constellation plane is provided with a plurality of decision intervals, and each decision area corresponds to a single constellation point; and
a subtraction unit coupled to the error feedback circuit and the symbol judgment circuit for generating an error signal;
the error feedback circuit adjusts the coefficients according to the error signal;
wherein the modulation method is an irregular modulation method.
17. The digital receiver circuit of claim 16, wherein the error feedback circuit is a feed forward equalizer, and the error signal is a subtraction of the first signal and the first symbol.
18. The digital receiver circuit of claim 16, wherein the error feedback circuit is a phase recovery circuit, and the error signal is a subtraction result between a phase of the first signal and a phase of the first symbol.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610947763.6A CN107995140B (en) | 2016-10-26 | 2016-10-26 | Symbol judgment method, symbol judgment circuit and digital receiving circuit |
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