CN107978284B - Method and system for adapting channel operational amplifier without line buffer - Google Patents
Method and system for adapting channel operational amplifier without line buffer Download PDFInfo
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- CN107978284B CN107978284B CN201610919255.7A CN201610919255A CN107978284B CN 107978284 B CN107978284 B CN 107978284B CN 201610919255 A CN201610919255 A CN 201610919255A CN 107978284 B CN107978284 B CN 107978284B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Abstract
An adaptive method of a channel operational amplifier without a line buffer, comprising the steps of: cutting a row of pixel data into a plurality of groups of pixel data; comparing a plurality of pixels of corresponding groups of adjacent rows to respectively obtain difference values of the pixels; obtaining a maximum difference value according to the difference value; and determining the power mode of the channel operational amplifier according to the maximum difference. The adaptive method of the channel operational amplifier without the line buffer can improve the efficiency of the liquid crystal display.
Description
Technical Field
The present disclosure relates to source drivers for liquid crystal displays, and more particularly, to an adaptive method and system for a channel operational amplifier without a line buffer.
Background
Liquid Crystal Displays (LCDs) have the advantages of light weight, low power consumption, and no radiation, and are therefore commonly used in various electronic products, such as desktop computers, tablet computers, and mobile phones, for output display.
Fig. 1 shows a system block diagram of a liquid crystal display 100. The gate lines GL1 to GLn cross the data lines DL1 to DLm to define a plurality of pixels arranged in a matrix on the liquid crystal panel 11. A thin film transistor TFT and a liquid crystal capacitor Clc are formed as a switch and a liquid crystal cell (liquid crystal cell) in each pixel. The voltage difference between the pixel electrode and the common voltage (Vcom) electrode of the liquid crystal capacitor Clc generates an electric field to control the liquid crystal molecules for changing the intensity of the passing light. The gate driving signals pass through the gate lines GL 1-GLn to turn on the thin film transistors TFT, so that the data driving signals are electrically connected to the pixel electrodes through the corresponding data lines DL 1-DLm.
The liquid crystal display 100 includes a gate driver 13 for driving the gate lines GL 1-GLn and a source (or data) driver 15 for driving the data lines DL 1-DLm. During a frame display period, the gate driver 13 sequentially provides gate driving signals to the gate lines GL 1-GLn, and the source driver 15 provides data driving signals to the data lines DL 1-DLm for charging the pixel electrodes of the liquid crystal capacitor Clc.
The liquid crystal display 100 further includes a timing controller (Tcon) 17 for controlling the gate driver 13 and the source driver 15 and providing the image signal to the source driver 15.
The source driver 15 has channel operational amplifiers (channel amplifiers) corresponding to the data lines DL1 to DLm. For portable device applications (e.g., notebook, mobile phone, or tablet), the channel op amp must save power consumption due to the limited power supply. For television applications, the operating temperature may not be too high, and therefore the channel op-amp must account for heat dissipation. In order to save power consumption or to take heat dissipation into account, the pass op-amp must have a small quiescent current (static current). On the other hand, for the application of the liquid crystal panel 11 with high resolution, the channel operational amplifier must have a short settling time (settling time) or a high slew rate (slew rate).
However, for the design of an operational amplifier (OPA), both a smaller quiescent current and a shorter settling time are conflicting. Therefore, the designer of the operational amplifier must trade off both a smaller quiescent current (or lower power consumption) and a shorter settling time (or higher slew rate).
Therefore, it is desirable to provide an adaptive method and system for a channel operational amplifier, which has the advantages of small quiescent current and short settling time to improve the efficiency of a liquid crystal display.
Disclosure of Invention
In view of the foregoing, the present disclosure provides an adaptive method and system for a channel operational amplifier without a line buffer, which adaptively determines an appropriate power mode by comparing two adjacent rows of pixel data to improve the efficiency of a liquid crystal display.
According to an embodiment of the present disclosure, a method for adapting a channel operational amplifier without a line buffer includes the steps of: cutting a row of pixel data into a plurality of groups of pixel data; comparing a plurality of pixels of corresponding groups of adjacent rows to respectively obtain difference values of the pixels; obtaining a maximum difference value according to the difference value; and determining the power mode of the channel operational amplifier according to the maximum difference.
Drawings
Fig. 1 shows a system block diagram of a liquid crystal display.
Fig. 2 schematically shows a timing diagram of a voltage difference between two adjacent rows of pixel data.
FIG. 3A is a flowchart illustrating an adaptive method of a channel operational amplifier without a line buffer according to the first and second embodiments of the disclosure.
Fig. 3B schematically shows an image frame.
Fig. 4A shows a flowchart of an adaptive method for a channel op-amp without a line buffer according to the third and fourth embodiments of the present disclosure.
Fig. 4B schematically shows an image frame.
Fig. 5A illustrates a third embodiment of the present disclosure that divides a row of pixel data into three groups of pixel data in an interval division manner.
Fig. 5B illustrates a fourth embodiment of the present disclosure, which divides a row of pixel data into m groups of pixel data according to a region division manner.
FIG. 6 is a block diagram of an adaptive system for a channel op-amp without a line buffer according to an embodiment of the present disclosure.
Description of reference numerals:
100 liquid crystal display
11 liquid crystal panel
13 Gate driver
15 source driver
17 time sequence controller
31 initialization
32 checking whether the first row pixel data is the same
33 updating registers and pointers
34 checking whether the second row of pixel data is the same
35 updating registers and pointers
36 comparing whether the pixel data of adjacent rows are the same
37 setting the channel op-amp to a low power mode
41 dividing one line of pixel data into a plurality of groups
42 comparing corresponding groups of adjacent rows to obtain difference values
43 maximum difference
44 determining power mode
Adaptive system for 500 channel operational amplifier without line buffer
51 receiver
511 differential-to-single-ended conversion device
512 clock and data recovery device
52 time sequence controller
521 adaptable controller
522 register and pointer
53 source driver
531 channel operational amplifier
TFT thin film transistor
Clc liquid crystal capacitor
Vcom common voltage
GL 1-GLn gate line
DL 1-DLm data line
Delta V voltage difference
data _ in input pixel register
data _ cur current pixel register
data _ last previous pixel register
Same _ cur current index
same _ last previous index
Detailed Description
To solve the trade-off between quiescent current (or power consumption) and settling time (or slew rate), an adaptive channel op-amp for the source driver 15 is proposed, which has at least two power modes: a high power mode (normal mode) and a low power mode. Wherein the high power mode has a higher slew rate (or shorter settling time) and the low power mode has a lower quiescent current.
Fig. 2 schematically shows a timing chart of a voltage difference between two adjacent rows of pixel data. When the voltage difference delta V between the current row of n pixel data and the previous row of n-1 pixel data is zero, the channel operational amplifier operates in a low-power mode; when the voltage difference Δ V between the previous row of n pixel data and the previous row of n-1 pixel data is not zero, the channel operational amplifier operates in the high power mode. Therefore, the channel op-amp is adapted to determine an appropriate power mode for improving the efficiency of the liquid crystal display 100 according to the voltage difference between the current row of n pixel data and the previous row of n-1 pixel data.
To compare the current line of pixel data with the previous line of pixel data, a line buffer (linebuffer) may be used to store the previous line of pixel data, which is then compared with the current line of pixel data. However, most of the source driver 15 or the timing controller 17 does not have a line buffer. Furthermore, the line buffer occupies a large circuit area and consumes a large amount of power, and thus is not suitable for portable device applications.
FIG. 3A is a flowchart illustrating a method for adapting a channel operational amplifier without a line buffer according to the first and second embodiments of the disclosure, which is applicable to the liquid crystal display 100. The architecture of the liquid crystal display 100 may follow the system block diagram shown in fig. 1.
First, step 31 is initialized to reset or zero the contents of some registers and indicators. The present embodiment uses three registers: an input pixel register data _ in, a current pixel register data _ cur, and a previous pixel register data _ last. The input pixel register data _ in is used for storing input pixel data, the current pixel register data _ cur is used for storing pixel data of a current row, and the previous pixel register data _ last is used for storing pixel data of a previous row. The input pixel register data _ in, the current pixel register data _ cur and the previous pixel register data _ last respectively only need one byte of memory space for storing data of one pixel. This example uses two criteria: the current index, sam _ cur, and the previous index, sam _ last. Wherein, when the current index, same _ cur, is set to an acknowledgement (asserted) value ("1"), it indicates that the data of the current line is the same; when the previous index, same _ last, is set to the confirmation value ("1"), it indicates that the data of the previous line is the same. The current index, same _ cur, and the previous index, same _ last, each require only one byte of storage space for storing "0" or "1". The three registers and two pointers used in this embodiment require a total of 26 (8 x3+1x2) bytes of storage space. In contrast, using a line buffer to store an entire row of pixel data requires at least several kilobytes of memory space. Therefore, the embodiment can save a large amount of memory space compared to using a line buffer.
After the initialization of step 31, the current pixel register data _ cur, the previous pixel register data _ last, the current index same _ cur, and the previous index same _ last are all zeroed. In addition, the channel operational amplifier is set to a high power mode (normal mode).
In step 32, it is checked whether the first row of pixel data of the liquid crystal panel 11 is the same. In the first embodiment, a plurality of pixel data of the first row are compared in sequence. For example, first the first pixel data is stored in the current pixel register data _ cur, the second pixel data is stored in the input pixel register data _ in, and then the input pixel register data _ in and the current pixel register data _ cur are compared, i.e. whether the (first row) second pixel data is the same as the first pixel data is compared. If they are the same, the third pixel data is then stored in the input pixel register data _ in, and the input pixel register data _ in is compared with the current pixel register data _ cur, i.e. whether the third pixel data is the same as the first pixel data is compared (in the first row). Generally, the nth pixel data is stored in the input pixel register data _ in, and then the input pixel register data _ in is compared with the current pixel register data _ cur (storing the first pixel data in the same row), that is, whether the nth pixel data is the same as the first pixel data in the same row is compared, and the rest of the pixels are repeatedly executed according to the principle until the comparison result is different or the row is finished (for example, a Horizontal Blanking (HB) signal is generated).
In the first embodiment, when all the pixel data in the same row are the same, the pixel data in the row is called the same, so the first embodiment is also called the identical pixel data comparison. In the second embodiment, when all the pixel data of the same row are equal to each other by more than a predetermined ratio (e.g., 80%), the pixel data of the row are said to be the same, so the second embodiment is also referred to as partial-identical pixel data comparison. FIG. 3B illustrates an image frame in which most of the pixels in the same row are the same. For the image frame of fig. 3B, if the exact same pixel data comparison method of the first embodiment is adopted, it is determined that the pixel data is different. However, if the partially identical pixel data comparison method of the second embodiment is adopted, it is determined that the pixel data are identical.
After step 32 is completed, if the first row of pixel data is not the same as each other, the flow returns to step 31. If the pixel data of the first row are the same, step 33 is entered to update the register and the pointer, and the content of the input pixel register data _ in is stored in the current pixel register data _ cur, i.e. the pixel data of the current row (i.e. the first row) is updated to the input pixel data. In addition, the current index, same _ cur, is set to an acknowledge value ("1") to indicate that the pixel data of the current row (i.e., the first row) is the same.
Next, in step 34, it is checked whether the second row of pixel data of the liquid crystal panel 11 is the same. At this time, the second line is regarded as the current line, and the first line becomes the previous line. The inspection of the second row of pixel data (step 34) is the same as the inspection of the first row of pixel data (step 32), and the details thereof are not repeated. If the second row of pixel data is not the same, the process returns to step 31. If the pixel data of the second row are the same, step 35 is executed to update the register and the pointer, and the content of the current pixel register data _ cur is stored in the previous pixel register data _ last, that is, the pixel data of the previous row (i.e., the first row) is stored in the previous pixel register data _ last; the content of the input pixel register data _ in is stored in the current pixel register data _ cur, i.e., the pixel data of the current row (i.e., the second row) is updated to the input pixel data. In addition, the content of the current pointer, the same _ cur, is stored to the previous pointer, the same _ last, i.e. the content of the previous column (i.e. the first column) is stored to the previous pointer, the same _ last; the current index, same _ cur, is set to the confirmed value ("1") to indicate that the data of the current column (i.e., the second column) is the same.
Next, step 36, it is compared whether the current pixel register data _ cur (representing the second row of pixel data) is the same as the previous pixel register data _ last (representing the first row of pixel data). If the current pixel register data _ cur is different from the previous pixel register data _ last, indicating that the second row of pixel data is different from the first row of pixel data, the flow returns to step 31. If the current pixel register data _ cur is the same as the previous pixel register data _ last, indicating that the second row of pixel data is the same as the first row of pixel data, the channel op-amp may be changed from the high power mode to the low power mode (step 37).
Next, it is checked whether the pixel data of the third row of the liquid crystal panel 11 is the same as that in step 34, and thus is not shown in the flowchart repeatedly. At this time, the third line is regarded as the current line, and the second line becomes the previous line. If the third row pixel data is not the same as each other, the flow returns to step 31. If the third row pixel data are the same as each other, step 35 is performed to store the content of the current pixel register data _ cur to the previous pixel register data _ last, and store the input pixel register data _ in to the current pixel register data _ cur. In addition, the content of the current index same _ cur is stored to the previous index same _ last, and the current index same _ cur is set to the confirmed value ("1") to indicate that the pixel data of the current row (i.e., the third row) is the same.
Then, step 36 is entered to compare whether the current pixel register data _ cur (representing the third row of pixel data) is the same as the previous pixel register data _ last (representing the second row of pixel data). If the current pixel register data _ cur is different from the previous pixel register data _ last, indicating that the third row of pixel data is different from the second row of pixel data, the flow returns to step 31. If the current pixel register data _ cur is the same as the previous pixel register data _ last, indicating that the third row of pixel data is the same as the second row of pixel data, the channel op-amp may be set to the low power mode (step 37).
Steps 34-37 shown in FIG. 3A can be repeated for all rows of pixel data across the entire liquid crystal panel 11. Once the flow returns to step 31, the channel op-amp is reset to a high power (normal) mode, and the "first row" recorded in step 32 represents the next row of pixel data that has not yet been viewed.
Fig. 4A shows a flowchart of an adaptive method for a channel op-amp without a line buffer according to the third and fourth embodiments of the present disclosure. At step 41, a line of pixel data is sliced into multiple groups of pixel data. Fig. 5A illustrates that the third embodiment of the present disclosure divides a row of pixel data S0, S1, S2, S3, S4, S5 … into three groups of pixel data in an interval division manner, wherein R, G, B represents red, green, and blue, respectively. Group 1 includes pixels S0, S3 …, group 2 includes S1, S4 …, and group 3 includes S2, S5 …. Fig. 5B illustrates a fourth embodiment of the present disclosure, which divides a row of pixel data into m groups of pixel data according to a region division manner, wherein the pixel data of the same group is not separated by other groups of pixel data. In general, the first pixel data of a group m can be represented as Sm-1. p, where p is the number of pixel data per group.
In the third and fourth embodiments, three registers (i.e., the input pixel register data _ in, the current pixel register data _ cur, and the previous pixel register data _ last) and two indexes (i.e., the current index samec and the previous index sameLast) are required for each pixel data group, so that if a row of pixel data is divided into G pixel data groups, a total storage space of 26G bytes is required.
Then, step 43, a maximum difference value is obtained according to the difference value obtained in the previous step. Finally, step 44, the power mode of the channel operational amplifier is determined according to the obtained maximum difference. Therefore, the present embodiment can keep the channel operational amplifier in the high power mode (normal mode) or switch to at least one low power mode according to the maximum difference.
In one embodiment, the pass op-amp is operable in a first low power mode, a second low power mode (where the second low power is greater than the first low power), and a high power mode. If the maximum difference is less than a preset first critical value, the channel operational amplifier is set in a first low-power mode. And if the maximum difference value is larger than the preset first critical value but smaller than the preset second critical value, the channel operational amplifier is set in a second low-power mode. And if the maximum difference value is larger than a preset second critical value, setting the channel operational amplifier in a high-power mode.
FIG. 4B illustrates another image frame with pixels in the same row having the same local characteristics. For the image frame of fig. 4B, if the first and second embodiments are adopted, it is determined that the pixel data are different, so that the channel operational amplifier is in the high power mode. However, if the fourth embodiment is adopted to divide the channel into a plurality of groups by the area division method, the channel operational amplifier is set in the low power mode.
Fig. 6 shows a block diagram of an adaptive system 500 (hereinafter referred to as an adaptive system) of a channel operational amplifier without a line buffer according to an embodiment of the disclosure. For ease of understanding, only the functional blocks associated with the adaptation of the channel op-amp are shown. The blocks shown in fig. 6 represent only the functions performed, and not the division of the circuit entities. The adaptive system 500 shown in fig. 6 can be fabricated on the same chip or separately fabricated on several chips.
In the present embodiment, the adaptive system 500 includes a receiver 51, a timing controller 52 and a source driver 53. The receiver 51 receives serial (serial) data and outputs parallel (parallel) data. In one example, the receiver 51 includes a differential to single-ended (single-end) conversion device 511, which receives differential data and converts the differential data into single-ended (single-end) data. The receiver 51 further includes a Clock and Data Recovery (CDR) device 512 that receives the single-ended data to obtain clock and data messages, which are fed back to the timing controller 52 in parallel.
The timing controller 52 of the present embodiment includes an adaptive controller 521, which receives parallel data from the receiver 51. The timing controller 52 also includes registers and indicators 522. As described above, the present embodiment uses three registers — the input pixel register data _ in, the current pixel register data _ cur, and the previous pixel register data _ last; and two indexes-current index, sam _ cur, previous index, sam _ last. The registers and indicators 522 of the first and second embodiments only require 26 (8 x3+1x2) bytes of storage space; the third and fourth registers and pointers 522 only require 26 · G (G is the number of groups to be cut) bytes of storage space. The adaptive controller 521 reads or writes data to the registers and indicators 522 according to the method described in fig. 3A or 4A. The adaptive controller 521 sends a power mode control signal to the source driver 53, so that the channel operational amplifier 531 of the source driver 53 changes from the high power mode to the low power mode.
The above description is only a preferred embodiment of the present disclosure, and is not intended to limit the claims of the present disclosure; it is intended that all such equivalent changes and modifications be included within the scope of the present disclosure as defined by the appended claims.
Claims (4)
1. An adaptive method for a channel operational amplifier without a line buffer, comprising:
setting the channel operational amplifier to be in a high-power mode, and initializing an input pixel register, a current pixel register, a previous pixel register, a current index and a previous index in a time schedule controller;
step a: storing first pixel data in a first row in the current pixel register, storing second pixel data in the first row in the input pixel register, comparing whether the input pixel register is the same as the current pixel register, storing third pixel data in the first row in the input pixel register if the input pixel register is the same as the current pixel register, and repeatedly comparing a plurality of pixels in the first row in a mode of comparing whether the input pixel register is the same as the current pixel register to sequentially check whether the plurality of pixel data in the first row are the same;
step b: if the pixel data in the first row are the same, storing the content of the input pixel register to the current pixel register, setting the current index as a confirmation value, and checking whether the pixel data in the second row are the same according to the same way as the pixel data in the first row;
step c: if the pixel data in the second row are the same, temporarily storing one of the pixel data in the second row, and comparing whether the temporarily stored pixel data in the second row is the same as the temporarily stored pixel data in the first row, the method comprises the following steps:
storing the contents of the current pixel register to the previous pixel register;
storing the contents of the input pixel register to the current pixel register;
storing the content of the current index to the previous index;
setting the current index as a confirmation value; and
step d: and if the temporarily stored second row of pixel data is the same as the temporarily stored first row of pixel data, changing the channel operational amplifier from the high-power mode to the low-power mode.
2. The adaptive method of claim 1, wherein all pixel data of the first row are considered the same when they are the same over a predetermined ratio.
3. The adaptive method of channel op-amp without line buffer of claim 1, wherein when the current indicator is a confirmation value, the data indicating the current row is the same; and
when the previous index is the confirmation value, the data indicating the previous line is the same.
4. The method of claim 1, wherein the step c further comprises:
the current pixel register is compared to the previous pixel register.
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| TWI823735B (en) * | 2022-12-30 | 2023-11-21 | 大陸商北京歐錸德微電子技術有限公司 | Methods to save power consumption of display driver chips, display driver chips and display devices |
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| JP2007129600A (en) * | 2005-11-07 | 2007-05-24 | Kawasaki Microelectronics Kk | Image data processor |
| JP4204630B1 (en) * | 2007-05-30 | 2009-01-07 | シャープ株式会社 | Scanning signal line driving circuit, display device, and driving method thereof |
| JP2009015104A (en) * | 2007-07-06 | 2009-01-22 | Nec Electronics Corp | Display controller and control method therefor |
| JP2010147830A (en) * | 2008-12-19 | 2010-07-01 | Oki Semiconductor Co Ltd | Operational amplifier and display drive circuit employing the same |
| CN101533598B (en) * | 2009-03-26 | 2011-01-19 | 华映光电股份有限公司 | A source electrode driven integrated circuit framework of display |
| KR20140076023A (en) * | 2012-12-12 | 2014-06-20 | 삼성디스플레이 주식회사 | Readout unit and organic light emitting diode display apparatus having the same |
| KR20160029544A (en) * | 2014-09-05 | 2016-03-15 | 삼성전자주식회사 | Display driver and display method |
| KR102211124B1 (en) * | 2014-10-02 | 2021-02-02 | 삼성전자주식회사 | Source Driver With Operating in a Low Power and Liquid Crystal Display Device Having The Same |
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