CN107976646A - A kind of signal power characteristic compensation method and device based on vector network analyzer - Google Patents
A kind of signal power characteristic compensation method and device based on vector network analyzer Download PDFInfo
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- CN107976646A CN107976646A CN201711156615.3A CN201711156615A CN107976646A CN 107976646 A CN107976646 A CN 107976646A CN 201711156615 A CN201711156615 A CN 201711156615A CN 107976646 A CN107976646 A CN 107976646A
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Abstract
The invention discloses a kind of signal power characteristic compensation method and device based on vector network analyzer, gather the uncompensated performance number of each Frequency point, required DAC value when calculating uncompensated performance number compensation to setting power, power adjustment is carried out according to DAC value, and by DAC value storage into memory；According to current frequency and step frequency, the storage location of the DAC value needed for current frequency compensation is obtained, the DAC value is read from memory, and be output in compensation circuit and carry out power back-off.The present invention by offset data by being stored in hardware and by hardware realization power back-off function, reduce the time of calculating, improve sweep speed, at the same time using one point of calibration per 16MHz, when scanning element is fallen in the range of this, offset data is directly called out of memory, compensation precision is improved by increasing calibration points.
Description
Technical field
The present invention relates to signal power characteristic compensation field, and in particular to a kind of signal work(based on vector network analyzer
Rate characteristic compensation method and device.
Background technology
For vector network analyzer, the power accuracy for exporting signal has direct influence, mesh for measurement accuracy
Before, with external similar product, there is certain poor on the power accuracy of port output signal for domestic vector network analyzer
Away from, be primarily due to signal produce during component frequency characteristic influence, cause export signal in different frequency point
Power is different.
Domestic vector network analyzer is mainly that the power for exporting signal is compensated using software interpolation method at present,
The power for exporting signal is maintained at setting value, since this method is realized by software, each scanning element is required to software calculating
Then compensate again, add sweep time, meanwhile, this method simply chooses a small amount of point in whole scanning band and carries out power school
Standard, compensation precision are also poor.
With the development of e measurement technology, user is higher and higher to the index request of vector network analyzer.Due to device frequency
The influence of rate characteristic, the power of the output signal of vector network analyzer on different frequency point may be differed with programmed values
It is bigger, cause error occurs in measurement, domestic arrow net is compared also there are certain gap with same kind of products at abroad, so
Reduce power error, improving accuracy of measurement and becoming vector network analyzer one of need to solve the problems, such as.
At present, domestic vector network analyzer improves output power precision using software interpolation method more, this method be
Several points (generally choosing a point every hundreds of MHz) are chosen in whole scanning band, when power setting is 0dBm, pass through work(
For rate meter by near the calibration of power of each calibration point to 0dBm, each calibration point obtains a DAC value, in scanning process,
Judge Current Scan to point fall between any two calibration points, and using the DAC value of the two calibration points as with reference to do interpolation oblique
Rate algorithm, obtains the DAC value of current point, and the DAC value of current point then is sent to progress DA conversion in power setting circuit adds
Onto summing circuit, power back-off is realized.Finally all the points of scanning are made to meet power accuracy index.
Existing technology mainly employs software interpolation method and compensates, and this method mainly realizes each scanning by software
Point power back-off, software can choose several points by power meter calibration to setting value, corresponding offset data be obtained, scanned
Cheng Zhong, software can first judge which two calibration point current scan point falls between, and be that interpolation algorithm is done in reference with the two points,
Since each point is required to do such judgement, causes sweep time to increase, reduce sweep speed, meanwhile, software is diligent
The reference point negligible amounts chosen during rate meter calibrating, cause the precision of compensation also poor.
In conclusion the problem of adding sweep time and poor compensation precision for software interpolation method in the prior art,
Still lack effective solution.
The content of the invention
In order to overcome the above-mentioned deficiencies of the prior art, the present invention provides a kind of signal work(based on vector network analyzer
Rate characteristic compensation method and device.
The technical solution adopted in the present invention is：
A kind of signal power characteristic compensation method based on vector network analyzer, comprises the following steps：
Step 1：The uncompensated performance number of each Frequency point is gathered, when calculating uncompensated performance number compensation to setting power
Required DAC value, power adjustment is carried out according to DAC value, and by DAC value storage into memory；
Step 2：According to current frequency and step frequency, the storage location of the DAC value needed for current frequency compensation is obtained, from
The DAC value is read in memory, and is output in compensation circuit and carries out power back-off.
Further, in the step 1, the uncompensated performance number of each Frequency point is gathered, calculates uncompensated performance number
DAC value required during setting value is compensated, power adjustment is carried out according to DAC value, and by DAC value storage into memory, including：
Step 1.1：Scanning range is divided into multiple frequency ranges at equal intervals, and calculates the adjustable power bracket of compensation circuit；
Step 1.2：Gather each point in each frequency range does not compensate performance number, and calculates and each do not compensate performance number compensation and arrive
Set DAC value required during power；
Step 1.3：DAC value is converted to magnitude of voltage and carries out power adjustment, obtained by compensation circuit according to the DAC value received
Performance number after to adjustment；
Step 1.4：Whether the performance number after verification adjustment meets expected compensation threshold value, if not satisfied, then calculating DAC again
Value, and return to step 1.3；If satisfied, then enter step 1.5；
Step 1.5：By DAC value storage into memory.
Further, it is described that scanning range is divided into multiple frequency ranges at equal intervals, and calculate the adjustable power of compensation circuit
Scope, including：
Whole scanning range is divided into multiple frequency ranges at equal intervals, selects the middle frequency point of each frequency range as calibration base
It is accurate；
DAC value is arranged to 0 and 4095 respectively, is read when DAC value is 0, minimum adjustable power value；When DAC value is
When 4095, maximum adjustable power value；
Vector network analyzer sets a performance number.
Using set value of the power as compensation target, the certain error range of the set value of the power is will deviate from as recuperation valve
Value.
Further, after adjustable power bracket is calculated, also calculating power often changes the DAC value needed for 1dB.
Further, each point does not compensate performance number in each frequency range of the collection, and calculates and each do not compensate performance number
DAC value required during setting power is compensated, including：
(1) vector network analyzer gathers the uncompensated performance number of present frequency point by connecting power meter；
(2) often change DAC value required during 1dB according to power, calculate this and do not compensate performance number compensation to when setting power
Required DAC value；
(3) on the basis of current frequency the frequency of subsequent point is worth to plus a fixed frequency, repeat step (1)-
(2), DAC value required when obtaining the frequency compensation of all the points in whole frequency band to setting power.
Further, whether the performance number after the verification adjustment reaches performance number threshold value, including：
When the performance number after adjustment is less than performance number threshold value with the error of set value of the power, then meet the requirements；Otherwise not
Meet the requirements, often change the error of DAC value required during 1dB and performance number with set value of the power according to power, correct the work(
Rate value complement repays DAC value required during setting value, and revised DAC value is sent into compensation circuit, is adjusted again,
Until meeting expected compensation threshold value.
Further, in the step 2, according to current frequency and step frequency, the DAC needed for current frequency compensation is obtained
The storage location of value, reads the DAC value from memory, and is output in compensation circuit and carries out power back-off, including：
Step 2.1：CPLD receives the initial frequency sent from vector network analyzer and step frequency；
Step 2.2：By current frequency divided by step frequency, and rounding, obtain the frequency and should compensate required DAC value depositing
Storage location in reservoir；
Step 2.3：Read the DAC value of storage and be output in compensation circuit；
Step 2.4：Compensation circuit carries out the power back-off of present frequency point according to DAC value, while in the base of current frequency
Step frequency is added on plinth, obtains the frequency values of next scanning element；
Step 2.5：Judge whether to receive trigger signal, if receiving trigger signal, repeat step 2.2-2.4；It is no
Then, then power back-off is completed.
A kind of signal power characteristic compensation device based on vector network analyzer, including vector network analyzer, CPLD,
Memory and compensation circuit；
The vector network analyzer is connected with power meter, for gathering the uncompensated performance number of each Frequency point, calculates
Required DAC value when uncompensated performance number compensation is to setting value, and it is sent to CPLD；
The CPLD, for DAC value to be sent in compensation circuit；
The compensation circuit, power adjustment is carried out for the DAC value received to be converted to magnitude of voltage by DA conversions；
The memory, the DAC value after being adjusted for storage power.
Further, initial frequency and step frequency are sent to CPLD by the vector network analyzer；The CPLD will
The frequency divided by step frequency of scanning element, and rounding, the storage address of DAC value in memory should be compensated by obtaining the frequency, be read
Take the DAC value of storage and be output in compensation circuit；The compensation circuit carries out power back-off according to the DAC value received.
Compared with prior art, the beneficial effects of the invention are as follows：
(1) present invention adds the DAC circuit of one 12 in compensation circuit, can be by setting suitable DAC to work(
Rate is adjusted, and data are stored and reading is changed to hardware realization, the time of software calculating is avoided, improves sweep speed,
The point of calibration is relatively more at the same time, equally improves compensation precision；
(2) present invention by offset data by being stored in hardware and by hardware realization power back-off function, by software
The part of calculating reduces the time of calculating, improves sweep speed, while calibrate one using every 16MHz by hardware realization
It is a, when scanning element is fallen in the range of this, offset data is directly called out of memory, is improved by increasing calibration points
Compensation precision.
Brief description of the drawings
The accompanying drawings which form a part of this application are used for providing further understanding of the present application, and the application's shows
Meaning property embodiment and its explanation are used to explain the application, do not form the improper restriction to the application.
Fig. 1 is disclosed by the embodiments of the present invention to be based on vector network analyzer signal power characteristic compensation method alignment mistake
Journey flow chart；
Fig. 2 is disclosed by the embodiments of the present invention based on scanned in vector network analyzer signal power characteristic compensation method
Journey flow chart.
Embodiment
It is noted that described further below is all illustrative, it is intended to provides further instruction to the application.It is unless another
Indicate, all technical and scientific terms used herein has usual with the application person of an ordinary skill in the technical field
The identical meanings of understanding.
It should be noted that term used herein above is merely to describe embodiment, and be not intended to restricted root
According to the illustrative embodiments of the application.As used herein, unless the context clearly indicates otherwise, otherwise singulative
It is also intended to include plural form, additionally, it should be understood that, when in the present specification using term "comprising" and/or " bag
Include " when, it indicates existing characteristics, step, operation, device, component and/or combinations thereof.
As background technology is introduced, software interpolation method, which exists, in the prior art adds sweep time and compensation essence
The deficiency of difference is spent, in order to solve technical problem as above, present applicant proposes a kind of signal work(based on vector network analyzer
Rate characteristic compensation method and device.
Embodiment one
The purpose of the present embodiment is to propose a kind of signal power characteristic compensation method based on vector network analyzer, the party
Method includes calibration process and scanning process.
1st, calibration process
It is the calibration process flow chart of signal power characteristic compensation as shown in Figure 1.During calibration, whole scanning range is divided into
Four to five frequency ranges, select the middle frequency point of each frequency range that 12 DAC are arranged to 0 and 4095 respectively, are read as calibration benchmark
To power evaluation be the adjustable performance number of minimum and maximum, power is obtained by calculation and often changes DAC needed for 1dB
Value, then carries out the calibration of power every 16MHz selection frequency points since initial frequency, first reads the performance number of the point, Ran Houtong
DAC value required when being calculated the power back-off to setting value is crossed, DAC value addition circuit is verified, if full
Sufficient error requirements are then saved in memory, are unsatisfactory for, and continue adjustment untill satisfaction.Its detailed process is：
Step 101：Scanning range is divided into multiple frequency ranges at equal intervals, and calculates the adjustable power bracket of compensation circuit.
Whole scanning range is divided into multiple frequency ranges at equal intervals, selects the middle frequency point of each frequency range as calibration base
It is accurate；DAC value is arranged to 0 and 4095 respectively, is read when DAC value is 0, minimum adjustable power value；When DAC value is 4095
When, maximum adjustable power value；One set value of the power is determined by vector network analyzer；Using set value of the power as compensation
Target, will deviate from the certain error range of set value of the power as compensation threshold values.
Meanwhile also calculating power often changes the DAC value needed for 1dB
Step 102：Gather each point in each frequency range does not compensate performance number P1, and calculates and each do not compensate performance number compensation
Required DAC value during to setting power.
Vector network analyzer gathers the uncompensated performance number of present frequency point by connecting power meter；Often become according to power
Change DAC value required during 1dB, calculate DAC value required when this does not compensate performance number compensation to setting power；In current frequency
On the basis of plus 16MHz obtain the frequency of subsequent point, calculate the uncompensated performance number P1 of frequency of the point again；It is every according to power
Change DAC value required during 1dB, calculate DAC value required when this does not compensate performance number compensation to setting power, it is whole until obtaining
Required DAC value, will be sent in CPLD in DAC value, passes through when the frequency compensation of all the points is to setting power in a frequency band
CPLD is sent in compensation circuit.
Step 103：DAC value is converted to magnitude of voltage and carries out power adjustment, obtained by compensation circuit according to the DAC value received
Performance number P2 after to adjustment.
In compensation circuit, DAC value is converted into by magnitude of voltage by DA conversions and carries out power adjustment, passes through vector network point
Analyzer reads the performance number P2 after adjustment.
Step 104：Whether the performance number P2 after verification adjustment meets expected compensation threshold value, if not satisfied, then calculating again
DAC value, and send it in compensation circuit, adjusted again, until meeting expected compensation threshold value.
When the performance number after adjustment with set value of the power error when less than performance number threshold value, then meet the requirements；Otherwise
It is unsatisfactory for requiring, often changes the error of DAC value required during 1dB and performance number with set value of the power according to power, correcting should
Required DAC value when performance number compensation is to setting value, and revised DAC value is sent into compensation circuit, adjusted again
It is whole, until meeting expected compensation threshold value.
Step 105：DAC value after power adjustment is stored into memory.
2nd, scanning process
It is illustrated in figure 2 the scanning process flow chart of signal power characteristic compensation.During scanning, starting point is first sent to CPLD
Frequency and scanning stepping, CPLD, by the frequency divided by 16MHz and then rounding, be compensated data after initial frequency is connected to
Storage location, then by data call from storage chip, add in summation compensation circuit, the power of so point is just mended
Repay, meanwhile, CPLD can add stepping data in initial frequency, find the frequency of next scanning element, when being connected to trigger signal
When, above calculating process is repeated, searches the offset data of the point, until whole band scan is completed, second of scanning starts soft
Part can resend initial frequency and stepping.Its detailed process is：
Step 201：CPLD receives the initial frequency sent from vector network analyzer and step frequency；
Step 202：By current frequency divided by step frequency, and rounding, DAC value should be compensated in memory by obtaining the frequency
Storage address；
Step 203：Read the DAC value of storage and be output in compensation circuit；
Step 204：Compensation circuit carries out the power back-off of present frequency point according to DAC value, while in the base of current frequency
Step frequency is added on plinth, obtains the frequency values of next scanning element；
Step 205：Judge whether to receive trigger signal, if receiving trigger signal, repeat step 2.2-2.4；It is no
Then, then power back-off is completed.
Embodiment two
A kind of signal power characteristic compensation device based on vector network analyzer is present embodiments provided, which includes
Vector network analyzer, CPLD, memory and compensation circuit.
The vector network analyzer is connected with power meter and gathers each uncompensated performance number of Frequency point, and calculating does not compensate
Performance number compensate required DAC value during to setting value, and be sent to CPLD；DAC value is sent to compensation circuit by the CPLD
In；The compensation circuit is changed by DA the DAC value received being converted to magnitude of voltage progress power adjustment；The memory is deposited
Store up the DAC value after power adjustment.
Initial frequency and step frequency are sent to CPLD by the vector network analyzer；The CPLD is by the frequency of scanning element
Rate divided by step frequency, and rounding, the storage address of DAC value in memory should be compensated by obtaining the frequency, read the DAC of storage
It is worth and is output in compensation circuit；The compensation circuit carries out power back-off according to the DAC value received.
Wherein, the compensation circuit includes the D/A converter of 12 and corresponding peripheral amplifier, passes through D/A conversion chips
DAC data are converted into voltage, then after peripheral amplifier reversely amplify, by voltage output to voltage-controlled attenuator, so that
Adjust changed power.
It can be seen from the above description that the application the above embodiments realize following technique effect：
(1) present invention adds the DAC circuit of one 12 in compensation circuit, can be by setting suitable DAC to work(
Rate is adjusted, and data are stored and reading is changed to hardware realization, the time of software calculating is avoided, improves sweep speed,
The point of calibration is relatively more at the same time, equally improves compensation precision；
(2) present invention by offset data by being stored in hardware and by hardware realization power back-off function, by software
The part of calculating reduces the time of calculating, improves sweep speed, while calibrate one using every 16MHz by hardware realization
It is a, when scanning element is fallen in the range of this, offset data is directly called out of memory, is improved by increasing calibration points
Compensation precision.
Although above-mentioned be described the embodiment of the present invention with reference to attached drawing, model not is protected to the present invention
The limitation enclosed, those skilled in the art should understand that, on the basis of technical scheme, those skilled in the art are not
Need to make the creative labor the various modifications that can be made or deformation still within protection scope of the present invention.
Claims (9)
1. a kind of signal power characteristic compensation method based on vector network analyzer, it is characterized in that, comprise the following steps：
Step 1：The uncompensated performance number of each Frequency point is gathered, it is required when calculating uncompensated performance number compensation to setting power
DAC value, according to DAC value carry out power adjustment, and by DAC value storage into memory；
Step 2：According to current frequency and step frequency, the storage location of the DAC value needed for current frequency compensation is obtained, from storage
The DAC value is read in device, and is output in compensation circuit and carries out power back-off.
2. the signal power characteristic compensation method according to claim 1 based on vector network analyzer, it is characterized in that, institute
State in step 1, gather the uncompensated performance number of each Frequency point, it is required when calculating uncompensated performance number compensation to setting value
DAC value, power adjustment is carried out according to DAC value, and by DAC value storage into memory, including：
Step 1.1：Scanning range is divided into multiple frequency ranges at equal intervals, and calculates the adjustable power bracket of compensation circuit；
Step 1.2：Gather each point in each frequency range does not compensate performance number, and calculates and each do not compensate performance number compensation to setting
Required DAC value during power；
Step 1.3：DAC value is converted to magnitude of voltage and carries out power adjustment, adjusted by compensation circuit according to the DAC value received
Performance number after whole；
Step 1.4：Whether the performance number after verification adjustment meets expected compensation threshold value, if not satisfied, DAC value is then calculated again,
And return to step 1.3；If satisfied, then enter step 1.5；
Step 1.5：By DAC value storage into memory.
3. the signal power characteristic compensation method according to claim 2 based on vector network analyzer, it is characterized in that, institute
State and scanning range is divided into multiple frequency ranges at equal intervals, and calculate the adjustable power bracket of compensation circuit, including：
Whole scanning range is divided into multiple frequency ranges at equal intervals, selects the middle frequency point of each frequency range as calibration benchmark；
DAC value is arranged to 0 and 4095 respectively, is read when DAC value is 0, minimum adjustable power value；When DAC value is 4095
When, maximum adjustable power value；
Vector network analyzer determines a set value of the power；
Using set value of the power as compensation target, the certain error range of set value of the power is will deviate from as compensation threshold values.
4. the signal power characteristic compensation method according to claim 2 based on vector network analyzer, it is characterized in that,
After calculating adjustable power bracket, also calculating power often changes the DAC value needed for 1dB.
5. the signal power characteristic compensation method according to claim 2 based on vector network analyzer, it is characterized in that, institute
That states each point in each frequency range of collection does not compensate performance number, and calculates each required when not compensating performance number compensation to setting power
DAC value, including：
(1) vector network analyzer gathers the uncompensated performance number of present frequency point by connecting power meter；
(2) often change DAC value required during 1dB according to power, calculate required when this does not compensate performance number compensation to setting power
DAC value；
(3) on the basis of current frequency the frequency of subsequent point is worth to plus a fixed frequency, repeat step (1)-(2), directly
To DAC value required when obtaining the frequency compensation of all the points in whole frequency band to setting power.
6. the signal power characteristic compensation method according to claim 2 based on vector network analyzer, it is characterized in that, institute
State whether the performance number after verification adjustment reaches performance number threshold value, including：
When the performance number after adjustment with set value of the power error when less than performance number threshold value, then meet the requirements；Otherwise it is discontented with
Foot requires, and often changes the error of DAC value required during 1dB and performance number with set value of the power according to power, corrects the power
Value complement repays DAC value required during setting value, and revised DAC value is sent into compensation circuit, is adjusted again, directly
To the expected compensation threshold value of satisfaction.
7. the signal power characteristic compensation method according to claim 1 based on vector network analyzer, it is characterized in that, institute
State in step 2, according to current frequency and step frequency, the storage location of the DAC value needed for current frequency compensation is obtained, from storage
The DAC value is read in device, and is output in compensation circuit and carries out power back-off, including：
Step 2.1：CPLD receives the initial frequency sent from vector network analyzer and step frequency；
Step 2.2：By current frequency divided by step frequency, and rounding, required DAC value should be compensated in memory by obtaining the frequency
In storage location；
Step 2.3：Read the DAC value of storage and be output in compensation circuit；
Step 2.4：Compensation circuit carries out the power back-off of present frequency point according to DAC value, while on the basis of current frequency
Plus step frequency, the frequency values of next scanning element are obtained；
Step 2.5：Judge whether to receive trigger signal, if receiving trigger signal, repeat step 2.2-2.4；Otherwise, then
Complete power back-off.
8. a kind of signal power characteristic compensation device based on vector network analyzer, it is characterized in that, including vector network analysis
Instrument, CPLD, memory and compensation circuit；
The vector network analyzer is connected with power meter, and for gathering the uncompensated performance number of each Frequency point, calculating is not mended
The performance number repaid DAC value required when compensating to setting value, and it is sent to CPLD；
The CPLD, for DAC value to be sent in compensation circuit；
The compensation circuit, power adjustment is carried out for the DAC value received to be converted to magnitude of voltage by DA conversions；
The memory, the DAC value after being adjusted for storage power.
9. the signal power characteristic compensation device according to claim 8 based on vector network analyzer, it is characterized in that, institute
State vector network analyzer and initial frequency and step frequency are sent to CPLD；The CPLD is by the frequency of scanning element divided by stepping
Frequency, and rounding, the storage address of DAC value in memory should be compensated by obtaining the frequency, read the DAC value of storage and be output to
In compensation circuit；The compensation circuit carries out power back-off according to the DAC value received.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112804014A (en) * | 2020-12-28 | 2021-05-14 | 上海创远仪器技术股份有限公司 | Method for realizing high-power range precision calibration of port power for vector network analyzer |
| CN114337860A (en) * | 2022-01-07 | 2022-04-12 | 中电科思仪科技股份有限公司 | Power calibration optimization method and system of signal generation device |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN88100509A (en) * | 1987-01-29 | 1988-08-10 | 约翰弗兰克制造公司 | The apparatus and method of correcting electric measuring calibrating device internally |
| JP2003018104A (en) * | 2001-07-02 | 2003-01-17 | Anritsu Corp | Mobile terminal test system and correction method of signal |
| US20040220766A1 (en) * | 2003-04-01 | 2004-11-04 | Harbord Philip James | Method and apparatus for generating an electronic test signal |
| CN102891656A (en) * | 2012-06-27 | 2013-01-23 | 中国电子科技集团公司第四十一研究所 | Internal detection based automatic calibrating method for broadband signal open loop power |
| CN103543426A (en) * | 2013-10-28 | 2014-01-29 | 中国电子科技集团公司第四十一研究所 | Interpolating compensation method for each-band calibration of network analyzer |
| CN104503533A (en) * | 2014-10-13 | 2015-04-08 | 中国电子科技集团公司第四十一研究所 | Automatic power linearity calibration method based on signal generator |
| CN105162459A (en) * | 2015-09-08 | 2015-12-16 | 四川九洲电器集团有限责任公司 | Power calibration method and system of DDS (Direct Digital Synthesizer) broadband signal source |
| CN105259528A (en) * | 2015-11-11 | 2016-01-20 | 中国电子科技集团公司第四十一研究所 | Internal calibration circuit of microwave power probe and calibration method |
| CN106483486A (en) * | 2016-11-15 | 2017-03-08 | 中国电子科技集团公司第四十研究所 | A kind of continuous wave power probe power calibration system and method |
-
2017
- 2017-11-20 CN CN201711156615.3A patent/CN107976646B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN88100509A (en) * | 1987-01-29 | 1988-08-10 | 约翰弗兰克制造公司 | The apparatus and method of correcting electric measuring calibrating device internally |
| JP2003018104A (en) * | 2001-07-02 | 2003-01-17 | Anritsu Corp | Mobile terminal test system and correction method of signal |
| US20040220766A1 (en) * | 2003-04-01 | 2004-11-04 | Harbord Philip James | Method and apparatus for generating an electronic test signal |
| CN102891656A (en) * | 2012-06-27 | 2013-01-23 | 中国电子科技集团公司第四十一研究所 | Internal detection based automatic calibrating method for broadband signal open loop power |
| CN103543426A (en) * | 2013-10-28 | 2014-01-29 | 中国电子科技集团公司第四十一研究所 | Interpolating compensation method for each-band calibration of network analyzer |
| CN104503533A (en) * | 2014-10-13 | 2015-04-08 | 中国电子科技集团公司第四十一研究所 | Automatic power linearity calibration method based on signal generator |
| CN105162459A (en) * | 2015-09-08 | 2015-12-16 | 四川九洲电器集团有限责任公司 | Power calibration method and system of DDS (Direct Digital Synthesizer) broadband signal source |
| CN105259528A (en) * | 2015-11-11 | 2016-01-20 | 中国电子科技集团公司第四十一研究所 | Internal calibration circuit of microwave power probe and calibration method |
| CN106483486A (en) * | 2016-11-15 | 2017-03-08 | 中国电子科技集团公司第四十研究所 | A kind of continuous wave power probe power calibration system and method |
Non-Patent Citations (2)
| Title |
|---|
| 杨永军 等: "基于开环功率补偿的窄脉冲调制信号稳幅技术", 《科技视界》 * |
| 胡丽娟: "宽带信号开环功率补偿软件设计方法研究", 《电子科学技术》 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112804014A (en) * | 2020-12-28 | 2021-05-14 | 上海创远仪器技术股份有限公司 | Method for realizing high-power range precision calibration of port power for vector network analyzer |
| CN112804014B (en) * | 2020-12-28 | 2023-01-31 | 上海创远仪器技术股份有限公司 | Method for realizing high-power range precision calibration of port power for vector network analyzer |
| CN114337860A (en) * | 2022-01-07 | 2022-04-12 | 中电科思仪科技股份有限公司 | Power calibration optimization method and system of signal generation device |
| CN114337860B (en) * | 2022-01-07 | 2023-09-26 | 中电科思仪科技股份有限公司 | Power calibration optimization method and system of signal generating device |
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