CN107976597A - A kind of surge test circuit - Google Patents

A kind of surge test circuit Download PDF

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Publication number
CN107976597A
CN107976597A CN201711209129.3A CN201711209129A CN107976597A CN 107976597 A CN107976597 A CN 107976597A CN 201711209129 A CN201711209129 A CN 201711209129A CN 107976597 A CN107976597 A CN 107976597A
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CN
China
Prior art keywords
resistance
capacitance
pin
test circuit
surge test
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Pending
Application number
CN201711209129.3A
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Chinese (zh)
Inventor
张坤
许传停
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Amlogic Shanghai Co Ltd
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Amlogic Shanghai Co Ltd
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Priority to CN201711209129.3A priority Critical patent/CN107976597A/en
Publication of CN107976597A publication Critical patent/CN107976597A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Emergency Protection Circuit Devices (AREA)

Abstract

The present invention provides a kind of surge test circuit, belong to ethernet technology field, remove the first bi-directional voltage stabilizing diode and the second bi-directional voltage stabilizing diode of the dedicated Anti-surging differential mode of existing surge test circuit, while add the tenth resistance, the 11st resistance, the 12nd resistance and the 13rd resistance and hindered as string.Beneficial effects of the present invention:By the first bi-directional voltage stabilizing diode and the second bi-directional voltage stabilizing diode that remove dedicated Anti-surging differential mode, the tenth resistance, the 11st resistance, the 12nd resistance and the 13rd resistance is added at the same time to hinder as string, improve and suppress differential mode effect, simplify circuit design, circuit cost is reduced, reduces and takes pcb board area.

Description

A kind of surge test circuit
Technical field
The present invention relates to ethernet technology field, more particularly to a kind of surge test circuit.
Background technology
The International or National test request of Ethernet surge is stringenter.Such as:Telecommunication standard surge common mode 3KV& It is 18.125ohm (equivalent:8 25ohm parallel connections outside instrument internal resistance 15ohm+), differential mode 1.5KV&40ohm etc.;Substantially using it is low into This & large scale transformers;PCB surface product is smaller, main it is difficult to ensure that primary signal wire arrives after Bob smith circuit fabric swatch The safe surge distances of GND;
Industry common practice includes increasing by 2 2KV high using the measured small size transformer of matter, Bob smith circuits Voltage capacitance (or gas-discharge tube), the professional lightning protection component of increase and EMI elements.Three of the above way be required for increase circuit into This.
As shown in Figure 1, be surge test circuit of the prior art, the surge test circuit have current input terminal and Current output terminal, current input terminal include electrode input end A+ and negative input A-, and current output terminal includes cathode output end B + and cathode output end B-, wherein, power input termination power supply, power output end connects the power supply module of equipment under test.Surge Test circuit includes RJ45, network transformer chip and Bob smith circuits, wherein, RJ45 is connected by network transformer chip Connect equipment under test, RJ45 is the same as being connected with Bob smith circuits between network transformer chip.
With continued reference to Fig. 1, network transformer chip pin is defined as follows:TD+ pins send for positive signal and are also cathode Signal sends pin, TD- pins are that negative signal transmission also makes negative signal send pin, RD+ pins are that positive signal receives It is called positive signal reception pin, RD- is received for negative signal and is called negative signal reception pin, the TD of network transformer chip + pin connects power output end B+ with TD- pins, specifically, TD+ pins are by first resistor R1 connection power output end B+, TD- pins are by second resistance R2 connection power output end B+, and parallel connection one first is two-way steady between TD+ pins and TD- pins Press two the first capacitance of capacitance C1 being arranged in series of both ends parallel connection, the second electricity of diode D1, the first bi-directional voltage stabilizing diode D1 The common node ground connection of appearance C2, the first capacitance C1 and the second capacitance C2, the second capacitance C2 and the first bi-directional voltage stabilizing diode D1's Common node connection power output end B+;
The TCT pins connection power output end B- of network transformer chip, and two by being sequentially connected in series capacitances the 4th The common node ground connection of capacitance C4, the 3rd capacitance C3 connections power output end B-, the 4th capacitance C4 and the 3rd C3;
The RCT pins connection power output end B+ of network transformer chip, and two by being sequentially connected in series capacitances the 3rd Capacitance C3, the 4th capacitance C4 connection power output ends B-;
One second bi-directional voltage stabilizing diode in parallel, RD+ pins between the RD+ pins and RD- pins of network transformer chip Also by the 4th resistance R4 connections power output end B+, RD- pin also by 3rd resistor R3 connection power output ends B-, second The both ends of bi-directional voltage stabilizing diode are parallel with two the 5th capacitance C5, the 6th capacitance C6 being arranged in series, the 5th capacitance C5 and The common node ground connection of six capacitance C6;
With continued reference to Fig. 1, Bob smith circuits include the 7th capacitance C7, the 7th capacitance C7 one end ground connection, other end connection 8th capacitance C8, the 7th capacitance C7 both ends are also parallel with the 5th resistance R5, the 8th capacitance C8 other ends respectively by the 6th resistance The RCM pins of R6 connection network transformer chips, by the RX- pins of the 7th resistance R7 connection network transformer chips, pass through The 4th pin and the 5th pin, the 7th pin and the 8th by the 9th resistance R9 connections RJ45 of 8th resistance R8 connections RJ45 Pin;
With continued reference to Fig. 1, RJ45 pins are defined as follows:TX+ pins also make data sending anode draw for data sending anode Foot, TX- pins are that to be also data sending negative terminal pin, RX+ pins be that data receiver anode also makes data connect to data sending negative terminal Receive anode pin, RX- also makes data receiver negative terminal pin, the 4th, 5,7,8 pins be left gigabit networking for data receiver negative terminal Using being also fourth, fifth, seven, eight pins;In surge test circuit, the TX pins connection electrode input end A+ of RJ5 chips, 1 pin of TX- pins connection negative input A-, SHIELD is connected with 2 pins of SHIELD and is all grounded.
As shown in Figure 1, surge test circuit of the prior art suppresses, differential mode effect is poor, circuit design is complex, Circuit cost is higher, and it is larger to take pcb board area.
The content of the invention
For problems of the prior art, it can be improved the present invention provides one kind and suppress differential mode effect, simplify electricity Road is designed, and reduces circuit cost, reduces the surge test circuit for taking pcb board area.The present invention adopts the following technical scheme that:
A kind of surge test circuit, the surge test circuit have current input terminal and current output terminal, electric current input End includes electrode input end and negative input, and current output terminal includes cathode output end and cathode output end, and the electric current is defeated Enter and terminate power supply, the current output terminal connects the power supply module of equipment under test, and the surge test circuit includes RJ45, net Network transformer chip and Bob smith circuits, the RJ45 connect the power supply, and the RJ45 passes through the Bob smith Circuit connects the network transformer chip and connects the power supply module, the data of the RJ45 by the network transformer chip Anode pin connects the electrode input end, data sending negative terminal pin connects the negative input for transmission;
The positive signal of the network transformer chip sends pin and negative signal sends two strings in parallel between pin Join the first capacitance and the second capacitance set, the common node ground connection of first capacitance and the second capacitance, the positive signal Send pin and the cathode output end is connect by the tenth resistance and first resistor of sequential series, the negative signal sends pin The cathode output end is connect by the 11st resistance and second resistance of sequential series;
The positive signal of the network transformer chip receives pin and negative signal receives two strings in parallel between pin Join the 5th capacitance and the 6th capacitance set, the common node ground connection of the 5th capacitance and the 6th capacitance, the positive signal Receive pin and the cathode output end is connect by the 12nd resistance of sequential series and the 4th resistance, the negative signal, which receives, to be drawn Foot connects the cathode output end by the 13rd resistance and 3rd resistor of sequential series.
Preferably, the resistance value scope of the tenth resistance is the Ω of 1 Ω≤R10≤30.
The resistance value scope of 11st resistance is the Ω of 1 Ω≤R11≤30.
Preferably, the resistance value scope of the 12nd resistance is the Ω of 1 Ω≤R12≤30.
Preferably, the resistance value scope of the 13rd resistance is the Ω of 1 Ω≤R13≤30.
Preferably, the TCT pins of the network transformer chip connect the cathode output end, and pass through sequential series Four capacitances and the 3rd capacitance connect the cathode output end, the common node ground connection of the 4th capacitance and the 3rd capacitance.
Preferably, the Bob smith circuits include:
7th capacitance, one end ground connection of the 7th capacitance, one end of the 8th capacitance of another termination;
5th resistance, the 5th resistor coupled in parallel is at the both ends of the 7th capacitance;
6th resistance, the 6th resistance one terminate the other end of the 8th capacitance, the other end of the 6th resistance Connect the RCM pins of the network transformer chip;
7th resistance, the other end of termination the 8th capacitance of the 7th resistance, the 7th resistance it is another Terminate the TCM pins of the network transformer chip;
8th resistance, the other end of termination the 8th capacitance of the 8th resistance, the 8th resistance it is another Terminate the 4th pin and the 5th pin of the RJ45;
9th resistance, the other end of termination the 8th capacitance of the 9th resistance, the 9th resistance it is another Terminate the 7th pin and the 8th pin of the RJ45.
Preferably, 1 pins of SHIELD of the RJ45 are connected with 2 pins of SHIELD and are grounded respectively.
Beneficial effects of the present invention:By remove dedicated Anti-surging differential mode the first bi-directional voltage stabilizing diode and second pair To zener diode, while add the tenth resistance, the 11st resistance, the 12nd resistance and the 13rd resistance and hindered as string, improve Suppress differential mode effect, simplify circuit design, reduce circuit cost, reduce and take pcb board area.
Brief description of the drawings
Fig. 1 is the circuit diagram of surge test circuit in the prior art;
Fig. 2 is the circuit diagram of surge test circuit in a preferred embodiment of the present invention.
Embodiment
It should be noted that in the case where there is no conflict, following technical proposals, can be mutually combined between technical characteristic.
The embodiment of the present invention is further described below in conjunction with the accompanying drawings:
As shown in Fig. 2, a kind of surge test circuit, there is the surge test circuit current input terminal and electric current to export End, current input terminal include electrode input end A+ and negative input A-, and current output terminal includes cathode output end B+ and anode Output terminal B-, the current input terminal connect power supply, and the current output terminal connects the power supply module of equipment under test, the surge Test circuit includes RJ45, network transformer chip and Bob smith circuits, and the RJ45 connects the power supply, described RJ45 connects the network transformer chip by the Bob smith circuits and connects the confession by the network transformer chip Electric module, the data sending anode pin TX+ of the RJ45 meets the electrode input end A+, data sending negative terminal TX- pins connect The negative input A-;The positive signal of the network transformer chip sends pin TD+ and negative signal sends pin TD- Between two the first capacitance C1 being arranged in series of parallel connection and the second capacitance C2, the first capacitance C1 and the second capacitance C2 it is public Node is grounded, and the positive signal transmission pin TD+ is connect described by the tenth resistance R10 and first resistor RA1 of sequential series Cathode output end B+, the negative signal send pin TD- and are connect by the 11st resistance R11 and second resistance R2 of sequential series The cathode output end B+;
The positive signal of the network transformer chip receives pin RD+ and negative signal receives parallel connection between pin RD- Two the 5th capacitance C5 and the 6th capacitance C6 being arranged in series, the common node of the 5th capacitance C5 and the 6th capacitance C6 connect Ground, the positive signal receive pin RD+ and connect the cathode by the 12nd resistance R12 of sequential series and the 4th resistance R14 Output terminal B+, the negative signal reception pin RD- are connect described by the 13rd resistance R13 and 3rd resistor R3 of sequential series Cathode output end B+.
In the present embodiment, it is two-way steady by the first bi-directional voltage stabilizing diode and second that remove dedicated Anti-surging differential mode Diode is pressed, while adds the tenth resistance R10, the 11st resistance, R11 the 12nd resistance R12 and the 13rd resistance R13 as string Resistance, improves and suppresses differential mode effect, simplifies circuit design, reduces circuit cost, reduces and takes pcb board area.
In preferred embodiment, the resistance value scope of the tenth resistance R10 is the Ω of 1 Ω≤R10≤30.
In preferred embodiment, the resistance value scope of the 11st resistance R11 is the Ω of 1 Ω≤R11≤30.
In preferred embodiment, the resistance value scope of the 12nd resistance R12 is the Ω of 1 Ω≤R12≤30.
In preferred embodiment, the resistance value scope of the 13rd resistance R13 is the Ω of 1 Ω≤R13≤30.
In preferred embodiment, the TCT pins of the network transformer chip meet the cathode output end B-, and by suitable The 4th capacitance C4 and the 3rd capacitance C3 of sequence series connection meet the cathode output end B+, the 4th capacitance C4's and the 3rd capacitance C3 Common node is grounded.
In preferred embodiment, the Bob smith circuits include:
One end ground connection of 7th capacitance C7, the 7th capacitance C7, one end of the 8th capacitance C8 of another termination;
5th resistance R5, the 5th resistance R5 are connected in parallel on the both ends of the 7th capacitance C7;
6th resistance R6, the 6th resistance R6 mono- terminate the other end of the 8th capacitance C8, the 6th resistance R6 Another termination network transformer chip RCM pins;
The other end of termination a 8th capacitance C8 of 7th resistance R7, the 7th resistance R7, the 7th resistance The TCM pins of another termination network transformer chip of R7;
The other end of termination a 8th capacitance C8 of 8th resistance R8, the 8th resistance R8, the 8th resistance The 4th pin and the 5th pin of another termination RJ45 of R8;
9th resistance, the other end of termination a 8th capacitance C8 of the 9th resistance R9, the 9th resistance R9 Another termination RJ45 the 7th pin and the 8th pin.
In preferred embodiment, 1 pins of SHIELD of the RJ45 are connected with 2 pins of SHIELD and are grounded respectively.
In a specific embodiment, the surge differential mode test method based on surge test circuit is as follows:
RJ45 signals are symmetrical differential signals, differential pair:pin 1&2;pin3&6;pin4&5;pin7&8;
Pin4&5 is not required in 100M Ethernets;Pin7&8, is typically designed as being connected to GND by 75ohm;
The pin1&2 surges of RJ45 introduce test method by taking telecommunication standard as an example:10/700uS surging signals generator is just The pin2 of the pin1& anode connection RJ45 of pole connection RJ45, it is 1.5KV that surge generator, which sets output voltage, and instrument internal resistance is set 40ohm is set to, time interval is less than 30S/ times, positive and negative each 5 times;Test completion, which is followed by cable, ping to lead to (no sparking) automatically
Differential mode surge suppresses principle:
Surge suppression principle is introduced by taking the pin1&2 Surge suppressions of RJ45 as an example:
Surging signal generator differential signal -->It is connected to the pin1&2-- of RJ45>Network transformer primary pin16& pin14-->It is coupled to network transformer secondary pin1&pin3--->R10&R11--->PHY chip (S905L);
Suppress principle:Increase R10&R11 resistance, the consumption of surge main energetic is allowed on R10&R11 resistance, so as to effectively protect Protect PHY chip (S905L).
By explanation and attached drawing, the exemplary embodiments of the specific structure of embodiment are given, it is smart based on the present invention God, can also make other conversions.Although foregoing invention proposes existing preferred embodiment, however, these contents are not intended as Limitation.
For a person skilled in the art, after reading described above, various changes and modifications undoubtedly will be evident. Therefore, appended claims should regard whole variations and modifications of the true intention and scope that cover the present invention as.Weighing Any and all scope and content of equal value, are all considered as still belonging to the intent and scope of the invention in the range of sharp claim.

Claims (8)

1. a kind of surge test circuit, the surge test circuit has current input terminal and current output terminal, current input terminal Including electrode input end and negative input, current output terminal includes cathode output end and cathode output end, the electric current input Power supply is terminated, the current output terminal connects the power supply module of equipment under test, and the surge test circuit includes RJ45, network Transformer chip and Bob smith circuits, the RJ45 connect the power supply, and the RJ45 passes through Bob smith electricity Road connects the network transformer chip and connects the power supply module, the data hair of the RJ45 by the network transformer chip Send that anode pin connects the electrode input end, data sending negative terminal pin connects the negative input;It is characterized in that,
The positive signal of the network transformer chip sends two series connection in parallel between pin and negative signal transmission pin and sets The first capacitance and the second capacitance put, the common node ground connection of first capacitance and the second capacitance, the positive signal are sent Pin connects the cathode output end by the tenth resistance and first resistor of sequential series, and the negative signal sends pin and passes through The 11st resistance and second resistance of sequential series connect the cathode output end;
The positive signal of the network transformer chip receives two series connection in parallel between pin and negative signal reception pin and sets The 5th capacitance put and the 6th capacitance, the common node ground connection of the 5th capacitance and the 6th capacitance, the positive signal receive Pin connects the cathode output end by the 12nd resistance of sequential series and the 4th resistance, and the negative signal receives pin and leads to The 13rd resistance and 3rd resistor for crossing sequential series connect the cathode output end.
2. surge test circuit according to claim 1, it is characterised in that the resistance value scope of the tenth resistance is 1 Ω≤R10≤30Ω。
3. surge test circuit according to claim 1, it is characterised in that the resistance value scope of the 11st resistance is 1Ω≤R11≤30Ω。
4. surge test circuit according to claim 1, it is characterised in that the resistance value scope of the 12nd resistance is 1Ω≤R12≤30Ω。
5. surge test circuit according to claim 1, it is characterised in that the resistance value scope of the 13rd resistance is 1Ω≤R13≤30Ω。
6. surge test circuit according to claim 1, it is characterised in that the TCT pins of the network transformer chip Connect the cathode output end, and the cathode output end is connect by the 4th capacitance of sequential series and the 3rd capacitance, the described 4th The common node of capacitance and the 3rd capacitance is grounded.
7. surge test circuit according to claim 1, it is characterised in that the Bob smith circuits include:
7th capacitance, one end ground connection of the 7th capacitance, one end of the 8th capacitance of another termination;
5th resistance, the 5th resistor coupled in parallel is at the both ends of the 7th capacitance;
6th resistance, the 6th resistance one terminate the other end of the 8th capacitance, another termination institute of the 6th resistance State the RCM pins of network transformer chip;
7th resistance, the other end of termination the 8th capacitance of the 7th resistance, another termination of the 7th resistance The TCM pins of the network transformer chip;
8th resistance, the other end of termination the 8th capacitance of the 8th resistance, another termination of the 8th resistance The 4th pin of the RJ45 and the 5th pin;
9th resistance, the other end of termination the 8th capacitance of the 9th resistance, another termination of the 9th resistance The 7th pin of the RJ45 and the 8th pin.
8. surge test circuit according to claim 1, it is characterised in that 1 pins of SHIELD of the RJ45 and 2 pins of SHIELD are connected and are grounded respectively.
CN201711209129.3A 2017-11-27 2017-11-27 A kind of surge test circuit Pending CN107976597A (en)

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Application Number Priority Date Filing Date Title
CN201711209129.3A CN107976597A (en) 2017-11-27 2017-11-27 A kind of surge test circuit

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Application Number Priority Date Filing Date Title
CN201711209129.3A CN107976597A (en) 2017-11-27 2017-11-27 A kind of surge test circuit

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Publication Number Publication Date
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Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201097449Y (en) * 2007-06-12 2008-08-06 中兴通讯股份有限公司 A lightning prevention Ethernet port circuit
CN201278411Y (en) * 2008-08-13 2009-07-22 中兴通讯股份有限公司 Ethernet connector with lightning protection function
CN203596614U (en) * 2013-11-08 2014-05-14 深圳市共进电子股份有限公司 Lightning protection circuit for PSE (Power Source Equipment) multiport equipment
CN204068243U (en) * 2014-07-14 2014-12-31 武汉迈威光电技术有限公司 A kind of industrial ethernet switch DC power supply surge protective circuit
CN106058838A (en) * 2016-08-11 2016-10-26 四川天邑康和通信股份有限公司 Ethernet internet access surge protection circuit
CN107017612A (en) * 2017-06-06 2017-08-04 广州海格通信集团股份有限公司 The protection against lightning surge circuit and its implementation of a kind of gigabit Ethernet mouthful
CN107070562A (en) * 2017-04-10 2017-08-18 晶晨半导体(上海)有限公司 A kind of circuit for improving network interface electromagnetic interference
CN206506293U (en) * 2017-03-06 2017-09-19 深圳市同为数码科技股份有限公司 A kind of lightning protection circuit of Ethernet interface
CN107820139A (en) * 2017-11-07 2018-03-20 晶晨半导体(上海)股份有限公司 A kind of network interface circuit

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201097449Y (en) * 2007-06-12 2008-08-06 中兴通讯股份有限公司 A lightning prevention Ethernet port circuit
CN201278411Y (en) * 2008-08-13 2009-07-22 中兴通讯股份有限公司 Ethernet connector with lightning protection function
CN203596614U (en) * 2013-11-08 2014-05-14 深圳市共进电子股份有限公司 Lightning protection circuit for PSE (Power Source Equipment) multiport equipment
CN204068243U (en) * 2014-07-14 2014-12-31 武汉迈威光电技术有限公司 A kind of industrial ethernet switch DC power supply surge protective circuit
CN106058838A (en) * 2016-08-11 2016-10-26 四川天邑康和通信股份有限公司 Ethernet internet access surge protection circuit
CN206506293U (en) * 2017-03-06 2017-09-19 深圳市同为数码科技股份有限公司 A kind of lightning protection circuit of Ethernet interface
CN107070562A (en) * 2017-04-10 2017-08-18 晶晨半导体(上海)有限公司 A kind of circuit for improving network interface electromagnetic interference
CN107017612A (en) * 2017-06-06 2017-08-04 广州海格通信集团股份有限公司 The protection against lightning surge circuit and its implementation of a kind of gigabit Ethernet mouthful
CN107820139A (en) * 2017-11-07 2018-03-20 晶晨半导体(上海)股份有限公司 A kind of network interface circuit

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