CN107911103B - 1MHz-6GHz signal generating circuit and method adopting full frequency division - Google Patents

1MHz-6GHz signal generating circuit and method adopting full frequency division Download PDF

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CN107911103B
CN107911103B CN201711280477.XA CN201711280477A CN107911103B CN 107911103 B CN107911103 B CN 107911103B CN 201711280477 A CN201711280477 A CN 201711280477A CN 107911103 B CN107911103 B CN 107911103B
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low
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CN107911103A (en
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高栋
段喜东
杨彪
刘金现
李原
刘琦
孟勇萍
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CETC 41 Institute
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals

Abstract

The invention provides a 1MHz-6GHz signal generating circuit adopting full frequency division, wherein an input 3GHz-6GHz signal generates a low-phase noise signal of 46.875MHz-6GHz after passing through a two-stage variable frequency division ratio frequency divider; the signal of 187.5MHz-6GHz frequency band enters the first series-parallel multi-way switch filtering unit through the first switch unit; and the signal of the 46.875MHz-187.5MHz frequency band enters the frequency division unit after passing through the first switch unit to generate an ultra-low phase noise signal of 1MHz-187.5MHz, then enters the second series-parallel multi-path switch filtering unit, and finally passes through the second switch unit and is combined with the 187.5MHz-6GHz low phase noise low harmonic signal to form the ultra-low phase noise ultra-low harmonic signal of 1MHz-6GHz for output. The invention realizes the ultra-low phase noise output covering the full frequency band of 1MHz-6GHz, and has smaller circuit area and better harmonic output index.

Description

1MHz-6GHz signal generating circuit and method adopting full frequency division
Technical Field
The invention relates to the field of signal generators, in particular to a 1MHz-6GHz signal generating circuit adopting full frequency division and a 1MHz-6GHz signal generating method adopting full frequency division.
Background
The radio frequency signal generator is one of important microwave measuring instruments, and with the development of modern communication technology, electronic countermeasure, radar systems and the like, higher and higher requirements are also put forward on the quality of signals generated by the signal generator, particularly phase noise and harmonic indexes of the signals. How to make signals in a wide frequency band, especially when the signal frequency is as low as 1MHz, and simultaneously ensure low phase noise and low harmonic output, is a difficult problem faced by the current radio frequency signal generator.
Most of existing radio frequency signal generators realize low-phase-noise and low-harmonic output by adopting a scheme of frequency division and switch filtering for signals above 250MHz, and output by adopting a frequency mixing mode for signals below 250MHz, as shown in fig. 1, the signal generator of the existing technical scheme comprises a frequency divider circuit 1-1 with variable frequency division ratio, a parallel multi-way switch filtering circuit 1-2, switch circuits 1-3 and 1-4 and a mixer circuit 1-5. According to the principle of frequency division, every time a signal is subjected to frequency division by two, the phase noise is optimized to be 6 dB. The signals below 250MHz are not subjected to frequency division filtering, the phase noise and the harmonic of the signals are not optimized, and low-phase-noise and low-harmonic signals below 250MHz cannot be output. Therefore, the scheme cannot realize the output of low-phase noise and low-harmonic signals covering the full frequency band of 1MHz-6 GHz.
In the prior art, 1MHz-250MHz signals are generated by mixing and are not subjected to frequency division filtering, so that phase noise and harmonics of the signals are not optimized, and low-phase noise and low-harmonic signals covering 1MHz-6GHz full frequency bands cannot be output; in addition, the switch filtering component of the existing scheme adopts a parallel switch filtering mode, and the circuit is complex and occupies a large area of a printed board due to the fact that the number of filters is large.
Disclosure of Invention
In order to solve the defects of the prior art, the invention provides a 1MHz-6GHz signal generating circuit and a method adopting full frequency division, and a full-band frequency division filtering scheme is adopted to realize low-phase noise and low-harmonic output covering the full band of 1MHz-6 GHz; in a low-frequency section, frequency division is carried out by utilizing the noise advantage of a D-type trigger to obtain a good phase noise index; aiming at the problems of complex form and large occupied size of a switch filter circuit, the invention provides a series-parallel hybrid switch filter scheme, which is used for multiplexing partial filters and reducing the circuit complexity and the circuit area; and because of the series connection form of the filter, the higher harmonics of the signal can be better inhibited, and the problem of reduced harmonic inhibition caused by the parasitic passband characteristic of the filter is solved.
The technical scheme of the invention is realized as follows:
a 1MHz-6GHz signal generating circuit using full frequency division, comprising:
the frequency divider comprises a first variable frequency dividing ratio frequency divider, a second variable frequency dividing ratio frequency divider, a first switch unit, a second switch unit, a first series-parallel multi-way switch filtering unit, a second series-parallel multi-way switch filtering unit and a frequency dividing unit formed by cascading multi-stage D-type triggers;
after the input 3GHz-6GHz signal passes through a two-stage 1/2/4/8 variable frequency division ratio frequency divider, a low-phase noise signal of 46.875MHz-6GHz is generated; signals of a 187.5MHz-6GHz frequency band enter the first series-parallel multi-way switch filtering unit through the first switch unit, and are output after passing through the second switch unit; and the signal of the 46.875MHz-187.5MHz frequency band enters the frequency division unit after passing through the first switch unit to generate an ultra-low phase noise signal of 1MHz-187.5MHz, then enters the second series-parallel multi-path switch filtering unit, and finally passes through the second switch unit and is combined with the 187.5MHz-6GHz low phase noise low harmonic signal to form the ultra-low phase noise ultra-low harmonic signal of 1MHz-6GHz for output.
Optionally, the frequency dividing unit is formed by connecting 6 stages of D-type flip-flops in series, each stage of D-type flip-flop realizes one-time frequency division by two, the D-type flip-flop cascade circuit is controlled by the switch array, an 1/2/4/8/16/32/64 seven-frequency division ratio mode is respectively realized, the inputted 46.875MHz-187.5MHz signal is correspondingly divided, and finally, the ultralow phase noise signal of 1MHz-187.5MHz is generated and outputted.
Optionally, the first series-parallel multi-way switch filtering unit and the second series-parallel multi-way switch filtering unit are formed by four groups of parallel serial filter banks through switch selection, wherein each group of serial filter banks is formed by connecting a plurality of filters with different filtering frequency bands in series, a switch array is used for controlling a series circuit of the filters, and the parallel connection among the filters is realized through a path through which a switch selection signal passes, so that the serial realization of filtering with different frequency bands is realized.
Optionally, signals in a frequency band of 187.5MHz-6GHz enter a first series-parallel multi-way switch filtering unit, the first series-parallel multi-way switch filtering unit comprises two parallel serial filter banks, one serial filter bank is selected through a switch, and a corresponding low-pass filter in the serial filter bank is selected through a switch array, so as to be combined into different filtering frequency bands;
the ultra-low phase noise signal of 1MHz-187.5MHz enters a second series-parallel multi-way switch filtering unit, the second series-parallel multi-way switch filtering unit comprises two parallel serial filter groups, one serial filter group is selected through a switch, and a corresponding low-pass filter in the serial filter group is selected through a switch array, so that different filtering frequency bands are combined.
Optionally, the filters in each serial filter bank are arranged in sequence from high to low according to the filtering frequency band, and the signal in the low frequency band passes through the high frequency band filter and then passes through the filter in the corresponding frequency band.
The invention also provides a method for generating the 1MHz-6GHz signal by adopting full frequency division, wherein the input 3GHz-6GHz signal generates a 46.875MHz-6GHz low-phase noise signal after passing through a two-stage 1/2/4/8 frequency divider with variable frequency division ratio; signals of a 187.5MHz-6GHz frequency band enter the first series-parallel multi-way switch filtering unit through the first switch unit, and are output after passing through the second switch unit; and the signal of the 46.875MHz-187.5MHz frequency band enters the frequency division unit after passing through the first switch unit to generate an ultra-low phase noise signal of 1MHz-187.5MHz, then enters the second series-parallel multi-path switch filtering unit, and finally passes through the second switch unit and is combined with the 187.5MHz-6GHz low phase noise low harmonic signal to form the ultra-low phase noise ultra-low harmonic signal of 1MHz-6GHz for output.
Optionally, the frequency dividing unit is formed by connecting 6 stages of D-type flip-flops in series, each stage of D-type flip-flop realizes one-time frequency division by two, the D-type flip-flop cascade circuit is controlled by the switch array, an 1/2/4/8/16/32/64 seven-frequency division ratio mode is respectively realized, the inputted 46.875MHz-187.5MHz signal is correspondingly divided, and finally, the ultralow phase noise signal of 1MHz-187.5MHz is generated and outputted.
Optionally, the first series-parallel multi-way switch filtering unit and the second series-parallel multi-way switch filtering unit are formed by four groups of parallel serial filter banks through switch selection, wherein each group of serial filter banks is formed by connecting a plurality of filters with different filtering frequency bands in series, a switch array is used for controlling a series circuit of the filters, and the parallel connection among the filters is realized through a path through which a switch selection signal passes, so that the serial realization of filtering with different frequency bands is realized.
Optionally, signals in a frequency band of 187.5MHz-6GHz enter a first series-parallel multi-way switch filtering unit, the first series-parallel multi-way switch filtering unit comprises two parallel serial filter banks, one serial filter bank is selected through a switch, and a corresponding low-pass filter in the serial filter bank is selected through the switch, so as to combine different filtering frequency bands;
the ultra-low phase noise signal of 1MHz-187.5MHz enters a second series-parallel multi-way switch filtering unit, the second series-parallel multi-way switch filtering unit comprises two parallel serial filter groups, one serial filter group is selected through a switch, and the corresponding low-pass filter in the serial filter group is selected through the switch, so that different filtering frequency bands are combined.
Optionally, the filters in each serial filter bank are arranged in sequence from high to low according to the filtering frequency band, and the signal in the low frequency band passes through the high frequency band filter and then passes through the filter in the corresponding frequency band.
The invention has the beneficial effects that:
(1) the output of the ultralow phase noise ultralow harmonic signal covering 1MHz-6GHz is realized by adopting a full-band frequency division filtering mode;
(2) the phase noise advantage of the D-type trigger is utilized to carry out frequency division on the low-frequency-band signal for multiple times in a multi-stage cascade mode, so that the ultra-low phase noise signal output from 1MHz is obtained;
(3) a novel series-parallel connection hybrid switch filtering component is designed, the area of a switch filtering circuit is reduced, and output signals can have better harmonic indexes.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a prior art signal generating circuit;
FIG. 2 is a schematic diagram of a signal generating circuit of the present invention;
fig. 3 is a schematic diagram of a series-parallel hybrid switch filter unit and a D-type flip-flop frequency divider circuit of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The existing mainstream commercial signal generator 250MHz-6GHz low-phase noise low-harmonic signal generation is realized by adopting a frequency division and parallel switch filtering scheme, in the application background of broadband signal generation, a plurality of wave bands need to be divided for switch filtering to obtain a low-harmonic signal, and in consideration of the characteristics of parasitic pass bands of different types of filters, each wave band can be realized by adopting a plurality of filter cascade combinations, so that the parallel switch filtering scheme has a complex circuit and large occupied space size, and is not beneficial to the miniaturization development of instrument equipment. Signals below 250MHz are generated in a mixing mode without frequency division and filtering, so that the phase noise and the harmonic of the signals below 250MHz are not further optimized, and the application of some special occasions of users cannot be met.
In order to solve the problems in the prior art and obtain low phase noise and low harmonic signals, the invention provides a full-band frequency division filtering scheme, and particularly, in a low frequency band, frequency division is carried out by utilizing the noise advantage of a D-type trigger to obtain a good phase noise index. Aiming at the problems of complex form and large occupied size of a switch filter circuit, the invention provides a series-parallel hybrid switch filter scheme, which is used for multiplexing partial filters and reducing the circuit complexity and the circuit area. And because of the series connection form of the filter, the higher harmonics of the signal can be better inhibited, and the problem of reduced harmonic inhibition caused by the parasitic passband characteristic of the filter is solved.
The invention provides a 1MHz-6GHz signal generating circuit and method adopting full frequency division, which frequency-divide a low-frequency band signal to 1MHz for multiple times by using a D-type trigger, thereby generating an ultra-low phase noise signal of a 1MHz-6GHz full frequency band and carrying out frequency-division filtering on the full frequency band signal. In addition, in order to overcome the defects that the traditional parallel multi-way switch filter circuit is complex in circuit and large in occupied printed board area, the invention provides a novel series-parallel hybrid multi-way switch filter circuit, which effectively simplifies a filter path and reduces the circuit area.
As shown in fig. 2, the 1MHz-6GHz signal generating circuit using full frequency division proposed by the present invention includes: the frequency dividing device comprises a first variable frequency dividing ratio frequency divider 2-1, a second variable frequency dividing ratio frequency divider 2-2, a first switch unit 2-3, a second switch unit 2-4, a first series-parallel multi-way switch filtering unit 2-5, a second series-parallel multi-way switch filtering unit 2-7 and a frequency dividing unit 2-6 formed by cascading multi-stage D-type triggers. The incoming 3GHz-6GHz signal, after passing through the two stages 1/2/4/8 variable divide ratio frequency dividers 2-1 and 2-2, produces a low phase noise signal of 46.875MHz-6 GHz. Signals of a 187.5MHz-6GHz frequency band enter a first series-parallel multi-way switch filtering unit 2-5 through a first switch unit 2-3, and are output after passing through a second switch unit 2-4; signals of a 46.875MHz-187.5MHz frequency band pass through the first switch unit 2-3 and then enter the frequency division unit 2-6 to generate ultra-low phase noise signals of 1MHz-187.5MHz, then enter the second series-parallel multi-switch filtering unit 2-7, finally pass through the second switch unit 2-4 and then are combined with the 187.5MHz-6GHz low phase noise low harmonic signals to form ultra-low phase noise ultra-low harmonic signals of 1MHz-6GHz for output.
The multistage frequency division circuit 2-6 formed by D-type flip-flops is shown in fig. 3, the circuit is formed by 6 stages of D-type flip-flops, each stage of D-type flip-flop can realize one-time frequency division by two, the cascaded circuit is controlled by a switch array, seven frequency division ratio modes such as 1/2/4/8/16/32/64 and the like can be respectively realized, the input 46.875MHz-187.5MHz signal is correspondingly divided, and finally, the ultralow phase noise signal of 1MHz-187.5MHz is generated to be output.
The novel series-parallel hybrid switch filter circuit designed by the invention is shown in figure 3, a first series-parallel multi-way switch filter unit 2-5 and a second series-parallel multi-way switch filter unit 2-7 are formed by four groups of parallel serial filter groups through switch selection, wherein each group of serial filter groups is formed by connecting a plurality of low-pass filters with different filter frequency bands and a plurality of switches in series, and the parallel connection among the filters is realized through a path through which a switch selection signal passes, so that the serial realization of the filtering energy of different frequency bands is realized.
Signals in a frequency range of 187.5MHz to 6GHz enter a first series-parallel multi-way switch filtering unit 2-5, the first series-parallel multi-way switch filtering unit 2-5 comprises two parallel serial filter groups, one serial filter group is selected through a switch, and a corresponding low-pass filter in the serial filter group is selected through the switch, so that different filtering frequency ranges are combined. Similarly, the ultra-low phase noise signal of 1MHz-187.5MHz enters the second series-parallel multi-switch filtering unit 2-7, the second series-parallel multi-switch filtering unit 2-7 includes two parallel serial filter banks, one serial filter bank is selected through a switch, and the corresponding low-pass filter in the serial filter bank is selected through the switch, so as to combine into different filtering frequency bands.
The working principle of the series-parallel multi-switch filter unit is described below by taking one serial filter bank in the first series-parallel multi-switch filter units 2-5 as an example.
As shown in FIG. 3, the series-parallel filtering path of 1GHz-6GHz is composed of a 4GHz-6GHz low-pass filter 3-1, a 3GHz-4GHz low-pass filter 3-3, a 2GHz-3GHz low-pass filter 3-6, a 1.5GHz-2GHz low-pass filter 3-9, a 1GHz-1.5GHz low-pass filter 3-12 and single-pole double-throw switches (3-2, 3-4, 3-5, 3-7, 3-8, 3-10, 3-11 and 3-13). The output end of a 4GHz-6GHz low-pass filter 3-1 is connected with the common end of a single-pole double-throw switch 3-2, one non-common port of the single-pole double-throw switch 3-2 is connected with the input end of the 3GHz-4GHz low-pass filter 3-3, the output end of the 3GHz-4GHz low-pass filter 3-3 is connected with the common end of the single-pole double-throw switch 3-4, one non-common port of the single-pole double-throw switch 3-4 is connected with the input end of a 2GHz-3GHz low-pass filter 3-6, the output end of the 2GHz-3GHz low-pass filter 3-6 is connected with the common end of a single-pole double-throw switch 3-7, one non-common port of the single-pole double-throw switch 3-7 is connected with the input end of a 1.5GHz-2GHz low-pass filter 3-9, the output end of the 1.5GHz-2GHz low-pass filter 3-9, one non-common port of the single-pole double-throw switch 3-10 is connected with the input end of the 1GHz-1.5GHz low-pass filter 3-12, and the output end of the 1GHz-1.5GHz low-pass filter 3-12 is connected with one non-common port of the single-pole double-throw switch 3-13, so that a series circuit of all filters is formed. In addition, the other non-common end of the single-pole double-throw switch (3-2, 3-4, 3-7, 3-10, 3-13) and the single-pole double-throw switch (3-5, 3-8, 3-11) realize the parallel connection among the filters through the switch switching control.
For example, when a 5GHz signal passes through the path, the signal firstly passes through a 4GHz-6GHz low-pass filter 3-1, then passes through a single-pole double-throw switch 3-2 and then enters a parallel channel, and finally passes through a single-pole double-throw switch 3-13 and then is output to a rear-stage circuit after sequentially passing through a single-pole double-throw switch 3-5, a single-pole double-throw switch 3-8 and a single-pole double-throw switch 3-11; when a 1.8GHz signal passes through a channel, the corresponding control is carried out on each switch, so that the signal sequentially passes through a 4GHz-6GHz low-pass filter 3-1, a single-pole double-throw switch 3-2, a 3GHz-4GHz low-pass filter 3-3, a single-pole double-throw switch 3-4, a 2GHz-3GHz low-pass filter 3-6 and a single-pole double-throw switch 3-7, then enters a 1.5GHz-2GHz low-pass filter 3-9, then enters a single-pole double-throw switch 3-10, and is subjected to switch selection control on the single-pole double-throw switch 3-10, so that the signal enters a single-pole double-throw switch 3-11 and finally passes through a single-pole double-throw switch 3-13 and is output to a rear-stage circuit. Compared with the traditional switch filtering mode in which the filters are simply connected in parallel, the series-parallel hybrid switch filtering mode can effectively reduce the circuit area. And the arrangement sequence of the filters in each serial filter group is arranged from high to low according to the filtering frequency band, so that the signals of the low frequency band can pass through the high frequency band filter and then pass through the filters of the corresponding frequency bands, thereby better inhibiting the higher harmonics of the output signals and solving the problem of reducing the harmonic inhibition caused by the parasitic passband characteristics of the filters.
The invention abandons the frequency mixing mode to generate low-frequency signals on the basis of the original signal generation scheme, introduces a multistage D-type trigger frequency division scheme aiming at low-frequency signals and a novel series-parallel hybrid switch filtering component, and thereby realizes the output of ultra-low phase noise and ultra-low harmonic signals covering the full-frequency band range of 1MHz-6 GHz.
Compared with the prior art, the invention expands the output range of the low-phase noise signal to 1MHz, and realizes the ultra-low-phase noise output covering the full frequency band of 1MHz-6 GHz; compared with the original parallel switch filter component, the novel series-parallel hybrid switch filter component designed by the invention has smaller circuit area and better harmonic output index, and is favorable for promoting the miniaturization of instrument and equipment.
The invention also provides a method for generating the 1MHz-6GHz signal by adopting the full frequency division, which has the same implementation principle with the circuit for generating the 1MHz-6GHz signal by adopting the full frequency division and is not repeated.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (6)

1. A 1MHz-6GHz signal generating circuit using full frequency division, comprising:
the frequency divider comprises a first variable frequency dividing ratio frequency divider, a second variable frequency dividing ratio frequency divider, a first switch unit, a second switch unit, a first series-parallel multi-way switch filtering unit, a second series-parallel multi-way switch filtering unit and a frequency dividing unit;
after the input 3GHz-6GHz signal passes through a two-stage 1/2/4/8 variable frequency division ratio frequency divider, a low-phase noise signal of 46.875MHz-6GHz is generated; signals of a 187.5MHz-6GHz frequency band enter the first series-parallel multi-way switch filtering unit through the first switch unit, and are output after passing through the second switch unit; the signal of the 46.875MHz-187.5MHz frequency band enters the frequency division unit after passing through the first switch unit, produces 1MHz-187.5MHz signal, then enters the second series-parallel multi-channel switch filter unit, and finally is combined with the 187.5MHz-6GHz signal after passing through the second switch unit to form 1MHz-6GHz signal output;
the frequency dividing unit is formed by connecting 6 stages of D-type triggers in series, each stage of D-type trigger realizes one-time frequency division by two, the D-type trigger cascade circuit is controlled through the switch array, an 1/2/4/8/16/32/64 seven-frequency division ratio mode is respectively realized, the input 46.875MHz-187.5MHz signals are correspondingly divided, and finally, the ultra-low phase noise signals of 1MHz-187.5MHz are generated and output;
the first series-parallel multi-way switch filtering unit and the second series-parallel multi-way switch filtering unit are respectively formed by four groups of parallel serial filter groups through switch selection, wherein each group of serial filter groups is formed by connecting a plurality of filters with different filtering frequency bands in series, the series circuit of the filters is controlled through a switch array, and the parallel connection among the filters is realized through a path through which a switch selection signal passes, so that the serial realization of the filtering of different frequency bands is realized.
2. The 1MHz-6GHz signal generating circuit with full frequency division according to claim 1,
signals in a frequency band of 187.5MHz-6GHz enter a first series-parallel multi-way switch filtering unit, the first series-parallel multi-way switch filtering unit comprises two parallel serial filter groups, one serial filter group is selected through a switch, and a corresponding low-pass filter in the serial filter group is selected through a switch array to be combined into different filtering frequency bands;
the ultra-low phase noise signal of 1MHz-187.5MHz enters a second series-parallel multi-way switch filtering unit, the second series-parallel multi-way switch filtering unit comprises two parallel serial filter groups, one serial filter group is selected through a switch, and a corresponding low-pass filter in the serial filter group is selected through a switch array, so that different filtering frequency bands are combined.
3. The circuit for generating 1MHz-6GHz signal using full frequency division according to claim 1, wherein the filters in each serial filter bank are arranged in the order of the filtering frequency band from high to low, and the signal of the low frequency band passes through the filter of the high frequency band and then passes through the filter of the corresponding frequency band.
4. A method for generating 1MHz-6GHz signal by full frequency division,
after the input 3GHz-6GHz signal passes through a two-stage 1/2/4/8 variable frequency division ratio frequency divider, a low-phase noise signal of 46.875MHz-6GHz is generated; signals of a 187.5MHz-6GHz frequency band enter the first series-parallel multi-way switch filtering unit through the first switch unit, and are output after passing through the second switch unit; the signal of the 46.875MHz-187.5MHz frequency band enters the frequency dividing unit after passing through the first switch unit, produces the ultra-low phase noise signal of 1MHz-187.5MHz, then enters the second series-parallel multi-path switch filtering unit, and finally passes through the second switch unit and combines with the 187.5MHz-6GHz low phase noise low harmonic signal to form the ultra-low phase noise ultra-low harmonic signal of 1MHz-6GHz for output;
the frequency dividing unit is formed by connecting 6 stages of D-type triggers in series, each stage of D-type trigger realizes one-time frequency division by two, the D-type trigger cascade circuit is controlled through the switch array, an 1/2/4/8/16/32/64 seven-frequency division ratio mode is respectively realized, the input 46.875MHz-187.5MHz signals are correspondingly divided, and finally, the ultra-low phase noise signals of 1MHz-187.5MHz are generated and output;
the first series-parallel multi-way switch filtering unit and the second series-parallel multi-way switch filtering unit are respectively formed by four groups of parallel serial filter groups through switch selection, wherein each group of serial filter groups is formed by connecting a plurality of filters with different filtering frequency bands in series, the series circuit of the filters is controlled through a switch array, and the parallel connection among the filters is realized through a path through which a switch selection signal passes, so that the serial realization of the filtering of different frequency bands is realized.
5. The method of claim 4, wherein the signal generation method of 1MHz-6GHz using full frequency division,
signals in a frequency band of 187.5MHz-6GHz enter a first series-parallel multi-way switch filtering unit, the first series-parallel multi-way switch filtering unit comprises two parallel serial filter groups, one serial filter group is selected through a switch, and a corresponding low-pass filter in the serial filter group is selected through a switch array to be combined into different filtering frequency bands;
the ultra-low phase noise signal of 1MHz-187.5MHz enters a second series-parallel multi-way switch filtering unit, the second series-parallel multi-way switch filtering unit comprises two parallel serial filter groups, one serial filter group is selected through a switch, and a corresponding low-pass filter in the serial filter group is selected through a switch array, so that different filtering frequency bands are combined.
6. The method of claim 4, wherein the filters in each of the filter banks are arranged in a sequence from high to low in the filtering band, and the signals in the low band pass through the high band filter and then pass through the corresponding band filter.
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基于HMC983_984的宽带射频源的设计;肖江涛;《电子测量技术》;20160430;18-22 *

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