CN107888199A - Method and encoder based on low-density checksum coding/decoding input information - Google Patents

Method and encoder based on low-density checksum coding/decoding input information Download PDF

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CN107888199A
CN107888199A CN201711140057.1A CN201711140057A CN107888199A CN 107888199 A CN107888199 A CN 107888199A CN 201711140057 A CN201711140057 A CN 201711140057A CN 107888199 A CN107888199 A CN 107888199A
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matrix
ldpc
parity
code
ldpc code
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CN107888199B (en
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朴成益
金兴默
许南淏
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Electronics and Telecommunications Research Institute ETRI
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Electronics and Telecommunications Research Institute ETRI
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
    • H03M13/6393—Rate compatible low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/033—Theoretical methods to calculate these checking codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal

Abstract

Provide LDPC (low-density checksum) code for the broadcast of ground cloud.Receive information is included come the method for coding input information based on LDPC (low-density checksum), and encode the input information using LDPC code word using parity matrix, wherein the parity matrix can be with by combining than the first parity matrix of LDPC code of the reference value with high code rate and than the second parity matrix of LDPC code of the reference value with compared with low bit- rate the structure that obtains.

Description

Method and encoder based on low-density checksum coding/decoding input information
The application is the applying date for August in 2013 29 days, Application No. 201310383264.5, entitled " is used for The divisional application of the application for a patent for invention of the low density parity check code of ground cloud broadcast ".
The cross reference of related application
This application claims the korean patent application submitted on May 16th, 2013 priority of No. 10-2013-0055762, Its content is all merged herein by reference.
Technical field
Embodiments of the invention are directed to LDPC (low-density checksum) code for ground cloud broadcast singal, are existed with correction The error occurred in radio channel in the ground cloud broadcast system operated in Single Frequency Network.
Background technology
Current terrestrial TV broadcast causes common channel (co-channel) interference for the three times for amounting to service coverage, and Thus the identical frequency in the region within the three times of the service coverage can not be reused.So, wherein frequency can not be reused The region of rate is referred to as white space (white space).The appearance of white space is drastically degrading spectrum efficiency.The situation causes The tranmission techniques for promoting frequency reuse and white space to remove are needed, this concentrates on the robustness received and transmit capacity Increase, to strengthen spectrum efficiency.
Recently in entitled " Cloud Transmission:A New Spectrum-Reuse Friendly Digital Terrestrial Broadcasting Transmission System”,published IEEE Transactions on Broadcasting, vol.58, no.3on IEEE Transactions on Broadcasting, vol.58, no.3 text Ground cloud broadcast technology is had been presented in offering, it, which is provided, readily reuses, and prevents white space, and allow easily to set up With operation Single Frequency Network.
Using for such ground cloud broadcast technology enables broadcaster to be transmitted in national phase by Unicasting channel Together or in the different broadcasted content of each local.However, in order to realize such target, receiver should be able to be wherein from difference One or more ground cloud broadcast singals are received in the region (that is, overlay region) of the signal overlap of emitter transmission, and should be able to The ground cloud broadcast singal of reception is distinguished from each other, and the signal of differentiation is demodulated.
In other words, same channel interference wherein be present and do not ensure timing and Frequency Synchronization for each transmission signal Situation under, one or more cloud broadcast singals should be demodulated.
Therefore, ground cloud broadcast system needs the environment of the power that noise power is more than broadcast singal wherein (that is, negative SNR (signal to noise ratio) environment) in operate.Accordingly, there exist for even being grasped for being born as the broadcast of ground cloud in SNR environment The demand of the self-correcting code of work.
The content of the invention
It is an object of the invention to provide LDPC encoder and LDPC coding methods, for based on LDPC (low-density parity-checks Test) carry out coding input information.
It is a further object of the present invention to provide a kind of or even grasp in negative SNR (signal to noise ratio) environment broadcasted for ground cloud LDPC (low-density checksum) code of work.
It is a further object of the present invention to provide a kind of LDPC than existing LDPC code with more preferable performance and more low complex degree Code.
According to an aspect of the present invention, a kind of LDPC (low-density checksum) that is based on is come the method for coding input information Including：Receive information；The input information is encoded using LDPC code word with using parity matrix, wherein the even-odd check square Battle array can have by combination than LDPC code of the reference value with high code rate the first parity matrix and than reference value with The structure obtained compared with the second parity matrix of the LDPC code of low bit- rate.
In embodiment, the parity matrix may include null matrix, unit matrix (identity matrix) and double Diagonal matrix.
In another embodiment, coded LDPC code word may include with the corresponding components of system as directed of input information, with it is pair right First even sections corresponding to angular moment battle array and the second even sections corresponding with unit matrix.
In another embodiment, the coding step may include：Use first parity matrix and the input information To calculate first even sections；With based on the input information and the first even sections calculated, the second odd even school is used Matrix is tested to calculate second even sections.
In another embodiment, the cell matrix of the dual-diagonal matrix may make up double diagonal line and be unit matrix, and The remaining cell matrix of the dual-diagonal matrix can be null matrix.
In another embodiment, the cell matrix for forming the dual-diagonal matrix of double diagonal line can be with the composition unit matrix Cornerwise cell matrix it is continuous.
In another embodiment, this method can further comprise, before the coding step, determine the code of LDPC code Rate, and the size of the dual-diagonal matrix is determined according to the code check of determination.
In another embodiment, the parity matrix may include null matrix and cyclic permutation matrices.
According to another aspect of the present invention, a kind of LDPC encoder includes：Input block, for receive information；And coding Unit, for encoding the input information using LDPC code word using parity matrix, the wherein parity matrix can have Have by combining than the first parity matrix of LDPC code of the reference value with high code rate and than reference value with relatively low code Second parity matrix of the LDPC code of rate and the structure obtained.
According to another aspect of the present invention, one kind by LDPC (low-density checksum) decoders come decoding LDPC code Method includes：Receive the LDPC code word encoded by parity matrix, and the LDPC using the parity matrix to reception Code word is decoded, wherein the parity matrix can with by combination than LDPC code of the reference value with high code rate the One parity matrix and there is the structure that is obtained compared with the second parity matrix of the LDPC code of low bit- rate than reference value.
According to another aspect of the present invention, a kind of LDPC decoder includes：Receiving unit, pass through even-odd check for receiving LDPC (low-density checksum) code word of matrix coder；And decoding unit, for using the parity matrix to reception LDPC code word is decoded, and wherein the parity matrix can be with by combining than LDPC code of the reference value with high code rate The first parity matrix and there is the knot that is obtained compared with the second parity matrix of the LDPC code of low bit- rate than reference value Structure.
In the cloud broadcast system of ground, it is possible to provide or even (low-density is strange by the LDPC operated in negative SNR (signal to noise ratio) environment Even parity check).
The code ratio DVB-T2 (DVB-ground version 2) and DVB-S2 (DVB-defend Star-the second generation) LDPC code that uses in system provides more preferable performance and more low complex degree.
Brief description of the drawings
When considered in conjunction with the accompanying drawings, by reference to described in detail below, embodiments of the invention are readily able to be made apparent from, its In：
Fig. 1 be a diagram that QC-LDPC (the quasi-cyclic low-density odd even schools used in DVB (DVB) system Test) figure of PCM (parity matrix) structure of code；
Fig. 2 be a diagram that it is according to embodiments of the present invention using the LDPC code operated in negative SNR (signal to noise ratio) environment come The flow chart of the method for coding input information；
Fig. 3 be a diagram that the figure of the PCM structures of LDPC code according to embodiments of the present invention；
Fig. 4 be a diagram that the figure of the PCM structures of the QC-LDPC codes for the broadcast of ground cloud, and the length of wherein code word is 8192；
Fig. 5 is the expander graphs of the PCM structures shown in Fig. 4；
Fig. 6 be a diagram that the figure of the PCM structures of the QC-LDPC codes for the broadcast of ground cloud, and the length of wherein code word is 16384；
Fig. 7 be a diagram that the figure of the PCM structures of the QC-LDPC codes for the broadcast of ground cloud, and the length of wherein code word is 32768；
Fig. 8 be a diagram that the figure of the PCM structures of the QC-LDPC codes for the broadcast of ground cloud, and the length of wherein code word is 65536；
Fig. 9 illustrates the example of the PCM structures of the LDPC code according to embodiments of the present invention according to code check；
Figure 10 be a diagram that the chart of the performance of LDPC code according to embodiments of the present invention；
Figure 11 be a diagram that the flow chart of the method for decoding LDPC code word according to embodiments of the present invention；With
Figure 12 be a diagram that the block diagram of LDPC encoder according to embodiments of the present invention and LDPC decoder.
Embodiment
Embodiments of the invention are described in detail in the reference accompanying drawing to be studied of those skilled in the art.It is however, of the invention It can implement in various manners, and not limited to this.Had been omitted from figure with the incoherent content of the present invention, and run through explanation Similar reference numerals are distributed in book to similar component.
As it is used herein, when element " comprising " or another element of "comprising", except in illustrating otherwise, this yuan Part can further comprise or comprising another element, and be not excluded for another element.In addition, as it is used herein, term " unit " or " part " means the basis for handling at least one function or operation, and it according to hardware or software or can be pressed Realized according to the combination of software and hardware.
Fig. 1 be a diagram that QC-LDPC (the quasi-cyclic low-density odd even schools used in DVB (DVB) system Test) figure of PCM (parity matrix) structure of code.
In general, LDPC code is known as such self-correcting code, its with AWGN (additive white Gaussian noise) channel Shannon limit it is closest, and while enabled parallelization decodes, bit ripple (Turbo) code provides asymptotic (asymptotically) better performance.
Such LDPC code is defined by the low-density PCM (parity matrix) generated at random.However, generate at random LDPC code needs a large amount of memories to store PCM, and needs for a long time to access memory.
In order to solve the problems, such as such memory, it has been proposed that QC-LDPC (quasi-cyclic LDPC) code, and by null matrix Or QC-LDPC codes PCM (H) as shown in equation 1 that CPM (cyclic permutation matrices) is formed is defined：
[equation 1]
Here, P is the CPM for having size L × L, and as defined in equation 2：
[equation 2]
In addition, PiIt is by right shift i (0≤i<L) the matrix of secondary acquisition, unit matrixWith size L × L, and P∞It is the null matrix with size L × L.Therefore, in the case of QC-LDPC codes, component i can only be stored to store Pi, and thus, store the memory needed for PCM and be reduced for 1/L.
As an example, the QC-LDPC codes used in DVB systems shown in Fig. 1 are made up of I matrixes and P matrixes.I matrixes It is the matrix with size (N-K) × K, and P matrixes are the dual-diagonal matrixes for having size (N-K) × (N-K).Here, N is code The length of word, and K is the length for inputting information.
Fig. 2 be a diagram that it is according to embodiments of the present invention using the LDPC code operated in negative SNR (signal to noise ratio) environment come The flow chart of the method for coding input information, and Fig. 3 be a diagram that the PCM structures of LDPC code according to embodiments of the present invention Figure.
With reference first to Fig. 2, if keying in the information to be encoded (210) and determining code check (220), according to the present invention's LDPC encoder according to the code check of determination come determine in parity matrix it is variable including dual-diagonal matrix size (230), at this moment, although determining code check after the information to be encoded is keyed in fig. 2, if necessary, code check can be By previously determined or can be determined when inputting information before input information.
Thereafter, the parity matrix of determination can be used to be encoded using LDPC code word for the LDPC encoder shown in Fig. 3 Input information.Here, parity matrix may have a structure such that, wherein for higher than reference value (for example, 0.5) The first parity matrix (PCM [A B]) of the LDPC code of high code rate and for the relatively low bit- rate with less than the reference value LDPC code the second parity matrix (PCM [C D]) be combined with each other.
As an example, with reference to figure 3, according to the parity matrix of the present invention may include dual-diagonal matrix B, unit matrix D, And null matrix.Here, in dual-diagonal matrix B, the cell matrix for forming double diagonal line can be unit matrix, and remaining single Variable matrix can be null matrix.The cell matrix for forming dual-diagonal matrix B double diagonal line can be with pair of component unit matrix D The cell matrix of linea angulata is continuous.
In figure 3, N is the length of code word, and K is the length of information, and g is the value for depending on code check change.Matrix A and square Battle array C has size g × K and (N-K-g) × (K+g) respectively, and can be by cyclic permutation matrices and null matrix with size L × L Form.In addition, matrix Z is with size g × (N-K-g), null matrix, and matrix B is that have that size g × g's is double to angular moment Battle array.Matrix B can be expressed as in equation 3:
[equation 3]
Wherein it is cell matrix, and is the unit matrix with size L × L.
The LDPC code word encoded shown in Fig. 3 by parity matrix may include (N-K) × K corresponding with input information Components of system as directed, the first even sections corresponding with dual-diagonal matrix B and the second even sections corresponding with unit matrix D.
Input information and the first parity matrix (PCM [AB]) can be used to calculate according to the LDPC encoder of the present invention First even sections, and the second parity matrix (PCM [C can be used based on input information and the first even sections calculated D]) calculate the second even sections.
Particularly, following equation 4 can be used come coding input information according to the LDPC encoder of the present invention：
[equation 4]
HcT=0
Here, H is parity matrix, and c is LDPC code word.
Therebetween, equation 4 can separate as shown in equation 5：
[equation 5]
Here, s is components of system as directed, P1It is the first even sections, and P2It is the second even sections.
Because B is dual-diagonal matrix, institute is for the first even sections P of calculating1Coded treatment can pass through block type Accumulator performs.Further, since D is unit matrix, so the second even sections P2It can pass throughIt is and simple Singly calculate.So, effective linear time code algorithm is had according to the LDPC encoder of the present invention, and it is complicated thus to reduce it Degree.
As an example, given in table 1 respectively with code word size 8192,16384,32768 and 65536 with code check N, K and g of 0.25 LDPC code.
[table 1]
N K g
8192 2048 160
16384 4096 320
32768 8192 640
65536 16384 1280
The demonstration methodses of the PCM for expressing the QC-LDPC codes designed in table 1 will now be described.
Assuming that the QC-LDPC codes formed with code check 4/, N=28 and K=16 and by 4 × 4CPM are with equation 6 Shown PCM：
[equation 6]
PCM can be expressed as below.
73-- matrix size (#=7 of row, capable #=3)
2311111-- row weight distribution
Row weight=3 of 0th row weight=2, the 1,
Row weight=1 of 2nd row weight=1, the 3,
Row weight=1 of 4th row weight=1, the 5,
6th row weight=1.
334-- row weight distribution
Row weight=3 of 0th row weight=3, the 1,
2nd row weight=4.
The position of the non-zero matrix of-- per a line
The non-zero matrix position of 014 the 0th row, row weight=3
The non-zero matrix position of 135 the 1st rows, row weight=3
The non-zero matrix position of 0126 the 2nd row, row weight=4
The exponential quantity of the non-zero matrix of-- per a line
The exponential quantity of the non-zero matrix of 230 the 0th rows
The exponential quantity of the non-zero matrix of 120 the 1st rows
The exponential quantity of the non-zero matrix of 2300 the 2nd rows
QC-LDPC operated in the negative SNR environment of the ground cloud broadcast system according to the present invention, that there is code check 0.25 The PCM of code can be represented in such a manner, thus cause following examples：
[embodiment 1]
[embodiment 2]
[embodiment 3]
[embodiment 4]
Fig. 4 to 8 shows the example of the PCM structures of LDPC code according to embodiments of the present invention.
As an example, Fig. 4 illustrates the PCM structures of the QC-LDPC codes for the broadcast of ground cloud, the length of wherein code word is 8192, and Fig. 5 is the expander graphs of the PCM structures shown in Fig. 4.
Therebetween, Fig. 6 illustrates the PCM structures of the QC-LDPC codes for the broadcast of ground cloud, and the length of wherein code word is 16384, Fig. 7 illustrate the PCM structures of the QC-LDPC codes for the broadcast of ground cloud, and the length of wherein code word is 32768, and Fig. 8 The PCM structures of the QC-LDPC codes for the broadcast of ground cloud are illustrated, the length of wherein code word is 65536.
Fig. 9 illustrates the example of the PCM structures of the LDPC code according to embodiments of the present invention according to code check.
Multiple single parity check codes are included according to the PCM of the LDPC code of the present invention, and thus, it can be for each difference Code check truncates, as shown in Figure 9.For example, it be able to can be easily produced with the He of code check 1/2 by the way that PCM is truncated into 50 and 83.3% 1/3 LDPC code.This means can be by decoding only one of whole code words in high SNR regions according to the LDPC code of the present invention Point.Therefore, LDPC decoder can save power consumption and reduce the stand-by period.
Figure 10 be a diagram that the chart of the performance of LDPC code according to embodiments of the present invention.
As an example, in Fig. 10, the performance of the QC-LDPC codes with code check 0.25 is shown compared with SNR.In order to The purpose of experiment with computing, it has been assumed that execution QPSK (QPSK) modulation and 50 repeat decodings based on LLR (logarithms Likelihood ratio) sum-product algorithm.
Therebetween, Figure 10 also illustrates what is used in the DVB-T2/S2 systems with code check 0.25 and code word size 64800 LDPC code, to show the excellent performance of the LDPC code redesigned according to the present invention.In addition, table 2 below shows in BER (bit error probability)=2 × 10-6The performance gap that place grows from the shannon limit of the LDPC code for ground cloud broadcast design, And table 3 shows the complexity of the LDPC code proportional in PCM 1 number.
[table 2]
Length (N) Shannon limit [SNR, dB] With the gap [dB] of the limit
8192 -3.804 1.29
16384 -3.804 0.99
32768 -3.804 0.79
65536 -3.804 0.6
DVB(64800) -3.804 1.29
[table 3]
Length (N) One number in PCM
8192 36,352
16384 72,736
32768 145,504
65536 291,040
DVB(64800) 194,399
With reference to figure 10 and table 2 and 3, in the LDPC code redesigned according to the present invention, there is code word size 65536 Performance well about 0.69dB but complexity of the LDPC code than the LDPC code of the DVB-T2/S2 systems with code word size 64800 Height about 50%.However, DVB-T2/ of the LDPC code ratio with code word size 64800 with code word size 16384 and 32768 The performance of the LDPC code of S2 systems well about 0.3dB and about 0.5dB but complexity difference low about 63% and about respectively 25%.In addition, the LDPC code redesigned according to the present invention is (when their code word size is 8192,16384,32768 and When 65536) in BER=2 × 10-6Place separates about 1.29dB, about 0.99dB, about 0.79dB and about with shannon limit 0.6dB。
Figure 11 be a diagram that the flow chart of the method for decoding LDPC code word according to embodiments of the present invention.
With reference to figure 11, according to the LDPC decoder of the present invention, when receiving LDPC code word (1110), combined using passing through Than first parity matrix of the LDPC code of reference value (for example, 0.5) with high code rate and than reference value with relatively low code Second parity matrix of the LDPC code of rate and the parity matrix obtained, to be decoded to the LDPC code word of reception (1120).At this moment, as shown in Figure 3, parity matrix may include null matrix Z, unit matrix D and dual-diagonal matrix B. In dual-diagonal matrix B, the cell matrix for forming the double diagonal line is unit matrix, and remaining cell matrix can be zero moment Battle array.Forming the cell matrix of diagonal matrix B double diagonal line can connect with cornerwise cell matrix of component unit matrix D It is continuous.
Figure 12 be a diagram that the block diagram of LDPC encoder according to embodiments of the present invention and LDPC decoder.
With reference to figure 12, as an example, may include input block 1212 according to the LDPC encoder 1210 of the present invention, determining list Member 1214 and coding unit 1216.LDPC decoder 1220 may include receiving unit 1222 and decoding unit 1224.
Input block 1212 receives the information to be encoded.
Determining unit 1214 determines the code check of LDPC code, and depending on the code check determined determines the chi of dual-diagonal matrix It is very little.
Coding unit 1216 is come sharp by using the parity matrix with code check determined by the determining unit 1214 The information inputted by input block 1212 is encoded with LDPC code word.Here, parity matrix may include null matrix And cyclic permutation matrices.
Therebetween, as an example, parity matrix may have a structure such that, wherein combine has high code than reference value First parity matrix of the LDPC code of rate and second parity matrix than reference value with the LDPC code compared with low bit- rate. Here, reference value can be such as 0.5.It may include null matrix, unit matrix and dual-diagonal matrix.Particularly, even-odd check Matrix can have the structure shown in Fig. 3, and in this case, the first parity matrix may include dual-diagonal matrix B, and the second parity matrix may include unit matrix D.In dual-diagonal matrix B, the cell matrix of double diagonal line is formed Can be unit matrix, and remaining cell matrix can be null matrix.The cell matrix for forming double diagonal line can be with forming list Bit matrix D cornerwise cell matrix is continuous.
As an example, coding unit 1216 can be by using the information inputted by input block 1212 and the first odd even school Test the even sections of matrix computations first and use the second even-odd check by the first even sections based on input information and calculating The even sections of matrix computations second, and utilize LDPC code word coding input information.
LDPC code word coded by coding unit 1216 may include corresponding with the information inputted by input block 1212 Components of system as directed, the first even sections corresponding with dual-diagonal matrix and the second even sections corresponding with unit matrix.
Therebetween, the receiving unit 1222 of decoder 1220 receives the LDPC code word encoded by parity matrix.Receive The LDPC code word that unit 1222 is received may include components of system as directed, the first even sections and the second even sections.
As shown in Figure 3, decoding unit 1224 using the parity matrix shown in Fig. 3 come to the institute of receiving unit 1222 The LDPC code word of reception is decoded.
Although having been described for the example embodiment of the present invention, the invention is not restricted to this, and it can be carried out various Modification or modification, without departing from the scope of the present invention.The embodiments described herein is not provided and describes this to limit the present invention Invention, and the invention is not restricted to this.The scope of the present invention should be explained in the following claims, and the present invention's is equivalent interior Spirit should be interpreted as including within the scope of this invention.

Claims (20)

1. a kind of be used to come the method for coding input information, this method include based on low-density checksum LDPC：
Receive information；With
The input information is encoded using LDPC code word using parity matrix, wherein the parity matrix, which has, passes through group First parity matrix of LDPC code of the composition and division in a proportion reference value with high code rate and than LDPC of the reference value with compared with low bit- rate Second parity matrix of code and the structure that obtains.
2. method according to claim 1, the wherein parity matrix include null matrix, unit matrix and dual-diagonal matrix.
3. method according to claim 2, wherein coded LDPC code word include components of system as directed corresponding with input information, with First even sections corresponding to dual-diagonal matrix and the second even sections corresponding with unit matrix.
4. method according to claim 3, wherein the coding step includes：
First even sections are calculated using first parity matrix and the input information；With
Based on the input information and the first even sections for being calculated, it is second strange to calculate this using second parity matrix Even part.
5. the cell matrix of method according to claim 2, the wherein dual-diagonal matrix forms double diagonal line and is unit square Battle array, and the remaining cell matrix of the dual-diagonal matrix is null matrix.
6. method according to claim 2, wherein forming the cell matrix of the dual-diagonal matrix of double diagonal line with forming the unit Cornerwise cell matrix of matrix is continuous.
7. method according to claim 2, further comprises, before the coding step,
Determine the code check of LDPC code；With
The size of the dual-diagonal matrix is determined according to the code check of determination.
8. method according to claim 1, the wherein parity matrix include null matrix and cyclic permutation matrices.
9. a kind of low-density checksum LDPC encoder, including：
Input block, for receive information；With
Coding unit, for encoding the input information, the wherein even-odd check using LDPC code word using parity matrix Matrix with by combine than LDPC code of the reference value with high code rate the first parity matrix and than reference value with The structure obtained compared with the second parity matrix of the LDPC code of low bit- rate.
10. LDPC encoder according to claim 9, the wherein parity matrix include null matrix, unit matrix and double right Angular moment battle array.
11. LDPC encoder according to claim 10, wherein coded LDPC code word includes, information is corresponding is with input System part, the first even sections corresponding with dual-diagonal matrix and the second even sections corresponding with unit matrix.
12. LDPC encoder according to claim 11, wherein the coding unit is by using first parity matrix First even sections are calculated with the input information；And by based on the input information and the first even sections for being calculated, Second even sections are calculated using second parity matrix, and encode the input information.
13. the cell matrix of LDPC encoder according to claim 10, the wherein dual-diagonal matrix form double diagonal line and It is unit matrix, and the remaining cell matrix of the dual-diagonal matrix is null matrix.
14. LDPC encoder according to claim 10, wherein forming the cell matrix and structure of the dual-diagonal matrix of double diagonal line Cornerwise cell matrix into the unit matrix is continuous.
15. LDPC encoder according to claim 10, further comprises determining that unit, for determining the code check of LDPC code；And The size of the dual-diagonal matrix is determined according to the code check of determination.
16. LDPC encoder according to claim 9, the wherein parity matrix include null matrix and cyclic permutation matrices.
17. a kind of included by low-density checksum LDPC decoder come the method for decoding LDPC code, this method：
Receive the LDPC code word encoded by parity matrix；With
The LDPC code word of reception is decoded using the parity matrix, wherein the parity matrix, which has, passes through combination Than the first parity matrix of LDPC code of the reference value with high code rate and than LDPC code of the reference value with compared with low bit- rate The second parity matrix and the structure that obtains.
18. method according to claim 17, the wherein parity matrix include null matrix, unit matrix and double to angular moment Battle array.
19. method according to claim 18, wherein coded LDPC code word include components of system as directed corresponding with input information, The first even sections corresponding with dual-diagonal matrix and the second even sections corresponding with unit matrix.
20. method according to claim 18, the wherein parity matrix include null matrix and cyclic permutation matrices.
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